JP2009130998A - Method of controlling dc/dc conversion circuit - Google Patents

Method of controlling dc/dc conversion circuit Download PDF

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JP2009130998A
JP2009130998A JP2007301422A JP2007301422A JP2009130998A JP 2009130998 A JP2009130998 A JP 2009130998A JP 2007301422 A JP2007301422 A JP 2007301422A JP 2007301422 A JP2007301422 A JP 2007301422A JP 2009130998 A JP2009130998 A JP 2009130998A
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reactor
igbt
voltage
current
circuit
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Akitake Takizawa
聡毅 滝沢
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Fuji Electric Co Ltd
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Fuji Electric Systems Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To reduce a surge voltage generated in the reverse recovery of a diode and vibration components and to lower the breakdown voltage of an IGBT module and to miniaturize a noise filter. <P>SOLUTION: When turning on semiconductor devices 4, 5 for electric power such as the IGBT module or the like, whether the current value flowing in a DC reactor 2 is within a certain established range, is decided by comparators CP2, CP3. When the current value is decided to be within the established range, a turn-on command signal of the semiconductor devices 4, 5 is not output to reduce the surge voltage in the reverse recovery of a diode. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

この発明は、直流電圧を異なる直流電圧に変換するDC/DC(直流/直流)変換回路の制御方式に関する。   The present invention relates to a control system for a DC / DC (direct current / direct current) conversion circuit that converts a direct current voltage into a different direct current voltage.

図2に、この種の回路として、例えば特許文献1に開示の例を示す。
図2において、1は直流電源(電圧値をVbとする)、2は昇圧用DC(直流)リアクトル、3はスイッチ素子としてのIGBT(絶縁ゲートバイポーラトランジスタ)4,5およびこれらに逆並列接続されているダイオード6,7からなる電力用半導体モジュール、8は昇圧側の電圧安定化のためのコンデンサ(電圧値をEdとする)、9は負荷である。
FIG. 2 shows an example disclosed in Patent Document 1 as this type of circuit.
In FIG. 2, 1 is a DC power source (voltage value is Vb), 2 is a DC (DC) reactor for boosting, 3 is an IGBT (insulated gate bipolar transistor) 4 and 5 as switching elements, and these are connected in antiparallel. A power semiconductor module composed of the diodes 6 and 7, 8 is a capacitor for stabilizing the voltage on the boost side (voltage value is Ed), and 9 is a load.

また、10,11はIGBT4,5を駆動するゲート駆動回路、12はシステムの制御回路で、DCリアクトル2と直列に接続された電流検出器13の検出値や、直流電圧Edの検出値に基づきIGBT4,5のオン・オフ信号を作成し、ゲート駆動回路10,11に信号を伝送する。また、14は電力用半導体モジュール3とコンデンサ8間の配線インダクタンスを示している。   10 and 11 are gate drive circuits for driving the IGBTs 4 and 5, and 12 is a system control circuit, which is based on the detection value of the current detector 13 connected in series with the DC reactor 2 and the detection value of the DC voltage Ed. The on / off signals of the IGBTs 4 and 5 are created, and the signals are transmitted to the gate drive circuits 10 and 11. Reference numeral 14 denotes a wiring inductance between the power semiconductor module 3 and the capacitor 8.

さらに、制御回路12においては、直流電圧Edを制御するために、直流電圧Edの検出信号Dと直流電圧指令信号Ed*との差分を調節器(PI調節器など)AVRに入力し、その出力信号Aと信号発生器TRからの三角波Tとを比較器CP1にて比較し、その比較結果をIGBT4,5のオン・オフ信号SP(PWM信号:パルス幅変調信号)として出力する。また、反転器INは信号SPを反転した信号SRを出力する。 Further, in the control circuit 12, in order to control the DC voltage Ed, the difference between the detection signal D of the DC voltage Ed and the DC voltage command signal Ed * is input to the regulator (PI controller, etc.) AVR, and the output thereof The signal CP is compared with the triangular wave T from the signal generator TR by the comparator CP1, and the comparison result is output as the on / off signal SP (PWM signal: pulse width modulation signal) of the IGBTs 4 and 5. The inverter IN outputs a signal SR obtained by inverting the signal SP.

図2において、直流電圧源1から負荷9に電力を供給する場合は、IGBT5をオン・オフさせることで、下記(1)式に基づく昇圧動作が行なわれる。
Ed=(1/(1−α))Vb…(1)
図3(a),3(b)にIGBT5がオンまたはオフしている場合の電流経路(点線参照)を、また、図4(a),4(b)にIGBT5のオン・オフ指令信号に基づく、DCリアクトル2の電流波形例を示す。図4(a)は重負荷の場合、図4(b)は軽負荷の場合で、DCリアクトル2の電流値が増加しているときはIGBT5がオン、減少しているときはIGBT5がオフしているときである。
In FIG. 2, when power is supplied from the DC voltage source 1 to the load 9, the boosting operation based on the following equation (1) is performed by turning on and off the IGBT 5.
Ed = (1 / (1-α)) Vb (1)
3 (a) and 3 (b) show the current path (see the dotted line) when the IGBT 5 is on or off, and FIGS. 4 (a) and 4 (b) show the IGBT 5 on / off command signal. A current waveform example of the DC reactor 2 is shown. 4A shows a heavy load case, and FIG. 4B shows a light load case. When the current value of the DC reactor 2 is increasing, the IGBT 5 is turned on, and when it is decreasing, the IGBT 5 is turned off. When you are.

特開2005−318743号公報JP 2005-318743 A

図5に、IGBT5がターンオンする(ダイオード6が逆回復する)際の、ダイオード6の電流波形(IR)と、ダイオード6のカソード・アノード間電圧波形(VR)とを示す。図5(a)がIGBT5のターンオン電流値が大きい場合であり、図5(b)は小さい場合である。 FIG. 5 shows the current waveform (I R ) of the diode 6 and the cathode-anode voltage waveform (V R ) of the diode 6 when the IGBT 5 is turned on (the diode 6 is reversely recovered). 5A shows a case where the turn-on current value of the IGBT 5 is large, and FIG. 5B shows a case where the turn-on current value is small.

図示のように、一般にダイオードは対向アームのIGBTのターンオン電流値(逆回復する際のダイオード電流値)が小さくなると、ダイオード自身の特性と配線インダクタンス(図2の符号14参照)の影響で、逆回復電圧波形(VR)は図5(b)のように、振動的となり高サージ電圧VRpeakが発生する。また、IGBTターンオン時の電流iと高サージ電圧VRpeakとは、例えば図6のような関係にあり、ある小電流領域で高くなることが知られている。 As shown in the figure, in general, when the turn-on current value of the IGBT of the opposite arm (the diode current value during reverse recovery) decreases, the diode reverses due to the characteristics of the diode itself and the wiring inductance (see reference numeral 14 in FIG. 2). The recovery voltage waveform (V R ) becomes oscillating as shown in FIG. 5B, and a high surge voltage V Rpeak is generated. Further, the current i at the time of IGBT turn-on and the high surge voltage V Rpeak have a relationship as shown in FIG. 6, for example, and are known to increase in a small current region.

ところで、従来のような制御方式では、図7のように、DCリアクトルを流れている電流が減少している際の電流値を管理していないため、小電流でIGBTがターンオンするケースも発生し得る。そのため、図5(b)のような波形の発生を考慮した耐圧設計や、ノイズ設計をする必要があり、結果として高耐圧IGBTモジュール適用の必要性や、ノイズフィルタの大型化と言うような問題が発生し、システムがコストアップする要因ともなっている。   By the way, in the conventional control method, as shown in FIG. 7, the current value when the current flowing through the DC reactor is not managed is not managed, so there is a case where the IGBT is turned on with a small current. obtain. Therefore, it is necessary to design withstand voltage and noise considering the generation of waveforms as shown in FIG. 5B, resulting in the necessity of applying a high withstand voltage IGBT module and increasing the size of the noise filter. This is a factor that increases the cost of the system.

したがって、この発明の課題は、ダイオード逆回復時のサージ電圧と振動成分の低減を可能とし、IGBTモジュールの低耐圧化とノイズフィルタの小型化を図ることにある。   Accordingly, an object of the present invention is to reduce the surge voltage and vibration component during reverse recovery of the diode, and to reduce the breakdown voltage of the IGBT module and the size of the noise filter.

このような課題を解決するため、請求項1の発明では、直流電圧源から直流リアクトルと電力用半導体素子とを用いて、高電圧の直流に変換するDC/DC変換回路の制御方式において、
前記直流リアクトルに流れている電流値が或る設定範囲内か否かを判断する判定手段を設け、前記電力用半導体素子をターンオンさせる際に、前記判定手段により前記直流リアクトルに流れている電流値が或る設定範囲内にあると判断されたときは、前記電力用半導体素子のオン指令信号を無効とすることを特徴とする。
In order to solve such a problem, in the invention of claim 1, in a control system of a DC / DC conversion circuit that converts a DC voltage source into a high voltage DC using a DC reactor and a power semiconductor element,
A determination unit is provided for determining whether or not a current value flowing through the DC reactor is within a certain setting range, and the current value flowing through the DC reactor by the determination unit when the power semiconductor element is turned on. Is determined to be within a certain setting range, the ON command signal of the power semiconductor element is invalidated.

この発明によれば、ダイオード逆回復時のサージ電圧値の低減や、振動成分の低減が可能となるため、従来方式に比してIGBTモジュールの低耐圧化と、発生ノイズの低減によるノイズフィルタの小型化が可能となり、結果としてシステムの高信頼化や低コスト化が可能になるという利点がもたらされる。   According to the present invention, it is possible to reduce the surge voltage value during reverse recovery of the diode and to reduce the vibration component. Therefore, compared to the conventional method, the IGBT module has a lower withstand voltage and a noise filter by reducing generated noise. The size can be reduced, and as a result, there is an advantage that the system can be highly reliable and cost can be reduced.

図1はこの発明の実施の形態を示す回路図である。
図からも明らかなように、図2の制御回路12に対し、アンド回路AN1,AN3とナンド回路AN2とSRフリップフロップ回路FFと比較器CP2,3等を付加した制御回路12Aを設けた点が特徴である。
従って、DCリアクトル2に流れている電流を検出器13にて検出した信号SIが、比較器CP2,3の設定値SE1,SE2にて定まる或る設定範囲内(逆回復時のサージ電圧が高くなる電流範囲)のときは、アンド回路AN3の出力はハイ(H)レベルとなる。
FIG. 1 is a circuit diagram showing an embodiment of the present invention.
As is apparent from the figure, the control circuit 12 in FIG. 2 is provided with a control circuit 12A to which AND circuits AN1, AN3, a NAND circuit AN2, an SR flip-flop circuit FF, comparators CP2, 3 and the like are added. It is a feature.
Accordingly, the signal SI obtained by detecting the current flowing through the DC reactor 2 with the detector 13 is within a certain setting range determined by the set values SE1 and SE2 of the comparators CP2 and CP3 (the surge voltage during reverse recovery is high). The output of the AND circuit AN3 is at a high (H) level.

一方、SRフリップフロップ回路FFは、比較器CP1の出力信号がロー(L)の場合にセットされ、PWM信号SPが“H”でリセットされる。つまり、IGBT5にオフ指令が入力されている間は、回路FFの出力はハイ(H)レベルとなる。従って、ナンド回路AN2からは、アンド回路AN3の出力信号と回路FFの出力信号が同時にHレベルのときにLレベルの信号が出力され、アンド回路AN1に入力される。アンド回路AN1では、入力信号SPとナンド回路AN2からの信号STが同時にHレベルにならないと、Hレベルの信号を出力しない。   On the other hand, the SR flip-flop circuit FF is set when the output signal of the comparator CP1 is low (L), and the PWM signal SP is reset to “H”. That is, while the OFF command is input to the IGBT 5, the output of the circuit FF is at a high (H) level. Therefore, when the output signal of the AND circuit AN3 and the output signal of the circuit FF are simultaneously at the H level, the NAND circuit AN2 outputs an L level signal and inputs it to the AND circuit AN1. The AND circuit AN1 does not output an H level signal unless the input signal SP and the signal ST from the NAND circuit AN2 simultaneously become H level.

すなわち、IGBT5がオフ期間中において、従来の制御回路12から出力されるオン指令信号SPと、DCリアクトル電流が或る設定範囲外のときHとなる信号STが同時にHレベルにならないと、IGBT5のターンオン指令信号は出力されない構成となっている。
これにより、IGBT5がオフ時において、DCリアクトル電流が或る設定範囲内の場合は、IGBT5のターンオン指令信号は出力されないこと(無効)になる。その結果、DCリアクトル電流が概ね0Aまたは或る設定範囲外になるまで、遅延されることになる。
なお、以上ではハード回路で構成したが、ソフト的に実現することも可能であるのは言うまでもない。
That is, when the IGBT 5 is in the OFF period, the ON command signal SP output from the conventional control circuit 12 and the signal ST that becomes H when the DC reactor current is outside a certain setting range do not become H level at the same time. The turn-on command signal is not output.
As a result, when the IGBT 5 is off and the DC reactor current is within a certain setting range, the turn-on command signal of the IGBT 5 is not output (invalid). As a result, the DC reactor current is delayed until it becomes approximately 0 A or out of a certain setting range.
In addition, although it comprised with the hardware circuit above, it cannot be overemphasized that it is also realizable in software.

この発明の実施の形態を示す回路図Circuit diagram showing an embodiment of the present invention 従来例を示す回路図Circuit diagram showing a conventional example 図2で素子5がオンまたはオフ時の電流経路を説明する説明図FIG. 2 is an explanatory diagram for explaining a current path when the element 5 is on or off. 図2におけるDCリアクトル2の電流波形例とIGBTオン・オフ指令信号との関係を示す波形図Waveform diagram showing the relationship between the current waveform example of the DC reactor 2 in FIG. 2 and the IGBT on / off command signal 図2における逆回復時のダイオード電流,電圧波形図Figure 2 shows diode current and voltage waveforms during reverse recovery. 図2のIGBTターンオン電流とサージ電圧の関係説明図2 is an explanatory diagram of the relationship between the IGBT turn-on current and surge voltage. 図2のDCリアクトル電流波形とIGBTオン・オフ指令信号の関係説明図2 is an explanatory diagram of the relationship between the DC reactor current waveform of FIG. 2 and the IGBT on / off command signal.

符号の説明Explanation of symbols

1…直流電源(Vb)、2…昇圧用DC(直流)リアクトル、3…電力用半導体モジュール、4,5…IGBT(絶縁ゲートバイポーラトランジスタ)、6,7…ダイオード、8…コンデンサ、9…負荷、10,11…ゲート駆動回路、12,12a…制御回路、13…電流検出器、14…配線インダクタンス、AVR…調節器、TR…信号発生器、IN…反転器、CP1〜CP3…比較器、AN1,AN3…アンド回路、AN2…ナンド回路、FF…フリップフロップ回路。   DESCRIPTION OF SYMBOLS 1 ... DC power supply (Vb), 2 ... Boosting DC (direct current) reactor, 3 ... Power semiconductor module, 4, 5 ... IGBT (insulated gate bipolar transistor), 6, 7 ... Diode, 8 ... Capacitor, 9 ... Load DESCRIPTION OF SYMBOLS 10,11 ... Gate drive circuit, 12, 12a ... Control circuit, 13 ... Current detector, 14 ... Wiring inductance, AVR ... Regulator, TR ... Signal generator, IN ... Inverter, CP1-CP3 ... Comparator, AN1, AN3 ... AND circuit, AN2 ... NAND circuit, FF ... flip-flop circuit.

Claims (1)

直流電圧源から直流リアクトルと電力用半導体素子とを用いて、高電圧の直流に変換するDC/DC変換回路の制御方式において、
前記直流リアクトルに流れている電流値が或る設定範囲内か否かを判断する判定手段を設け、前記電力用半導体素子をターンオンさせる際に、前記判定手段により前記直流リアクトルに流れている電流値が或る設定範囲内にあると判断されたときは、前記電力用半導体素子のオン指令信号を無効とすることを特徴とするDC/DC変換回路の制御方式。
In a control system of a DC / DC conversion circuit that converts a DC voltage source to a high voltage DC using a DC reactor and a power semiconductor element,
A determination means for determining whether or not a current value flowing through the DC reactor is within a certain setting range, and a current value flowing through the DC reactor by the determination means when the power semiconductor element is turned on. Is determined to be within a certain setting range, the on-command signal of the power semiconductor element is invalidated.
JP2007301422A 2007-11-21 2007-11-21 Method of controlling dc/dc conversion circuit Pending JP2009130998A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012205491A (en) * 2011-03-28 2012-10-22 Asahi Kasei Electronics Co Ltd Switching power supply

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012205491A (en) * 2011-03-28 2012-10-22 Asahi Kasei Electronics Co Ltd Switching power supply

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