JP2009010341A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 26
- 238000000034 method Methods 0.000 claims abstract description 21
- 238000005468 ion implantation Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 238000009792 diffusion process Methods 0.000 claims abstract description 5
- 238000005530 etching Methods 0.000 claims description 11
- 230000003647 oxidation Effects 0.000 claims description 10
- 238000007254 oxidation reaction Methods 0.000 claims description 10
- 230000015556 catabolic process Effects 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 33
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 33
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 238000000206 photolithography Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000011161 development Methods 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 238000007429 general method Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
【解決手段】この半導体装置の製造方法は、第1導電型基板上に第1導電型エピタキシャル層を形成する工程と、第1導電型エピタキシャル層の表面に、第2導電型ガードリング層を形成するための領域のみ開口部を有するSiN層を形成する工程と、SiN膜の形成された面よりイオン注入を行なうことにより、第1導電型エピタキシャル層の表面に、第2導電型ガードリング層を形成する工程と、少なくとも開口部に酸化層を形成する工程と、第1導電型エピタキシャル層の表面に、第2導電型ガードリング層に隣接して、第2導電型ベース層を形成する工程と、酸化膜の形成された面よりイオン注入を行なうことにより第1導電型拡散層を形成する工程からなる。
【選択図】図1B
Description
フォトリソグラフィ工程を削減した半導体装置の製造方法を提供する。
第1の実施の形態はトレンチゲートを有するMOS構造の半導体装置の製造方法である。本実施の形態について、図1A、図1Bに基づき説明する。
第2の実施の形態はトレンチゲートを有するMOS構造の半導体装置の製造方法である。本実施の形態について、図3A、図3Bに基づき説明する。
Claims (5)
- 第1導電型基板上に第1導電型エピタキシャル層を形成する工程と、
前記第1導電型エピタキシャル層の表面に、第2導電型ガードリング層を形成するための領域のみ開口部を有するSiN層を形成する工程と、
前記SiN膜の形成された面よりイオン注入を行なうことにより、前記第1導電型エピタキシャル層の表面に、前記第2導電型ガードリング層を形成する工程と、
少なくとも前記開口部に酸化層を形成する工程と、
前記第1導電型エピタキシャル層の表面に、前記第2導電型ガードリング層に隣接して、第2導電型ベース層を形成する工程と、
前記第2導電型ベース層に対しイオン注入を行なうことにより第1導電型拡散層を形成する工程と、
からなることを特徴とする半導体装置の製造方法。 - 第1導電型基板上に第1導電型エピタキシャル層を形成する工程と、
前記第1導電型エピタキシャル層の表面に、第2導電型ガードリング層を形成するための領域のみ開口部を有するSiN層を形成する工程と、
前記SiN膜の形成された面よりイオン注入を行なうことにより、前記第1導電型エピタキシャル層の表面に、前記第2導電型ガードリング層を形成する工程と、
前記SiN膜を膜面方向に対しエッチングを行なう工程と、
少なくとも前記開口部に酸化層を形成する工程と、
前記第1導電型エピタキシャル層の表面に、前記第2導電型ガードリング層に隣接して、第2導電型ベース層を形成する工程と、
前記第2導電型ベース層に対しイオン注入を行なうことにより第1導電型拡散層を形成する工程と、
からなることを特徴とする半導体装置の製造方法。 - 前記SiN膜のエッチングされる長さは、形成される前記半導体装置の耐圧と、前記第2導電型ガードリング層を形成する際のイオン注入におけるドーズ量により定まることを特徴とする請求項2に記載の半導体装置の製造方法。
- 前記酸化層は、熱酸化により形成されることを特徴とする請求項1から3のいずれかに記載の半導体装置の製造方法。
- 前記第2導電型ベース層を形成した後、前記第2導電型ベース層の表面より、前記第1導電型エピタキシャル層に至るまでのトレンチを形成する工程と、
前記トレンチの表面にトレンチ酸化層を形成する工程と、
前記トレンチ酸化層の形成されたトレンチ内部にポリシリコンを埋め込むことによりトレンチゲートを形成する工程と、
を備えたことを特徴とする請求項1から4のいずれかに記載の半導体装置の製造方法。
Priority Applications (1)
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JP2008121353A JP2009010341A (ja) | 2007-05-29 | 2008-05-07 | 半導体装置の製造方法 |
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JP2007141213 | 2007-05-29 | ||
JP2008121353A JP2009010341A (ja) | 2007-05-29 | 2008-05-07 | 半導体装置の製造方法 |
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JP2009010341A true JP2009010341A (ja) | 2009-01-15 |
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JP2008121353A Pending JP2009010341A (ja) | 2007-05-29 | 2008-05-07 | 半導体装置の製造方法 |
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US (1) | US7927952B2 (ja) |
JP (1) | JP2009010341A (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103050404B (zh) * | 2011-10-14 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | 一种mosfet器件沟槽和保护环的制造方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05206471A (ja) * | 1992-01-29 | 1993-08-13 | Toyota Motor Corp | 縦型半導体装置 |
JPH0653316A (ja) * | 1992-07-30 | 1994-02-25 | Nippon Precision Circuits Kk | 半導体装置の製造方法 |
JPH08274313A (ja) * | 1995-03-30 | 1996-10-18 | Toshiba Corp | 半導体装置、およびその製造方法 |
JP2006140372A (ja) * | 2004-11-15 | 2006-06-01 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
Family Cites Families (11)
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KR100212098B1 (ko) * | 1987-09-19 | 1999-08-02 | 가나이 쓰도무 | 반도체 집적회로 장치 및 그 제조 방법과 반도체 집적 회로 장치의 배선기판 및 그 제조 방법 |
US4868135A (en) * | 1988-12-21 | 1989-09-19 | International Business Machines Corporation | Method for manufacturing a Bi-CMOS device |
US5963799A (en) * | 1998-03-23 | 1999-10-05 | Texas Instruments - Acer Incorporated | Blanket well counter doping process for high speed/low power MOSFETs |
US6127247A (en) * | 1998-06-03 | 2000-10-03 | Texas Instruments - Acer Incorporated | Method of eliminating photoresist outgassing in constructing CMOS vertically modulated wells by high energy ion implantation |
US6198131B1 (en) * | 1998-12-07 | 2001-03-06 | United Microelectronics Corp. | High-voltage metal-oxide semiconductor |
WO2000062345A1 (fr) * | 1999-04-09 | 2000-10-19 | Shindengen Electric Manufacturing Co., Ltd. | Dispositif a semi-conducteur haute tension |
TW408472B (en) * | 1999-05-06 | 2000-10-11 | United Microelectronics Corp | The manufacture method for increasing CMOS breakdown voltage |
US6465308B1 (en) * | 2001-05-24 | 2002-10-15 | Taiwan Semiconductor Manufacturing Company | Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implant |
JP2003060072A (ja) * | 2001-08-10 | 2003-02-28 | Seiko Epson Corp | 半導体装置の製造方法及びこれにより製造された半導体装置 |
US7466005B2 (en) * | 2004-03-11 | 2008-12-16 | International Rectifier Corporation | Recessed termination for trench schottky device without junction curvature |
US7375408B2 (en) * | 2005-10-11 | 2008-05-20 | United Microelectronics Corp. | Fabricating method of a high voltage metal oxide semiconductor device |
-
2008
- 2008-05-07 JP JP2008121353A patent/JP2009010341A/ja active Pending
- 2008-05-28 US US12/128,326 patent/US7927952B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05206471A (ja) * | 1992-01-29 | 1993-08-13 | Toyota Motor Corp | 縦型半導体装置 |
JPH0653316A (ja) * | 1992-07-30 | 1994-02-25 | Nippon Precision Circuits Kk | 半導体装置の製造方法 |
JPH08274313A (ja) * | 1995-03-30 | 1996-10-18 | Toshiba Corp | 半導体装置、およびその製造方法 |
JP2006140372A (ja) * | 2004-11-15 | 2006-06-01 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
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US7927952B2 (en) | 2011-04-19 |
US20080299725A1 (en) | 2008-12-04 |
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