JP2007258276A - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device Download PDF

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JP2007258276A
JP2007258276A JP2006077721A JP2006077721A JP2007258276A JP 2007258276 A JP2007258276 A JP 2007258276A JP 2006077721 A JP2006077721 A JP 2006077721A JP 2006077721 A JP2006077721 A JP 2006077721A JP 2007258276 A JP2007258276 A JP 2007258276A
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light emitting
layer
light
film
emitting layer
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JP5048960B2 (en
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Masaharu Yasuda
正治 安田
Nobuyuki Takakura
信之 高倉
Shigehide Chichibu
重英 秩父
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Panasonic Electric Works Co Ltd
University of Tsukuba NUC
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University of Tsukuba NUC
Matsushita Electric Works Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device which can improve light extraction efficiency from a desired light extraction surface. <P>SOLUTION: An anode electrode 5 located on the opposite side to a desired light extraction surface against a light emitting layer 3 is comprised of a first transparent conductive film 51 formed on a p-type semiconductor layer 4; a second transparent conductive film 52 formed on the first transparent conductive film 51; a plurality of multilayer reflection film layers 53 which are formed on the second transparent conductive film 52, and reflect a light radiated from the light emitting layer 3; a metal reflecting film 54 made of a metallic material which is formed in a manner that it may cover a region nor covered by the multilayer reflecting film layers 53 and the multilayer reflecting film layers 53 in the second transparent conductive film 52, and which has a high reflection factor to a light from the light emitting layer 3; a barrier metal film 55 formed on the metal reflecting film 54; and an external connection metal film 56 made of a metallic material which is formed on the barrier metal film 55. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、赤色よりも短波長側に発光ピーク波長を有する半導体発光素子に関するものである。   The present invention relates to a semiconductor light emitting device having an emission peak wavelength on the shorter wavelength side than red.

従来から、酸化物系化合物半導体発光素子や窒化物系化合物半導体発光素子などの半導体発光素子において、発光層から略等方的に放射される光のうち光取り出し面以外の方向に向かう光の一部が電極に吸収されて光取り出し効率が低下するという問題があった。   Conventionally, in a semiconductor light emitting device such as an oxide-based compound semiconductor light-emitting device or a nitride-based compound semiconductor light-emitting device, a portion of light emitted from a light emitting layer in a direction other than the light extraction surface is emitted approximately isotropically. There is a problem that the light extraction efficiency is lowered due to the absorption of the portion by the electrode.

そこで、この種の問題を解決するために、光取り出し面側とは反対側に位置する電極を反射率の高い金属材料により形成することで光取り出し効率を向上させた半導体発光素子が提案されている（例えば、特許文献１，２）。   Therefore, in order to solve this type of problem, a semiconductor light-emitting element has been proposed in which light extraction efficiency is improved by forming an electrode located on the side opposite to the light extraction surface side from a highly reflective metal material. (For example, Patent Documents 1 and 2).

ここにおいて、この種の半導体発光素子としては、例えば、図５に示す構成のものが提案されている。図５に示した構成の半導体発光素子は、発光層（活性層）３などの材料としてＧａＮ系化合物半導体材料を採用した青色発光ダイオードであって、サファイア基板からなるベース基板１の一表面側にバッファ層１０を介して形成されたｎ形半導体層２と、ｎ形半導体層２上に形成された上述の発光層３と、発光層３上に形成されたｐ形半導体層４と、ｐ形半導体層４の表面側に形成されたアノード電極５と、ｎ形半導体層２におけるベース基板１側とは反対の表面側に形成されたカソード電極６とを備え、カソード電極６を、ｎ形半導体層２に対してオーミック接触が可能な金属材料（例えば、Ｔｉなど）からなるオーミックコンタクト層６１と、オーミックコンタクト層６１に積層されたＡｕなどの金属材料からなる外部接続用金属層６２とで構成し、アノード電極５を発光層３から放射される光に対する反射率の高い金属材料（例えば、Ａｇ、銀白色系金属材料、Ａｌなど）からなり反射層を兼ねる反射用金属層５８と、反射用金属層５８に積層されたＡｕなどの金属材料からなる外部接続用金属層５９で構成してある。ここで、上記特許文献１には、反射用金属層５８の材料としてＡｇを採用した場合、反射用金属層５８の膜厚を２０ｎｍよりも大きな値に設定することが記載されている。   Here, as this type of semiconductor light-emitting element, for example, one having the configuration shown in FIG. 5 has been proposed. The semiconductor light emitting device having the configuration shown in FIG. 5 is a blue light emitting diode that employs a GaN-based compound semiconductor material as a material for the light emitting layer (active layer) 3 and the like, on one surface side of the base substrate 1 made of a sapphire substrate. N-type semiconductor layer 2 formed through buffer layer 10, the above-described light-emitting layer 3 formed on n-type semiconductor layer 2, p-type semiconductor layer 4 formed on light-emitting layer 3, and p-type An anode electrode 5 formed on the surface side of the semiconductor layer 4 and a cathode electrode 6 formed on the surface side opposite to the base substrate 1 side in the n-type semiconductor layer 2 are provided. An ohmic contact layer 61 made of a metal material capable of making ohmic contact with the layer 2 (for example, Ti), and an external connection metal layer 62 made of a metal material such as Au laminated on the ohmic contact layer 61. A reflective metal layer 58 made of a metal material (for example, Ag, silver white metal material, Al, etc.) having a high reflectivity with respect to the light emitted from the light emitting layer 3, and the anode electrode 5 also serving as a reflective layer; The external connection metal layer 59 made of a metal material such as Au laminated on the reflection metal layer 58 is formed. Here, Patent Document 1 describes that when Ag is used as the material of the reflective metal layer 58, the thickness of the reflective metal layer 58 is set to a value larger than 20 nm.

図５に示した構成の半導体発光素子では、アノード電極５とカソード電極６との間に順方向バイアス電圧を印加することによってアノード電極５からカソード電極６に向かって電流が流れ、発光層３に注入された電子とホールとが再結合することで発光する。ここで、図５に示した構成の半導体発光素子は、実装基板にフリップチップ実装しベース基板１の他表面を光取り出し面として用いられるものであり、発光層３からｎ形半導体層２側へ放射された光がベース基板１を通して光取り出し面から出射されるとともに、ｐ形半導体層４側へ放射された光が反射用金属層５８で反射されて光取り出し面から出射されることとなる（図５中の矢印Ｃは発光層３から放射され反射用金属層５８で反射された光の伝搬経路の一例を示している）ので、光取り出し効率を高めることができる。   In the semiconductor light emitting device having the configuration shown in FIG. 5, when a forward bias voltage is applied between the anode electrode 5 and the cathode electrode 6, a current flows from the anode electrode 5 toward the cathode electrode 6, and Light is emitted when the injected electrons and holes recombine. Here, the semiconductor light emitting device having the configuration shown in FIG. 5 is flip-chip mounted on a mounting substrate and the other surface of the base substrate 1 is used as a light extraction surface, from the light emitting layer 3 to the n-type semiconductor layer 2 side. The emitted light is emitted from the light extraction surface through the base substrate 1, and the light emitted to the p-type semiconductor layer 4 side is reflected by the reflective metal layer 58 and emitted from the light extraction surface ( The arrow C in FIG. 5 shows an example of a propagation path of light emitted from the light emitting layer 3 and reflected by the reflective metal layer 58), so that the light extraction efficiency can be increased.

上述の図５に示した構成の半導体発光素子は、ベース基板１として絶縁性を有する結晶成長用基板であるサファイア基板を用いており、ベース基板１の上記一表面側にアノード電極５およびカソード電極６が配置されているが、ベース基板１として導電性を有する結晶成長用基板（例えば、導電性を有する単結晶基板、導電性を有する化合物半導体基板など）を用いて当該結晶成長用基板の他表面側にカソード電極を設けたり、結晶成長後にサファイア基板を除去しカソード電極を兼ねる金属基板を貼り付けたりすることで、ｎ型半導体層２と発光層３とｐ形半導体層４とからなる発光部の厚み方向の両側に電極を設けた構成とし、両電極のうちの一方の電極を透光性材料により形成するとともに他方の電極を発光層３からの光を反射する金属材料により形成した半導体発光素子も提案されており、この種の半導体発光素子は、少なくとも一方の電極がボンディングワイヤを介してパッケージの導体パターンと電気的に接続される。
特開平１１−１８６５９８号公報 特開平１１−１９１６４１号公報 In the semiconductor light emitting device having the configuration shown in FIG. 5 described above, a sapphire substrate, which is an insulating crystal growth substrate, is used as the base substrate 1, and the anode electrode 5 and the cathode electrode are formed on the one surface side of the base substrate 1. 6 is used as the base substrate 1, using a conductive crystal growth substrate (for example, a conductive single crystal substrate, a conductive compound semiconductor substrate, or the like) and the crystal growth substrate. Light emission comprising the n-type semiconductor layer 2, the light-emitting layer 3, and the p-type semiconductor layer 4 by providing a cathode electrode on the surface side, or removing a sapphire substrate after crystal growth and attaching a metal substrate that also serves as the cathode electrode. The electrode is provided with electrodes on both sides in the thickness direction, and one of the two electrodes is formed of a translucent material and the other electrode is a gold that reflects light from the light emitting layer 3 Even the semiconductor light emitting element formed of a material have been proposed, the semiconductor light-emitting device of this type, at least one electrode is connected packages and electrically conductive patterns through the bonding wires.
Japanese Patent Laid-Open No. 11-186598 JP 11-191641 A

ところで、図５に示した構成の半導体発光素子では、反射用金属層５８の金属材料としてＡｇ、銀白色系金属材料、Ａｌなどを採用することで発光層３にて発生した光の一部が反射用金属層５８にて反射され光取り出し面から出射されることとなるので、光取り出し効率を高めることができるが、上記金属材料の反射率は９５％以下であり、発光層３からアノード電極５に向かって伝搬する光のうち少なくとも５％はアノード電極５で吸収されて光吸収損失となってしまう。   By the way, in the semiconductor light emitting device having the configuration shown in FIG. 5, a part of the light generated in the light emitting layer 3 is obtained by adopting Ag, silver white metal material, Al or the like as the metal material of the reflective metal layer 58. Since the light is reflected by the reflective metal layer 58 and emitted from the light extraction surface, the light extraction efficiency can be increased. However, the reflectance of the metal material is 95% or less, and the light emitting layer 3 is connected to the anode electrode. At least 5% of the light propagating toward 5 is absorbed by the anode electrode 5 and becomes a light absorption loss.

また、上述のようにｎ型半導体層２と発光層３とｐ形半導体層４とからなる発光部の厚み方向の両側に電極を設けた構成とし、両電極のうちの一方の電極を透光性材料により形成するとともに他方の電極を発光層３からの光を反射する金属材料により形成した半導体発光素子においても上記金属材料により形成した電極において同様の光損失が発生してしまう。   Further, as described above, electrodes are provided on both sides in the thickness direction of the light-emitting portion composed of the n-type semiconductor layer 2, the light-emitting layer 3, and the p-type semiconductor layer 4, and one of the two electrodes is made transparent. Even in a semiconductor light emitting device that is formed of a conductive material and the other electrode is formed of a metal material that reflects light from the light emitting layer 3, the same light loss occurs in the electrode formed of the metal material.

本発明は上記事由に鑑みて為されたものであり、その目的は、所望の光取り出し面からの光取り出し効率の向上を図れる半導体発光素子を提供することにある。   The present invention has been made in view of the above reasons, and an object of the present invention is to provide a semiconductor light emitting device capable of improving the light extraction efficiency from a desired light extraction surface.

請求項１の発明は、ｎ形半導体層と発光層とｐ形半導体層との積層構造を有し、ｐ形半導体層における発光層側とは反対側にアノード電極が形成されるとともに、ｎ形半導体層における発光層の積層側にカソード電極が形成され、発光層の厚み方向において所望の光取り出し面側とは反対側に、複数種類の誘電体膜が周期的に積層されたものであって発光層から放射された光を反射する多層反射膜層を備えてなることを特徴とする。   The invention of claim 1 has a laminated structure of an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer, and an anode electrode is formed on the opposite side of the p-type semiconductor layer from the light-emitting layer side. A cathode electrode is formed on the side of the semiconductor layer where the light emitting layer is laminated, and a plurality of types of dielectric films are periodically laminated on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer. A multilayer reflection film layer that reflects light emitted from the light emitting layer is provided.

この発明によれば、発光層の厚み方向において所望の光取り出し面側とは反対側に、複数種類の誘電体膜が周期的に積層されたものであって発光層から放射された光を反射する多層反射膜層を備えているので、発光層から所望の光取り出し面側とは反対側へ放射された光を、従来の金属材料からなる反射用金属層に比べて効率良く反射することができ、所望の光取り出し面からの光取り出し効率の向上を図れ、発光効率を高めることが可能となる。   According to the present invention, a plurality of types of dielectric films are periodically stacked on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer and reflect light emitted from the light emitting layer. Since the multi-layer reflective film layer is provided, the light radiated from the light emitting layer to the side opposite to the desired light extraction surface side can be efficiently reflected as compared with a reflective metal layer made of a conventional metal material. Therefore, the light extraction efficiency from the desired light extraction surface can be improved, and the light emission efficiency can be increased.

請求項２の発明は、請求項１の発明において、前記多層反射膜層は、屈折率が異なる２種類の前記誘電体膜が交互に積層されたものであり、各誘電体膜は、それぞれ酸化膜もしくは窒化膜からなることを特徴とする。なお、ここにおいて、屈折率の異なる２種類の前記誘電体膜は、酸化膜と窒化膜との組み合わせでもよいし、材料の異なる２種類の酸化膜の組み合わせでもよいし、材料の異なる２種類の窒化膜の組み合わせでもよい。   According to a second aspect of the present invention, in the first aspect of the invention, the multilayer reflective film layer is formed by alternately laminating two types of the dielectric films having different refractive indexes, and each dielectric film is oxidized. It consists of a film or a nitride film. Here, the two types of dielectric films having different refractive indexes may be a combination of an oxide film and a nitride film, a combination of two kinds of oxide films having different materials, or two kinds of materials having different materials. A combination of nitride films may be used.

この発明によれば、２種類の前記誘電体膜それぞれの膜厚を適宜設定することにより、光の干渉効果により反射光を強めることができるとともに反射率を高めることができて、所望の光取り出し面からの光取り出し効率を高めることができ、しかも、前記各誘電体膜を、イオンビーム蒸着法や抵抗加熱蒸着法などの一般的な薄膜形成技術によって容易に形成することが可能となる。   According to the present invention, by appropriately setting the film thickness of each of the two types of dielectric films, the reflected light can be strengthened and the reflectance can be increased due to the light interference effect, and the desired light extraction can be achieved. The light extraction efficiency from the surface can be increased, and the dielectric films can be easily formed by a general thin film forming technique such as ion beam evaporation or resistance heating evaporation.

請求項３の発明は、請求項１または請求項２の発明において、前記多層反射膜層は、複数種類の前記誘電体膜が前記発光層に近い側から離れるにつれて屈折率が大きくなる順に積層されてなることを特徴とする。   According to a third aspect of the present invention, in the first or second aspect of the present invention, the multilayer reflective film layer is laminated in the order in which the refractive index increases as the plurality of types of dielectric films move away from the side closer to the light emitting layer. It is characterized by.

この発明によれば、複数種類の前記誘電体膜は発光層に近い誘電体膜ほど屈折率が小さいので、前記多層反射膜層における反射率を高めることができ、光取り出し効率の向上を図れる。   According to this invention, since the plurality of types of dielectric films have a smaller refractive index as the dielectric film is closer to the light emitting layer, the reflectance in the multilayer reflective film layer can be increased, and the light extraction efficiency can be improved.

請求項４の発明は、請求項１ないし請求項３の発明において、前記多層反射膜層は、前記発光層の発光ピーク波長±３０ｎｍの波長域の光に対して反射率が９５％よりも高くなるように形成されてなることを特徴とする。   According to a fourth aspect of the present invention, in the first to third aspects of the invention, the multilayer reflective film layer has a reflectance higher than 95% with respect to light in a wavelength region of an emission peak wavelength ± 30 nm of the light emitting layer. It is formed so that it may become.

この発明によれば、前記発光層にて発生する光の発光スペクトルの波長域の光を前記多層反射膜層において効率良く反射することができ（つまり、発光ピーク波長の光だけでなく発光ピーク波長付近の光も効率良く反射することができ）、光取り出し効率の向上を図れる。   According to this invention, light in the wavelength region of the emission spectrum of light generated in the light emitting layer can be efficiently reflected by the multilayer reflective film layer (that is, not only light having a light emission peak wavelength but also light emission peak wavelength). Nearby light can also be reflected efficiently), and the light extraction efficiency can be improved.

請求項５の発明は、請求項１ないし請求項４の発明において、前記多層反射膜層は、前記アノード電極と前記カソード電極との２つの電極のうち前記発光層の前記厚み方向において所望の光取り出し面側とは反対側に位置する一方の電極に設けられ、前記発光層に平行な平面上で独立した島状に形成されて複数設けられてなることを特徴とする。   According to a fifth aspect of the present invention, in the first to fourth aspects of the invention, the multilayer reflective film layer has a desired light in the thickness direction of the light emitting layer of the two electrodes of the anode electrode and the cathode electrode. It is provided on one electrode located on the side opposite to the extraction surface side, and is formed in a plurality of independent islands on a plane parallel to the light emitting layer.

この発明によれば、前記多層反射膜層に起因した一方の電極の導電性の低下を抑制することができて、前記多層反射膜層に起因した動作電圧の上昇を抑制することができる。すなわち、この発明によれば、動作電圧の上昇を抑制しつつ光取り出し効率の向上を図れる。   According to this invention, it is possible to suppress a decrease in conductivity of one electrode due to the multilayer reflective film layer, and it is possible to suppress an increase in operating voltage due to the multilayer reflective film layer. That is, according to the present invention, it is possible to improve the light extraction efficiency while suppressing an increase in operating voltage.

請求項６の発明は、請求項１ないし請求項５の発明において、前記多層反射膜層は、前記アノード電極と前記カソード電極との２つの電極のうち前記発光層の前記厚み方向において所望の光取り出し面側とは反対側に位置する一方の電極に設けられ、前記発光層に平行な複数の平面上それぞれにおいて独立した島状に形成されて前記各平面上に複数設けられてなり、前記一方の電極は、前記各平面ごとに前記多層反射膜層の位置をずらしてあることを特徴とする。   According to a sixth aspect of the present invention, in the first to fifth aspects of the invention, the multilayer reflective film layer has a desired light in the thickness direction of the light emitting layer of the two electrodes of the anode electrode and the cathode electrode. Provided on one electrode located on the opposite side to the take-out surface side, formed in an independent island shape on each of a plurality of planes parallel to the light emitting layer, and provided on the respective planes. The electrode is characterized in that the position of the multilayer reflective film layer is shifted for each plane.

この発明によれば、前記多層反射膜層を設ける一方の電極の導電性の低下を抑制しつつ、前記発光層の投影領域内における前記多層反射膜層の占有面積を大きくすることができ、前記一方の電極に入射した光をより効率良く反射することができる。   According to the present invention, it is possible to increase the area occupied by the multilayer reflective film layer in the projection region of the light emitting layer while suppressing a decrease in conductivity of one electrode on which the multilayer reflective film layer is provided, Light incident on one electrode can be reflected more efficiently.

請求項１の発明では、所望の光取り出し面からの光取り出し効率の向上を図れるという効果がある。   In the invention of claim 1, there is an effect that the light extraction efficiency from a desired light extraction surface can be improved.

（実施形態１）
以下、本実施形態の半導体発光素子について図１および図２を参照しながら説明する。 (Embodiment 1)
Hereinafter, the semiconductor light emitting device of this embodiment will be described with reference to FIGS. 1 and 2.

本実施形態の半導体発光素子は、赤色よりも短波長の可視光を放射する可視光発光ダイオードであって、図１に示すように、サファイア基板からなるベース基板１の一表面側（図１（ｂ）における上面側）に窒化ガリウム系化合物半導体層からなるｎ形半導体層２が形成され、ｎ形半導体層２上に３族窒化物半導体層からなる発光層３が形成され、発光層３上に窒化ガリウム系化合物半導体層からなるｐ形半導体層４が形成されている。要するに、本実施形態の半導体発光素子は、ベース基板１の上記一表面側にｎ形半導体層２と発光層３とｐ形半導体層４との積層構造を有している。なお、ｎ形半導体層２、発光層３、およびｐ形半導体層４は、ベース基板１の上記一表面側にＭＯＶＰＥ法のようなエピタキシャル成長技術を利用して成膜するので、ｎ形半導体層２の貫通転位を低減するとともにｎ形半導体層２の残留歪みを低減するために、ベース基板１とｎ形半導体層２との間にバッファ層を設けることが望ましいのは勿論である。また、図１に示した例では、ベース基板１の上記一表面側の最表面側が露出しているが、最表面側にＳｉＯ２膜やＳｉ３Ｎ４膜などの保護膜を形成してもよい。 The semiconductor light emitting device of this embodiment is a visible light emitting diode that emits visible light having a shorter wavelength than red, and as shown in FIG. 1, is one surface side of a base substrate 1 made of a sapphire substrate (FIG. 1 ( An n-type semiconductor layer 2 made of a gallium nitride-based compound semiconductor layer is formed on the upper surface side in b), and a light-emitting layer 3 made of a group III nitride semiconductor layer is formed on the n-type semiconductor layer 2. A p-type semiconductor layer 4 made of a gallium nitride compound semiconductor layer is formed. In short, the semiconductor light emitting device of this embodiment has a stacked structure of the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 on the one surface side of the base substrate 1. Note that the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 are formed on the one surface side of the base substrate 1 by using an epitaxial growth technique such as the MOVPE method. Needless to say, it is desirable to provide a buffer layer between the base substrate 1 and the n-type semiconductor layer 2 in order to reduce the threading dislocation of the n-type semiconductor layer 2 and the residual strain of the n-type semiconductor layer 2. In the example shown in FIG. 1, the outermost surface side of the one surface side of the base substrate 1 is exposed, but a protective film such as a SiO 2 film or a Si 3 N 4 film may be formed on the outermost surface side. Good.

また、本実施形態の半導体発光素子は、ｐ形半導体層４における発光層３側とは反対側にアノード電極５が形成されるとともに、ｎ形半導体層２における発光層３の積層側にカソード電極６が形成されている。さらに説明すれば、アノード電極５は、ｐ形半導体層４上に形成され、カソード電極６は、ベース基板１の上記一表面側へｎ形半導体層２、発光層３、ｐ形半導体層４を順次成長させた後で、ｎ形半導体層２と発光層３とｐ形半導体層４との積層膜の所定領域をｐ形半導体層４の表面側からｎ形半導体層２の途中までエッチングすることにより露出させたｎ形半導体層２の表面に形成されている。   In the semiconductor light emitting device of this embodiment, the anode electrode 5 is formed on the opposite side of the p-type semiconductor layer 4 to the light emitting layer 3 side, and the cathode electrode is formed on the stacked side of the light emitting layer 3 in the n-type semiconductor layer 2. 6 is formed. More specifically, the anode electrode 5 is formed on the p-type semiconductor layer 4, and the cathode electrode 6 has the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 on the one surface side of the base substrate 1. After sequentially growing, a predetermined region of the laminated film of the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 is etched from the surface side of the p-type semiconductor layer 4 to the middle of the n-type semiconductor layer 2. The n-type semiconductor layer 2 is exposed on the surface.

ここにおいて、本実施形態の半導体発光素子は、ベース基板１の平面視形状が矩形状であって、図１（ａ）に示すように、カソード電極６およびアノード電極５の平面視形状が櫛形状の形状に形成されており、平面視においてカソード電極６とアノード電極５とが互いに入り組んでいる。   Here, in the semiconductor light emitting device of this embodiment, the planar view shape of the base substrate 1 is rectangular, and the planar view shapes of the cathode electrode 6 and the anode electrode 5 are comb shapes as shown in FIG. The cathode electrode 6 and the anode electrode 5 are intertwined with each other in plan view.

発光層３の結晶材料としては、例えば、ＩｎＧａＮ，ＡｌＩｎＧａＮ，ＡｌＩｎＮ，ＡｌＧａＮなどを採用すればよく、３族元素の組成比を適宜設定したり、あるいは、Ｓｉ，Ｇｅ，Ｓ，Ｓｅなどのｎ形不純物やＺｎ，Ｍｇなどのｐ形不純物を適宜ドーピングすることによって、発光色を赤色よりも短波長の可視光域内の所望の色に設定することが可能である。ここにおいて、本実施形態の半導体発光素子では、アノード電極５とカソード電極６との間に順方向バイアス電圧を印加することにより、アノード電極５からカソード電極６に向かって電流が流れ、発光層３に注入された電子とホールとが再結合することで発光する。   As the crystal material of the light emitting layer 3, for example, InGaN, AlInGaN, AlInN, AlGaN or the like may be adopted, or the composition ratio of the group 3 elements may be set as appropriate, or n-type such as Si, Ge, S, Se, or the like. By appropriately doping impurities and p-type impurities such as Zn and Mg, it is possible to set the emission color to a desired color in the visible light range shorter than red. Here, in the semiconductor light emitting device of this embodiment, by applying a forward bias voltage between the anode electrode 5 and the cathode electrode 6, a current flows from the anode electrode 5 toward the cathode electrode 6, and the light emitting layer 3. Light is emitted by recombination of electrons and holes injected into.

ｎ形半導体層２に電気的に接続されるカソード電極６は、ｎ形半導体層２に対してオーミック接触が可能な金属材料からなるオーミックコンタクト膜６１と、オーミックコンタクト膜６１に積層された金属材料からなる外部接続用金属膜６２とで構成されている。ここにおいて、オーミックコンタクト膜６１の金属材料としては、例えば、Ｔｉ，Ｖ，Ａｌやこれらのいずれか一種類の金属を含む合金などを採用すればよく、外部接続用金属膜６２の金属材料としては、化学的に安定でボンディングが容易なＡｕなどを採用すればよい。   The cathode electrode 6 electrically connected to the n-type semiconductor layer 2 includes an ohmic contact film 61 made of a metal material capable of making ohmic contact with the n-type semiconductor layer 2 and a metal material laminated on the ohmic contact film 61. It is comprised with the metal film 62 for external connection which consists of. Here, as the metal material of the ohmic contact film 61, for example, Ti, V, Al, or an alloy containing any one of these metals may be employed, and the metal material of the external connection metal film 62 may be used. Alternatively, Au that is chemically stable and easy to bond may be used.

ところで、本実施形態の半導体発光素子は、発光層３にて発光する光に対して透明な材料（本実施形態では、サファイア）により形成されたベース基板１の他表面（図１（ｂ）の下面）を所望の光取り出し面とするものであり、アノード電極５は、ｐ形半導体層４上に形成された第１の透明導電膜５１と、第１の透明導電膜５１上に形成された第２の透明導電膜５２と、第２の透明導電膜５２上に形成され発光層３から放射された光を反射する複数の多層反射膜層５３と、第２の透明導電膜５２において多層反射膜層５３により覆われていない部位および多層反射膜層５３を覆うように形成され発光層３からの光に対して高い反射率を有する金属材料からなる金属反射膜５４と、金属反射膜５４上に形成されたバリアメタル膜５５と、バリアメタル膜５５上に形成された金属材料からなる外部接続用金属膜５６とで構成されている。要するに、本実施形態の半導体発光素子は、発光層３の厚み方向において所望の光取り出し面側とは反対側に、発光層３から放射された光を反射する多層反射膜層５３を備えており、発光層３から所望の光取り出し面側とは反対側に放射されてアノード電極５に入射した光は多層反射膜層５３もしくは金属反射膜５４により光取り出し面側へ反射されることとなる（なお、図１（ｂ）中の矢印Ｃは発光層３から放射され多層反射膜層５３で反射された光の伝搬経路の一例を示している）。なお、本実施形態の半導体発光素子では、複数の多層反射膜層５３と金属反射膜５４とで発光層３からの光を所望の光取り出し面側へ反射する反射部を構成している。   By the way, the semiconductor light emitting device of the present embodiment has the other surface of the base substrate 1 (of FIG. 1B) formed of a material transparent to light emitted from the light emitting layer 3 (sapphire in the present embodiment). The lower surface is a desired light extraction surface, and the anode electrode 5 is formed on the first transparent conductive film 51 and the first transparent conductive film 51 formed on the p-type semiconductor layer 4. The second transparent conductive film 52, the plurality of multilayer reflective film layers 53 that are formed on the second transparent conductive film 52 and reflect the light emitted from the light emitting layer 3, and the second transparent conductive film 52 has the multilayer reflection A metal reflective film 54 made of a metal material that is formed so as to cover a portion not covered with the film layer 53 and the multilayer reflective film layer 53 and has a high reflectance with respect to the light from the light emitting layer 3, and the metal reflective film 54 Barrier metal film 55 formed on the And an external connection metal layer 56 made of a metal material and formed on barrel film 55. In short, the semiconductor light emitting device of this embodiment includes the multilayer reflective film layer 53 that reflects the light emitted from the light emitting layer 3 on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer 3. The light emitted from the light emitting layer 3 to the side opposite to the desired light extraction surface side and incident on the anode electrode 5 is reflected to the light extraction surface side by the multilayer reflection film layer 53 or the metal reflection film 54 ( In addition, the arrow C in FIG.1 (b) has shown an example of the propagation path of the light radiated | emitted from the light emitting layer 3, and reflected by the multilayer reflective film layer 53). In the semiconductor light emitting device of this embodiment, the plurality of multilayer reflective film layers 53 and the metal reflective film 54 constitute a reflective part that reflects light from the light emitting layer 3 toward the desired light extraction surface.

上述の第１の透明導電膜５１は、膜厚を２〜１０ｎｍの範囲に設定してあるので、当該第１の透明導電膜５１の材料としては、例えば、Ｎｉ，Ｐｄ，Ｐｔ，Ｃｒ，Ｍｎ，Ｔａ，Ｃｕ，Ｆｅの単体、あるいは、これらのいずれか一種を含む合金などを採用することができる。また、第２の透明導電膜５２の材料としては、発光層３からの光に対して透明な材料を採用すればよく、例えば、ＩＴＯ，ＩＺＯ，ＺｎＯ，Ｉｎ２Ｏ３，ＳｎＯ２，ＭｇｘＺｎ１−ｘＯ（ｘ≦０．５），アモルファスＡｌＧａＮ，ＧａＮ，ＳｉＯＮの群から選択される１つの材料を採用すればよい。また、金属反射膜５４の材料としては、Ａｇを採用しているが、Ａｇに限らず、Ａｌ，Ｒｈなどを採用してもよい。また、外部接続用金属膜５６の金属材料としては、化学的に安定でボンディングが容易なＡｕなどを採用しており、バリアメタル膜５５の材料としては、Ｔｉを採用している。 Since the film thickness of the first transparent conductive film 51 is set in the range of 2 to 10 nm, examples of the material of the first transparent conductive film 51 include Ni, Pd, Pt, Cr, and Mn. , Ta, Cu, Fe, or an alloy containing any one of them can be employed. Further, as the material of the second transparent conductive film 52, a material transparent to the light from the light emitting layer 3 may be employed. For example, ITO, IZO, ZnO, In 2 O 3 , SnO 2 , Mg x One material selected from the group consisting of Zn 1-x O (x ≦ 0.5), amorphous AlGaN, GaN, and SiON may be adopted. Further, although Ag is adopted as the material of the metal reflective film 54, it is not limited to Ag, and Al, Rh, or the like may be adopted. Further, as the metal material of the external connection metal film 56, Au or the like that is chemically stable and easy to bond is adopted, and as the material of the barrier metal film 55, Ti is adopted.

上述の各多層反射膜層５３は、平面形状が円形状に形成され、第２の透明導電膜５２上で分散して配置されている（２次元アレイ状に配列されている）。さらに説明すれば、単位格子が正方形の仮想的な２次元正方格子の各格子点に対応する各部位に多層反射膜層５３が配置されている。要するに、本実施形態におけるアノード電極５は、多層反射膜層５３が発光層３に平行な平面上で独立した島状に形成されて複数設けられている。   Each of the multilayer reflective film layers 53 described above has a planar shape formed in a circular shape, and is distributed on the second transparent conductive film 52 (arranged in a two-dimensional array). More specifically, the multilayer reflective film layer 53 is disposed at each portion corresponding to each lattice point of a virtual two-dimensional square lattice having a square unit lattice. In short, the anode electrode 5 in the present embodiment is provided with a plurality of multilayer reflective film layers 53 formed in an independent island shape on a plane parallel to the light emitting layer 3.

ここにおいて、多層反射膜層５３は、図２に示すように、絶縁性を有し屈折率の異なる２種類の誘電体膜５３ａ，５３ｂが周期的に積層されている。各誘電体膜５３ａ，５３ｂは、それぞれ酸化膜もしくは窒化膜により構成すればよく、酸化膜や窒化膜により構成することにより、各誘電体膜５３ａ，５３ｂを、イオンビーム蒸着法や抵抗加熱蒸着法などの一般的な薄膜形成技術によって容易に形成することが可能となる。この種の酸化膜の材料としては、例えば、ＳｉＯ２，ＺｒＯ２，ＴｉＯ２，Ａｌ２Ｏ３などを採用し、この種の窒化膜の材料としては、例えば、Ｓｉ３Ｎ４，ＡｌＮなどを採用すればよい。 Here, as shown in FIG. 2, the multilayer reflective film layer 53 is formed by periodically laminating two kinds of dielectric films 53a and 53b having insulating properties and different refractive indexes. Each of the dielectric films 53a and 53b may be formed of an oxide film or a nitride film. By forming the dielectric films 53a and 53b with an oxide film or a nitride film, each of the dielectric films 53a and 53b is formed by an ion beam evaporation method or a resistance heating evaporation method. It can be easily formed by a general thin film forming technique such as. For example, SiO 2 , ZrO 2 , TiO 2 , Al 2 O 3 or the like is adopted as a material for this type of oxide film, and for example, Si 3 N 4 , AlN or the like is used as a material for this type of nitride film. Adopt it.

上述の多層反射膜層５３は、発光層３の発光波長λ（ｎｍ）に応じて各誘電体膜５３ａ，５３ｂの膜厚、屈折率、および層数を適宜設定することにより、反射率（％）とストップバンド幅（ｎｍ）とを調整することができる。ここで、各誘電体膜５３ａ，５３ｂそれぞれの単層膜の膜厚について、単層膜の膜厚をＤ（ｎｍ）、単層膜の屈折率をｎとすれば、膜厚Ｄは、
（Ｄ×ｎ）／（２ｍ−１）＝λ／４ （ただし、ｍ＝１，２，・・・）
の関係式から求められる。この関係式は、屈折率ｎの媒質Ｘ１の入射面へ入射した光のうち媒質Ｘ１中へ屈折し上記入射面に平行な面であって媒質Ｘ１と当該媒質Ｘ１に接する媒質Ｘ２との界面で反射された後に媒質Ｘ１から出た光と、媒質Ｘ１の上記入射面へ入射した光のうち上記入射面で反射された光との位相が一致し、同位相の光どうしの干渉により反射光の強度が強くなることを意味している。ただし、ここでは、上記媒質Ｘ１を上述の２つの単層膜を１ペア（誘電体膜５３ａと誘電体膜５３ｂとを１ペア）として考えているので、単層膜だけに着目すると、上記関係式のように光の位相が反転するように設計することになる。 The multilayer reflective film layer 53 described above has a reflectivity (%) by appropriately setting the film thickness, refractive index, and number of layers of the dielectric films 53a and 53b in accordance with the light emission wavelength λ (nm) of the light emitting layer 3. ) And the stop bandwidth (nm) can be adjusted. Here, regarding the film thickness of each of the dielectric films 53a and 53b, if the film thickness of the single film is D (nm) and the refractive index of the single film is n, the film thickness D is
(D × n) / (2m−1) = λ / 4 (where m = 1, 2,...)
It is obtained from the relational expression. This relational expression is a surface parallel to the incident surface of light incident on the incident surface of the medium X1 having a refractive index n and parallel to the incident surface, and is an interface between the medium X1 and the medium X2 in contact with the medium X1. The phase of the light emitted from the medium X1 after being reflected and the light reflected on the incident surface out of the light incident on the incident surface of the medium X1 is the same, and the reflected light is reflected by the interference between the lights having the same phase. It means that the strength becomes stronger. However, here, the medium X1 is considered as one pair of the above-mentioned two single layer films (a pair of the dielectric film 53a and the dielectric film 53b). The design is such that the phase of the light is inverted as in the equation.

例えば、発光層３の発光ピーク波長が４７０ｎｍの場合、上述の関係式において、ｍ＝１として、一方の誘電体膜５３ａの材料をＳｉＯ２とすると、上記一方の誘電体膜５３ａの膜厚は、ＳｉＯ２の屈折率を１．４３として略８２ｎｍに設計すればよく、他方の誘電体膜５３ｂの材料をＺｒＯ２とすると、上記他方の誘電体膜５３ｂの膜厚は、ＺｒＯ２の屈折率を１．８９として略６２ｎｍとなる。ここで、多層反射膜層５３の設計にあたって、ＳｉＯ２からなる誘電体膜５３ａとＺｒＯ２からなる誘電体膜５３ｂとの積層膜を１ペアとして、当該積層膜のペア数と反射率との関係をシミュレーションしたところ、ペア数を少なくとも８とすることにより、波長λが４７０ｎｍの光に対して９５％よりも高い反射率となることが確認され、ペア数を８としたときの反射率の波長依存性をシミュレーションしたところ、発光層３の発光ピーク波長を基準として±３０ｎｍの波長域において反射率が９５％よりも高くなることが確認された（ストップバンド幅が６０ｎｍとなることが確認された）。なお、上述のシミュレーション結果は多層反射膜層５３に発光層３からの光が垂直入射した場合の値であるが、半導体発光素子の光取り出し面と空気もしくは封止材との界面の凹凸や、屈折率差によって生じるエスケープコーンの影響などにより、多層反射膜層５３に垂直に入射する光強度に比べて、入射面とのなす角度が９０度からある角度傾いた方向から多層反射膜層５３に入射する光強度のほうが強くなるという状況が起こり得る。このような場合には、誘電体膜５３ａ，５３ｂそれぞれの膜厚を、光強度が最大になる入射角に応じて設計すればよいことは勿論である。要するに、上記媒質Ｘ１の入射面で反射される光と、上記媒質Ｘ１に入射してから上記媒質Ｘ１と上記媒質Ｘ２との界面で反射された後に上記媒質Ｘ１から出た光との光路差の計算を、多層反射膜層５３に入射する光強度が最大になる入射角にて行えばよい。 For example, if the emission peak wavelength of the emission layer 3 is 470 nm, in the above equation, as m = 1, when the material of one of the dielectric film 53a and SiO 2, the thickness of one of the dielectric film 53a above may be designed to substantially 82nm refractive index of SiO 2 as 1.43, when the material of the other of the dielectric film 53b and ZrO 2, the thickness of the other dielectric film 53b, the refractive index of the ZrO 2 Is 1.89 and is approximately 62 nm. Here, in designing the multilayer reflective film layer 53, the laminated film of the dielectric film 53 a made of SiO 2 and the dielectric film 53 b made of ZrO 2 is regarded as one pair, and the relationship between the number of pairs of the laminated film and the reflectance. As a result of simulation, it was confirmed that the reflectance was higher than 95% for light having a wavelength λ of 470 nm by setting the number of pairs to at least 8, and the wavelength of the reflectance when the number of pairs was 8 was confirmed. When the dependence was simulated, it was confirmed that the reflectance was higher than 95% in the wavelength region of ± 30 nm with reference to the emission peak wavelength of the light emitting layer 3 (the stop bandwidth was confirmed to be 60 nm). ). In addition, although the above-mentioned simulation result is a value when the light from the light emitting layer 3 is perpendicularly incident on the multilayer reflective film layer 53, the unevenness of the interface between the light extraction surface of the semiconductor light emitting element and air or the sealing material, Due to the influence of the escape cone caused by the difference in refractive index, the angle formed between the incident surface and the incident surface is inclined from an angle of 90 degrees relative to the light intensity perpendicularly incident on the multilayer reflective film layer 53. A situation can occur where the incident light intensity is stronger. In such a case, it is a matter of course that the thickness of each of the dielectric films 53a and 53b may be designed according to the incident angle at which the light intensity is maximized. In short, the optical path difference between the light reflected by the incident surface of the medium X1 and the light that has entered the medium X1 and then exited from the medium X1 after being reflected at the interface between the medium X1 and the medium X2 The calculation may be performed at an incident angle at which the light intensity incident on the multilayer reflective film layer 53 is maximized.

以上説明した本実施形態の半導体発光素子では、発光層３の厚み方向において所望の光取り出し面側とは反対側に、２種類の誘電体膜５３ａ，５３ｂが周期的に積層されたものであって発光層３から放射された光を反射する複数の多層反射膜層５３と金属反射膜５４とで反射部を構成しているので、発光層３から所望の光取り出し面側とは反対側へ放射された光を、従来の金属材料からなる反射用金属層５８（図５参照）に比べて効率良く反射することができ、所望の光取り出し面からの光取り出し効率の向上を図れ、発光効率を高めることが可能となる。また、本実施形態の半導体発光素子は、上述のように多層反射膜層５３が、屈折率が異なる２種類の誘電体膜５３ａ，５３ｂが交互に積層されたものであるから、２種類の誘電体膜５３ａ，５３ｂそれぞれの膜厚を適宜設定することにより、光の干渉効果により反射光を強めることができるとともに反射率を高めることができ、所望の光取り出し面からの光取り出し効率を高めることができる。ここで、各多層反射膜層５３が発光層３の発光ピーク波長を基準として±３０ｎｍの波長域において９５％よりも高い反射率を有するように各多層反射膜層５３を設計すれば、多層反射膜層５３において、発光スペクトルの半値全幅が４０ｎｍ程度の発光層３にて発生する光の発光スペクトルの波長域の光を多層反射膜層５３において効率良く反射することができ（つまり、発光ピーク波長の光だけでなく発光ピーク波長付近の光も効率良く反射することができ）、光取り出し効率の向上を図れる。   In the semiconductor light emitting device of the present embodiment described above, two types of dielectric films 53a and 53b are periodically stacked on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer 3. Since the reflective portion is constituted by the plurality of multilayer reflective film layers 53 that reflect the light emitted from the light emitting layer 3 and the metal reflective film 54, the light emitting layer 3 is directed to the side opposite to the desired light extraction surface side. The emitted light can be reflected more efficiently than the reflective metal layer 58 (see FIG. 5) made of a conventional metal material, the light extraction efficiency from the desired light extraction surface can be improved, and the light emission efficiency Can be increased. In the semiconductor light emitting device of this embodiment, the multilayer reflective film layer 53 is formed by alternately stacking two types of dielectric films 53a and 53b having different refractive indexes as described above. By appropriately setting the film thickness of each of the body films 53a and 53b, the reflected light can be strengthened by the light interference effect and the reflectance can be increased, and the light extraction efficiency from the desired light extraction surface can be increased. Can do. Here, if each multilayer reflective film layer 53 is designed so that each multilayer reflective film layer 53 has a reflectance higher than 95% in a wavelength region of ± 30 nm with reference to the emission peak wavelength of the light emitting layer 3, the multilayer reflective film layer 53 is designed. In the film layer 53, light in the wavelength region of the emission spectrum of light generated in the light emitting layer 3 having a full width at half maximum of the emission spectrum of about 40 nm can be efficiently reflected by the multilayer reflective film layer 53 (that is, the emission peak wavelength). Light in the vicinity of the emission peak wavelength can be efficiently reflected), and the light extraction efficiency can be improved.

また、本実施形態の半導体発光素子では、多層反射膜層５３が、アノード電極５とカソード電極６との２つの電極のうち発光層３の厚み方向において所望の光取り出し面側とは反対側に位置する一方の電極であるアノード電極５に設けられ、発光層３に平行な平面上で独立した島状に形成されて複数設けられているので、多層反射膜層５３に起因したアノード電極５の導電性の低下を抑制することができて、多層反射膜層５３に起因した動作電圧の上昇を抑制することができるから、動作電圧の上昇を抑制しつつ光取り出し効率の向上を図れる。   Further, in the semiconductor light emitting device of this embodiment, the multilayer reflective film layer 53 is on the opposite side to the desired light extraction surface side in the thickness direction of the light emitting layer 3 of the two electrodes of the anode electrode 5 and the cathode electrode 6. Provided in the anode electrode 5 that is one of the electrodes positioned and formed in a plurality of independent islands on a plane parallel to the light emitting layer 3, the anode electrode 5 resulting from the multilayer reflective film layer 53 is provided. Since the decrease in conductivity can be suppressed and the increase in operating voltage due to the multilayer reflective film layer 53 can be suppressed, the light extraction efficiency can be improved while suppressing the increase in operating voltage.

ところで、上述の実施形態では、多層反射膜層５３を２種類の誘電体膜５３ａ，５３ｂを周期的に積層した構成を有しているが、２種類に限らず、複数種類（例えば、３種類）の誘電体膜を周期的に積層した構成としてもよい。いずれにしても、多層反射膜層５３を、複数種類の誘電体膜が発光層３に近い側から離れるにつれて屈折率が大きくなる順に積層された構造とすることにより、多層反射膜層５３と多層反射膜層５３の下地層である第２の透明導電膜５２との界面での光の散乱を防止でき、多層反射膜層５３における反射率を高めることができ、光取り出し効率の向上を図れる。   By the way, in the above-described embodiment, the multilayer reflective film layer 53 has a configuration in which two types of dielectric films 53a and 53b are periodically stacked. However, the configuration is not limited to two types, but a plurality of types (for example, three types). ) Dielectric films may be periodically laminated. In any case, the multilayer reflective film layer 53 has a structure in which a plurality of types of dielectric films are stacked in the order in which the refractive index increases as the distance from the side closer to the light emitting layer 3 increases. Light scattering at the interface with the second transparent conductive film 52 that is the base layer of the reflective film layer 53 can be prevented, the reflectance in the multilayer reflective film layer 53 can be increased, and the light extraction efficiency can be improved.

（実施形態２）
本実施形態の半導体発光素子は、実施形態１と同様に、赤色よりも短波長の可視光を放射する可視光発光ダイオードであって、図３に示すように、ｎ形ＳｉＣ基板からなるベース基板１の一表面側（図３（ｂ）における上面側）に窒化ガリウム系化合物半導体層からなるｎ形半導体層２が形成され、ｎ形半導体層２上に３族窒化物半導体層からなる発光層３が形成され、発光層３上に窒化ガリウム系化合物半導体層からなるｐ形半導体層４が形成されている。要するに、本実施形態の半導体発光素子も、実施形態１と同様に、ベース基板１の上記一表面側にｎ形半導体層２と発光層３とｐ形半導体層４との積層構造を有している。ここで、ｎ形半導体層２、発光層３、およびｐ形半導体層４は、ベース基板１の上記一表面側にＭＯＶＰＥ法のようなエピタキシャル成長技術を利用して成膜するので、ｎ形半導体層２の貫通転位を低減するとともにｎ形半導体層２の残留歪みを低減するために、ベース基板１とｎ形半導体層２との間にバッファ層を設けることが望ましいのは勿論である。なお、実施形態１と同様の構成要素には同一の符号を付して説明を適宜省略する。 (Embodiment 2)
The semiconductor light emitting device of this embodiment is a visible light emitting diode that emits visible light having a wavelength shorter than that of red, as in the first embodiment, and is a base substrate made of an n-type SiC substrate as shown in FIG. 1 is formed with an n-type semiconductor layer 2 made of a gallium nitride-based compound semiconductor layer on one surface side (the upper surface side in FIG. 3B), and a light emitting layer made of a group 3 nitride semiconductor layer on the n-type semiconductor layer 2 3 is formed, and a p-type semiconductor layer 4 made of a gallium nitride-based compound semiconductor layer is formed on the light emitting layer 3. In short, the semiconductor light emitting device of this embodiment also has a stacked structure of the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 on the one surface side of the base substrate 1 as in the first embodiment. Yes. Here, since the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 are formed on the one surface side of the base substrate 1 using an epitaxial growth technique such as the MOVPE method, the n-type semiconductor layer is formed. Of course, it is desirable to provide a buffer layer between the base substrate 1 and the n-type semiconductor layer 2 in order to reduce the threading dislocation of 2 and the residual strain of the n-type semiconductor layer 2. In addition, the same code | symbol is attached | subjected to the component similar to Embodiment 1, and description is abbreviate | omitted suitably.

ところで、実施形態１では、ベース基板１として絶縁性を有するサファイア基板を用いていたのに対して、本実施形態では導電性を有するｎ形ＳｉＣ基板を用いており、ｐ形半導体層４における発光層３側とは反対側にアノード電極５が形成されるとともに、ｎ形半導体層２における発光層３側とは反対側にカソード電極６が形成されている。ただし、カソード電極６は、ベース基板１の他表面（図３（ｂ）における下面）に形成されている。したがって、実施形態１のようにｐ形半導体層４の一部をエッチングした構造を採用する必要はない。   In the first embodiment, an insulating sapphire substrate is used as the base substrate 1, whereas in this embodiment, a conductive n-type SiC substrate is used, and light emission in the p-type semiconductor layer 4 occurs. An anode electrode 5 is formed on the side opposite to the layer 3 side, and a cathode electrode 6 is formed on the side of the n-type semiconductor layer 2 opposite to the light emitting layer 3 side. However, the cathode electrode 6 is formed on the other surface of the base substrate 1 (the lower surface in FIG. 3B). Therefore, it is not necessary to employ a structure in which a part of the p-type semiconductor layer 4 is etched as in the first embodiment.

また、本実施形態では、カソード電極６とアノード電極５との２つの電極のうちアノード電極５側を光取り出し面側としており、発光層３に対して所望の光取り出し面側とは反対側に位置するカソード電極６に後述の複数の多層反射膜層６４および複数の多層反射膜層６６を設けてある。   In the present embodiment, the anode electrode 5 side of the two electrodes of the cathode electrode 6 and the anode electrode 5 is the light extraction surface side, and the light emission layer 3 is on the side opposite to the desired light extraction surface side. A plurality of multilayer reflective film layers 64 and a plurality of multilayer reflective film layers 66 described later are provided on the cathode electrode 6 positioned.

本実施形態におけるアノード電極５は、ｐ形半導体層４上に形成された透明導電膜１５１と、透明導電膜１５１上で島状に形成された３つの金属膜１５４と、各金属膜１５４上に形成された３つのバリアメタル膜５５と、各バリアメタル膜５５上に形成された３つの外部接続用金属膜５６とで構成されている。要するに、アノード電極５は、ワイヤボンディングが可能な外部接続用金属膜５６が３つ設けられ、透明導電膜１５１と各外部接続用金属膜５６との間に金属膜１５４とバリアメタル膜５５との積層膜が介在しており、透明導電膜１５１の露出表面が所望の光取り出し面となっている。ここにおいて、本実施形態では、透明導電膜１５１がＭｇをドープしたＺｎＯ薄膜により構成されており、透明導電膜１５１の膜厚は例えば２〜１０ｎｍの範囲で設定すればよい。また、本実施形態では、金属膜１５４の材料としてＮｉを採用し当該金属膜１５４の膜厚を５０ｎｍに設定し、バリアメタル膜５５の材料としてＴｉを採用し当該バリアメタル膜５５の膜厚を５０ｎｍに設定し、外部接続用金属膜５６の材料としてＡｕを採用し当該外部接続用金属膜５６の膜厚を５００ｎｍに設定してあるが、これらの材料や膜厚は特に限定するものではない。
カソード電極６は、ベース基板１の上記他表面側に積層された第１の透明導電膜６３と、第１の透明導電膜６３におけるベース基板１側とは反対側に形成された複数の島状の多層反射膜層６４と、第１の透明導電膜６３におけるベース基板１側とは反対側で第１の透明導電膜６３のうち多層反射膜層６４が積層されていない部位および各多層反射膜層６４を覆う形で形成された第２の透明導電膜６５と、第２の透明導電膜６５におけるベース基板１側とは反対側に形成された複数の島状の多層反射膜層６６と、第２の透明導電膜６５におけるベース基板１側とは反対側で第２の透明導電膜６５のうち多層反射膜層６６が積層されていない部位および各多層反射膜層６６を覆う形で形成されたバリアメタル膜６７と、バリアメタル膜６７に積層された外部接続用金属膜６２とで構成されている。ここにおいて、本実施形態では、第１の透明導電膜６３および第２の透明導電膜６５がＩＴＯ薄膜により構成されており、透明導電膜６３，６５の膜厚は例えば２〜１０ｎｍの範囲で設定すればよい。また、本実施形態では、バリアメタル膜６７の材料としてＴｉを採用し当該バリアメタル膜６７の膜厚を５０ｎｍに設定し、外部接続用金属膜６２の材料としてＡｕを採用し当該外部接続用金属膜６２の膜厚を５００ｎｍに設定してあるが、これらの材料や膜厚は特に限定するものではない。また、各多層反射膜層６４，６６は、実施形態１の多層反射膜層５３と同様に屈折率の異なる複数種類の誘電体膜を交互に積層した構成とすればよい。 The anode electrode 5 in this embodiment includes a transparent conductive film 151 formed on the p-type semiconductor layer 4, three metal films 154 formed in an island shape on the transparent conductive film 151, and the metal films 154. The three barrier metal films 55 are formed, and three external connection metal films 56 are formed on the respective barrier metal films 55. In short, the anode electrode 5 is provided with three external connection metal films 56 capable of wire bonding, and the metal film 154 and the barrier metal film 55 are interposed between the transparent conductive film 151 and each external connection metal film 56. The laminated film is interposed, and the exposed surface of the transparent conductive film 151 is a desired light extraction surface. Here, in this embodiment, the transparent conductive film 151 is composed of a ZnO thin film doped with Mg, and the film thickness of the transparent conductive film 151 may be set in the range of 2 to 10 nm, for example. In the present embodiment, Ni is used as the material of the metal film 154, the film thickness of the metal film 154 is set to 50 nm, Ti is used as the material of the barrier metal film 55, and the film thickness of the barrier metal film 55 is increased. The thickness is set to 50 nm, Au is adopted as the material of the external connection metal film 56, and the thickness of the external connection metal film 56 is set to 500 nm. However, these materials and film thickness are not particularly limited. .
The cathode electrode 6 includes a first transparent conductive film 63 stacked on the other surface side of the base substrate 1 and a plurality of island shapes formed on the opposite side of the first transparent conductive film 63 from the base substrate 1 side. Of the first transparent conductive film 63 on the side opposite to the base substrate 1 side of the first transparent conductive film 63 and the multilayer reflective film. A second transparent conductive film 65 formed so as to cover the layer 64, and a plurality of island-like multilayer reflective film layers 66 formed on the opposite side of the second transparent conductive film 65 from the base substrate 1 side; The second transparent conductive film 65 is formed on the opposite side of the second transparent conductive film 65 from the base substrate 1 side so as to cover the portion of the second transparent conductive film 65 where the multilayer reflective film layer 66 is not laminated and each multilayer reflective film layer 66. Barrier metal film 67 and laminated on barrier metal film 67 And an external connection metal layer 62. Here, in the present embodiment, the first transparent conductive film 63 and the second transparent conductive film 65 are made of an ITO thin film, and the film thickness of the transparent conductive films 63 and 65 is set in a range of 2 to 10 nm, for example. do it. In the present embodiment, Ti is used as the material of the barrier metal film 67, the film thickness of the barrier metal film 67 is set to 50 nm, and Au is used as the material of the metal film 62 for external connection. Although the film thickness of the film 62 is set to 500 nm, these materials and film thicknesses are not particularly limited. Further, each of the multilayer reflective film layers 64 and 66 may have a configuration in which a plurality of types of dielectric films having different refractive indexes are alternately stacked as in the multilayer reflective film layer 53 of the first embodiment.

ところで、上述の説明から分かるように、複数の多層反射膜層６４と複数の多層反射膜層６６とは発光層３に平行な２つの平面上それぞれにおいて独立した島状に形成されており、一方の平面上の多層反射膜層６４と他方の平面上の多層反射膜層６６との位置をずらし、複数の多層反射膜層６４と複数の多層反射膜層６６とでベース基板１の他表面の投影領域の略全域を覆うように各多層反射膜層６４，６６の平面形状を矩形状としてある。したがって、多層反射膜層６４，６６を設ける一方の電極であるカソード電極６の導電性の低下を抑制しつつ、発光層３の投影領域内における多層反射膜層６４，６６の占有面積を大きくすることができ、カソード電極６に入射した光をより効率良く反射することができる。   Incidentally, as can be seen from the above description, the plurality of multilayer reflective film layers 64 and the plurality of multilayer reflective film layers 66 are formed in independent island shapes on two planes parallel to the light emitting layer 3, respectively. The positions of the multilayer reflective film layer 64 on one plane and the multilayer reflective film layer 66 on the other plane are shifted, and the plurality of multilayer reflective film layers 64 and the plurality of multilayer reflective film layers 66 are arranged on the other surface of the base substrate 1. The planar shapes of the multilayer reflective film layers 64 and 66 are rectangular so as to cover substantially the entire projection area. Therefore, the area occupied by the multilayer reflective film layers 64 and 66 in the projection region of the light emitting layer 3 is increased while suppressing a decrease in conductivity of the cathode electrode 6 which is one of the electrodes provided with the multilayer reflective film layers 64 and 66. Therefore, the light incident on the cathode electrode 6 can be reflected more efficiently.

以上説明した本実施形態の半導体発光素子では、発光層３の厚み方向において所望の光取り出し面側とは反対側に、複数種類の誘電体膜が周期的に積層されたものであって発光層３から放射された光を反射する複数の多層反射膜層６４および複数の多層反射膜層６６が形成されているので、発光層３から所望の光取り出し面側とは反対側へ放射された光を、従来の金属材料からなる反射用金属層に比べて効率良く反射することができ、所望の光取り出し面からの光取り出し効率の向上を図れ、発光効率を高めることが可能となる。なお、図３（ｂ）中の矢印Ｃは発光層３から放射され多層反射膜層６６で反射された光の伝搬経路の一例を示している。   In the semiconductor light emitting device of the present embodiment described above, a plurality of types of dielectric films are periodically stacked on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer 3. Since the plurality of multilayer reflective film layers 64 and the plurality of multilayer reflective film layers 66 that reflect the light emitted from the light emitting layer 3 are formed, the light emitted from the light emitting layer 3 to the side opposite to the desired light extraction surface side Can be efficiently reflected as compared with a reflective metal layer made of a conventional metal material, the light extraction efficiency from a desired light extraction surface can be improved, and the light emission efficiency can be increased. Note that an arrow C in FIG. 3B shows an example of a propagation path of light emitted from the light emitting layer 3 and reflected by the multilayer reflective film layer 66.

ところで、上述の実施形態におけるカソード電極６は、発光層３に平行な２つの平面上それぞれに複数の多層反射膜層６４，６６を設けてあるが、発光層３に平行な３つ以上の平面上それぞれに複数の多層反射膜層を設けて、各平面ごとに多層反射膜層の位置をずらすようにしてもよい。   Incidentally, the cathode electrode 6 in the above-described embodiment is provided with a plurality of multilayer reflective film layers 64 and 66 on two planes parallel to the light emitting layer 3, but three or more planes parallel to the light emitting layer 3 are provided. A plurality of multilayer reflective film layers may be provided on each of them, and the position of the multilayer reflective film layer may be shifted for each plane.

（実施形態３）
本実施形態の半導体発光素子は、実施形態１と同様に、赤色よりも短波長の可視光を放射する可視光発光ダイオードであって、図４に示すように、サファイア基板からなるベース基板１の一表面側（図４（ｂ）における上面側）に窒化ガリウム系化合物半導体層からなるｎ形半導体層２が形成され、ｎ形半導体層２上に３族窒化物半導体層からなる発光層３が形成され、発光層３上に窒化ガリウム系化合物半導体層からなるｐ形半導体層４が形成されている。要するに、本実施形態の半導体発光素子も、実施形態１と同様に、ベース基板１の上記一表面側にｎ形半導体層２と発光層３とｐ形半導体層４との積層構造を有している。ここで、ｎ形半導体層２、発光層３、およびｐ形半導体層４は、ベース基板１の上記一表面側にＭＯＶＰＥ法のようなエピタキシャル成長技術を利用して成膜するので、ｎ形半導体層２の貫通転位を低減するとともにｎ形半導体層２の残留歪みを低減するために、ベース基板１とｎ形半導体層２との間にバッファ層を設けることが望ましいのは勿論である。なお、実施形態１と同様の構成要素には同一の符号を付して説明を適宜省略する。 (Embodiment 3)
The semiconductor light emitting device of this embodiment is a visible light emitting diode that emits visible light having a wavelength shorter than that of red, as in the first embodiment. As shown in FIG. An n-type semiconductor layer 2 made of a gallium nitride compound semiconductor layer is formed on one surface side (upper surface side in FIG. 4B), and a light-emitting layer 3 made of a group 3 nitride semiconductor layer is formed on the n-type semiconductor layer 2. A p-type semiconductor layer 4 made of a gallium nitride compound semiconductor layer is formed on the light emitting layer 3. In short, the semiconductor light emitting device of this embodiment also has a stacked structure of the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 on the one surface side of the base substrate 1 as in the first embodiment. Yes. Here, since the n-type semiconductor layer 2, the light emitting layer 3, and the p-type semiconductor layer 4 are formed on the one surface side of the base substrate 1 using an epitaxial growth technique such as the MOVPE method, the n-type semiconductor layer is formed. Of course, it is desirable to provide a buffer layer between the base substrate 1 and the n-type semiconductor layer 2 in order to reduce the threading dislocation of 2 and the residual strain of the n-type semiconductor layer 2. In addition, the same code | symbol is attached | subjected to the component similar to Embodiment 1, and description is abbreviate | omitted suitably.

本実施形態の半導体発光素子は、実施形態１と同様に、ｐ形半導体層４における発光層３側とは反対側にアノード電極５が形成されるとともに、ｎ形半導体層２における発光層３の積層側にカソード電極６が形成されているが、実施形態１では、ベース基板１の他表面を光取り出し面としてアノード電極５に多層反射膜層５３を設けていたのに対して、本実施形態では、アノード電極５の一部の表面を所望の光取り出し面としている点などが相違する。要するに、実施形態１の半導体発光素子ではパッケージに実装する場合に、フェースダウンで実装する（フリップチップ実装する）のに対して、本実施形態の半導体発光素子ではパッケージに実装する場合、フェースアップで実装してアノード電極５およびカソード電極６それぞれをボンディングワイヤを介してパッケージの各配線パターンと電気的に接続する。   As in the first embodiment, the semiconductor light emitting device of this embodiment has an anode electrode 5 formed on the opposite side of the p-type semiconductor layer 4 to the light emitting layer 3 side, and the light emitting layer 3 of the n-type semiconductor layer 2 The cathode electrode 6 is formed on the laminated side. In the first embodiment, the multilayer reflection film layer 53 is provided on the anode electrode 5 with the other surface of the base substrate 1 as the light extraction surface. The difference lies in that a part of the surface of the anode electrode 5 is a desired light extraction surface. In short, when the semiconductor light emitting device of the first embodiment is mounted on a package, it is mounted face down (flip chip mounting), whereas when the semiconductor light emitting device of this embodiment is mounted on a package, it is face up. After mounting, the anode electrode 5 and the cathode electrode 6 are electrically connected to each wiring pattern of the package through bonding wires.

本実施形態においても実施形態１と同様に、アノード電極５およびカソード電極６の平面視形状が櫛形状の形状に形成され、平面視においてカソード電極６とアノード電極５とが互いに入り組んでいるが、本実施形態におけるアノード電極５は各透明導電膜５１，５２のみが櫛形状に形成され、バリアメタル膜５５と外部接続用金属膜５６との積層膜は第２の透明導電膜５２上で島状に形成され、櫛形状の第２の透明導電膜５２の櫛骨部に相当する部位上で２箇所に設けられている。したがって、本実施形態の半導体発光素子では、アノード電極５における第２の透明導電膜５２の露出表面を所望の光取り出し面とすることができる。また、本実施形態におけるカソード電極６は、平面視形状が櫛形状の透明導電膜６８と、櫛形状の透明導電膜６８の櫛骨部に相当する部位の表面側で島状に形成された複数（図示例では、３つ）の外部接続用金属膜６２と、各外部接続用金属膜６２と透明導電膜６８との間それぞれに介在したバリアメタル膜１６１とで構成されている。要するに、バリアメタル膜１６１と外部接続用金属膜６２との積層膜は透明導電膜６８上で島状に形成され、櫛形状の透明導電膜６８の櫛骨部に相当する部位上で３箇所に設けられている。ここにおいて、透明導電膜６８の材料としては、ＩＴＯ，ＺｎＯ，Ｉｎ２Ｏ３，ＳｎＯ２のいずれかを採用すればよい。また、バリアメタル膜１６１の材料としては、例えば、Ｔｉを採用すればよい。 Also in the present embodiment, as in the first embodiment, the planar shape of the anode electrode 5 and the cathode electrode 6 is formed in a comb shape, and the cathode electrode 6 and the anode electrode 5 are intertwined in the planar view, In the present embodiment, only the transparent conductive films 51 and 52 are formed in a comb shape in the anode electrode 5, and the laminated film of the barrier metal film 55 and the external connection metal film 56 is island-shaped on the second transparent conductive film 52. And is provided at two locations on the portion corresponding to the comb portion of the comb-shaped second transparent conductive film 52. Therefore, in the semiconductor light emitting device of this embodiment, the exposed surface of the second transparent conductive film 52 in the anode electrode 5 can be a desired light extraction surface. In addition, the cathode electrode 6 in the present embodiment has a plurality of islands formed on the surface side of the portion corresponding to the comb bone portion of the comb-shaped transparent conductive film 68 and the comb-shaped transparent conductive film 68 in a plan view. (In the example shown in the figure, it is composed of three external connection metal films 62 and barrier metal films 161 interposed between the respective external connection metal films 62 and the transparent conductive film 68). In short, the laminated film of the barrier metal film 161 and the external connection metal film 62 is formed in an island shape on the transparent conductive film 68, and is formed at three positions on the portion corresponding to the comb bone portion of the comb-shaped transparent conductive film 68. Is provided. Here, as a material of the transparent conductive film 68, any one of ITO, ZnO, In 2 O 3 , and SnO 2 may be adopted. Further, as the material of the barrier metal film 161, for example, Ti may be adopted.

また、本実施形態の半導体発光素子は、ベース基板１の他表面の全面に、発光層３から放射された光を反射する多層反射膜層７が形成されている（なお、図４（ｂ）中の矢印Ｃは発光層３から放射され多層反射膜層７で反射された光の伝搬経路の一例を示している）。要するに、本実施形態の半導体発光素子は、発光層３の厚み方向において所望の光取り出し面側とは反対側においてベース基板１の他表面の全面に発光層３から放射された光を反射する多層反射膜層７が形成されている。ここにおいて、多層反射膜層７は、実施形態１の多層反射膜層５３と同様に屈折率の異なる複数種類の誘電体膜を交互に積層した構造を有している。   Further, in the semiconductor light emitting device of this embodiment, a multilayer reflective film layer 7 that reflects light emitted from the light emitting layer 3 is formed on the entire other surface of the base substrate 1 (FIG. 4B). The arrow C in the middle shows an example of a propagation path of light emitted from the light emitting layer 3 and reflected by the multilayer reflective film layer 7). In short, the semiconductor light emitting device of the present embodiment is a multilayer that reflects light emitted from the light emitting layer 3 on the entire other surface of the base substrate 1 on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer 3. A reflective film layer 7 is formed. Here, the multilayer reflective film layer 7 has a structure in which a plurality of types of dielectric films having different refractive indexes are alternately laminated, like the multilayer reflective film layer 53 of the first embodiment.

しかして、本実施形態の半導体発光素子では、発光層３の厚み方向において所望の光取り出し面側とは反対側に、複数種類の誘電体膜が周期的に積層されたものであって発光層３から放射された光を反射する多層反射膜層７が形成されているので、発光層３から所望の光取り出し面側とは反対側へ放射された光を、従来の金属材料からなる反射用金属層に比べて効率良く反射することができ、所望の光取り出し面からの光取り出し効率の向上を図れ、発光効率を高めることが可能になる。なお、本実施形態の半導体発光素子では、発光層３から所望の光取り出し面側に放射され多層反射膜層７にてカソード電極６に向かって反射された光の一部は、カソード電極６の透明導電膜６８を通して外部へ出射される。   Thus, in the semiconductor light emitting device of this embodiment, a plurality of types of dielectric films are periodically stacked on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer 3. Since the multilayer reflective film layer 7 that reflects the light emitted from the light emitting layer 3 is formed, the light emitted from the light emitting layer 3 to the side opposite to the desired light extraction surface side is reflected by a conventional metal material. The light can be reflected more efficiently than the metal layer, the light extraction efficiency from the desired light extraction surface can be improved, and the light emission efficiency can be increased. In the semiconductor light emitting device of this embodiment, a part of the light emitted from the light emitting layer 3 toward the desired light extraction surface and reflected by the multilayer reflective film layer 7 toward the cathode electrode 6 The light is emitted to the outside through the transparent conductive film 68.

実施形態１の半導体発光素子を示し、（ａ）は概略平面図、（ｂ）は（ａ）のＡ−Ａ’概略断面図である。1A and 1B show a semiconductor light emitting device of Embodiment 1, in which FIG. 1A is a schematic plan view, and FIG. 同上の半導体発光素子の多層反射膜層の説明図である。It is explanatory drawing of the multilayer reflecting film layer of a semiconductor light emitting element same as the above. 実施形態２の半導体発光素子を示し、（ａ）は概略平面図、（ｂ）は（ａ）の概略断面図である。The semiconductor light-emitting device of Embodiment 2 is shown, (a) is a schematic plan view, (b) is a schematic sectional drawing of (a). 実施形態３の半導体発光素子を示し、（ａ）は概略平面図、（ｂ）は（ａ）の概略断面図である。The semiconductor light-emitting device of Embodiment 3 is shown, (a) is a schematic plan view, (b) is a schematic sectional drawing of (a). 従来例を示す半導体発光素子の概略断面図である。It is a schematic sectional drawing of the semiconductor light-emitting device which shows a prior art example.

符号の説明Explanation of symbols

１ ベース基板
２ ｎ形半導体層
３ 発光層
４ ｐ形半導体層
５ アノード電極
６ カソード電極
５１ 第１の透明導電膜
５２ 第２の透明導電膜
５３ 多層反射膜層
５４ 金属反射膜
５５ バリアメタル膜
５６ 外部接続用金属膜 DESCRIPTION OF SYMBOLS 1 Base substrate 2 N-type semiconductor layer 3 Light emitting layer 4 P-type semiconductor layer 5 Anode electrode 6 Cathode electrode 51 First transparent conductive film 52 Second transparent conductive film 53 Multilayer reflective film layer 54 Metal reflective film 55 Barrier metal film 56 Metal film for external connection

Claims (6)

ｎ形半導体層と発光層とｐ形半導体層との積層構造を有し、ｐ形半導体層における発光層側とは反対側にアノード電極が形成されるとともに、ｎ形半導体層における発光層の積層側にカソード電極が形成され、発光層の厚み方向において所望の光取り出し面側とは反対側に、複数種類の誘電体膜が周期的に積層されたものであって発光層から放射された光を反射する多層反射膜層を備えてなることを特徴とする半導体発光素子。   An n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked, an anode electrode is formed on the opposite side of the p-type semiconductor layer from the light-emitting layer side, and the light-emitting layer is stacked on the n-type semiconductor layer. The cathode electrode is formed on the side, and a plurality of types of dielectric films are periodically stacked on the side opposite to the desired light extraction surface side in the thickness direction of the light emitting layer, and light emitted from the light emitting layer A semiconductor light emitting device comprising a multilayer reflective film layer that reflects light. 前記多層反射膜層は、屈折率が異なる２種類の前記誘電体膜が交互に積層されたものであり、各誘電体膜は、それぞれ酸化膜もしくは窒化膜からなることを特徴とする請求項１記載の半導体発光素子。   2. The multilayer reflective film layer is formed by alternately laminating two types of dielectric films having different refractive indexes, and each dielectric film is made of an oxide film or a nitride film, respectively. The semiconductor light emitting element as described. 前記多層反射膜層は、複数種類の前記誘電体膜が前記発光層に近い側から離れるにつれて屈折率が大きくなる順に積層されてなることを特徴とする請求項１または請求項２記載の半導体発光素子。   3. The semiconductor light emitting device according to claim 1, wherein the multilayer reflective film layer is formed by laminating a plurality of types of dielectric films in order of increasing refractive index as the distance from the side closer to the light emitting layer increases. element. 前記多層反射膜層は、前記発光層の発光ピーク波長±３０ｎｍの波長域の光に対して反射率が９５％よりも高くなるように形成されてなることを特徴とする請求項１ないし請求項３のいずれかに記載の半導体発光素子。   The multilayer reflective film layer is formed so that a reflectance is higher than 95% with respect to light in a wavelength region of an emission peak wavelength ± 30 nm of the light emitting layer. 4. The semiconductor light emitting device according to any one of 3. 前記多層反射膜層は、前記アノード電極と前記カソード電極との２つの電極のうち前記発光層の前記厚み方向において所望の光取り出し面側とは反対側に位置する一方の電極に設けられ、前記発光層に平行な平面上で独立した島状に形成されて複数設けられてなることを特徴とする請求項１ないし請求項４のいずれかに記載の半導体発光素子。   The multilayer reflective film layer is provided on one electrode located on a side opposite to a desired light extraction surface side in the thickness direction of the light emitting layer among the two electrodes of the anode electrode and the cathode electrode, 5. The semiconductor light emitting device according to claim 1, wherein a plurality of the light emitting layers are formed in an independent island shape on a plane parallel to the light emitting layer. 前記多層反射膜層は、前記アノード電極と前記カソード電極との２つの電極のうち前記発光層の前記厚み方向において所望の光取り出し面側とは反対側に位置する一方の電極に設けられ、前記発光層に平行な複数の平面上それぞれにおいて独立した島状に形成されて前記各平面上に複数設けられてなり、前記一方の電極は、前記各平面ごとに前記多層反射膜層の位置をずらしてあることを特徴とする請求項１ないし請求項４のいずれかに記載の半導体発光素子。   The multilayer reflective film layer is provided on one electrode located on a side opposite to a desired light extraction surface side in the thickness direction of the light emitting layer among the two electrodes of the anode electrode and the cathode electrode, Each of the plurality of planes parallel to the light emitting layer is formed in an independent island shape and provided on each plane, and the one electrode shifts the position of the multilayer reflective film layer for each plane. The semiconductor light-emitting device according to claim 1, wherein the semiconductor light-emitting device is provided.
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