JP2007194663A5 - - Google Patents

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Publication number
JP2007194663A5
JP2007194663A5 JP2007098534A JP2007098534A JP2007194663A5 JP 2007194663 A5 JP2007194663 A5 JP 2007194663A5 JP 2007098534 A JP2007098534 A JP 2007098534A JP 2007098534 A JP2007098534 A JP 2007098534A JP 2007194663 A5 JP2007194663 A5 JP 2007194663A5
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JP
Japan
Prior art keywords
conductive film
forming
type
plate
continuous
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JP2007098534A
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Japanese (ja)
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JP2007194663A (en
JP5209224B2 (en
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Publication date
Priority claimed from KR1019990062154A external-priority patent/KR100319896B1/en
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Publication of JP2007194663A publication Critical patent/JP2007194663A/en
Publication of JP2007194663A5 publication Critical patent/JP2007194663A5/ja
Application granted granted Critical
Publication of JP5209224B2 publication Critical patent/JP5209224B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Claims (6)

半導体基板上に下部導電膜を形成する段階と、
前記下部導電膜上に電気的に連結された板型導電膜を形成する段階と、
前記板型導電膜を食刻して前記板型導電膜を貫通する相互隔離された複数個のホールを形成する段階と、
前記ホールを埋め込む絶縁膜を形成する段階と、
前記板型導電膜上に形成されている絶縁膜を除去して前記複数個のホールにのみ絶縁膜が残るようにする段階と、
前記板型導電膜に電気的に連結された上部導電膜を形成する段階とを含むことを特徴とする半導体素子のボンディングパッド構造の製造方法
Forming a lower conductive film on a semiconductor substrate;
Forming an electrically connected plate-type conductive film on the lower conductive film;
Etching the plate-type conductive film to form a plurality of mutually isolated holes penetrating the plate-type conductive film;
Forming an insulating film filling the holes;
Removing the insulating film formed on the plate-type conductive film so that the insulating film remains only in the plurality of holes;
Forming a top conductive film electrically connected to the plate-type conductive film, and a method of manufacturing a bonding pad structure of a semiconductor device.
半導体基板上に第1導電膜を形成する段階と、
前記第1導電膜上に電気的に連結された第1連続的な導電膜を形成するが、前記第1連続的な導電膜を貫通しながら延びてその側壁が前記第1連続的な導電膜で取り囲まれた複数個の第1島型絶縁体を含む前記第1連続的な導電膜を形成する段階と、
前記第1連続的な導電膜に電気的に連結された第2導電膜を形成する段階を含み、
前記第1連続的な導電膜を形成する段階は、
前記下部導電膜上に電気的に連結された板型導電膜を形成する段階と、
前記板型導電膜を食刻して前記板型導電膜を貫通する相互離隔された複数個のホールを形成する段階を含み、
前記第1島型絶縁体を形成する段階は、
前記ホールを埋め込む絶縁膜を形成する段階と、
前記板型導電膜上に形成されている絶縁膜を除去して前記複数個のホールにのみ絶縁膜が残るようにする段階とを含むことを特徴とする半導体素子のボンディングパッド構造の製造方法。
Forming a first conductive film on a semiconductor substrate;
A first continuous conductive film electrically connected to the first conductive film is formed. The first continuous conductive film extends through the first continuous conductive film and has a sidewall extending through the first continuous conductive film. Forming the first continuous conductive film including a plurality of first island type insulators surrounded by
Forming a second conductive film electrically connected to the first continuous conductive film;
Forming the first continuous conductive film comprises:
Forming an electrically connected plate-type conductive film on the lower conductive film;
Etching the plate-type conductive film to form a plurality of mutually spaced holes penetrating the plate-type conductive film;
Forming the first island type insulator;
Forming an insulating film filling the holes;
Preparation of the bonding pad structure of the semi-conductor elements you; and a step to ensure that only the insulating film on the plurality of holes by removing the insulating film formed on the plate-type conductive film is left Method.
前記第1連続的な導電膜は周辺部と中心部とを備え、前記第1連続的な導電膜内に存在する前記複数個の島型絶縁体を前記中心部を除いた前記周辺部にのみ存在することを特徴とする請求項2に記載の半導体素子のボンディングパッド構造の製造方法。 The first continuous conductive film has a peripheral portion and a central portion, and the plurality of island-type insulators existing in the first continuous conductive film are only in the peripheral portion excluding the central portion. method for manufacturing a bonding pad structure of a semiconductor device according to claim 2, characterized in that present. 前記第2導電膜上に電気的に連結された第2連続的な導電膜を形成するが、前記第2連続的な導電膜を貫通しながら延びてその側壁が前記第2連続的な導電膜で取り囲まれた複数個の第2島型絶縁体を含む前記第2連続的な導電膜を形成する段階をさらに含むことを特徴とする請求項2に記載の半導体素子のボンディングパッド構造の製造方法。 A second continuous conductive film electrically connected to the second conductive film is formed. The second continuous conductive film extends through the second continuous conductive film and has a sidewall extending through the second continuous conductive film. 3. The method of manufacturing a bonding pad structure for a semiconductor device according to claim 2, further comprising the step of forming the second continuous conductive film including a plurality of second island type insulators surrounded by. . 前記第1島型絶縁体と前記第2島型絶縁体は相互重畳されることを特徴とする請求項4に記載の半導体素子のボンディングパッド構造の製造方法。 5. The method of manufacturing a bonding pad structure for a semiconductor device according to claim 4, wherein the first island type insulator and the second island type insulator are overlapped with each other . 前記第1島型絶縁体と前記第2島型絶縁体は相互一致することを特徴とする請求項5に記載の半導体素子のボンディングパッド構造の製造方法。 6. The method of manufacturing a bonding pad structure for a semiconductor device according to claim 5, wherein the first island type insulator and the second island type insulator are coincident with each other .
JP2007098534A 1998-12-28 2007-04-04 Method for manufacturing bonding pad structure of semiconductor element Expired - Fee Related JP5209224B2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR19980059418 1998-12-28
KR1998P-59418 1998-12-28
KR1019990062154A KR100319896B1 (en) 1998-12-28 1999-12-24 Bonding pad structure of semiconductor device and fabrication method thereof
KR1999P-62154 1999-12-24

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP11375282A Division JP2000195866A (en) 1998-12-28 1999-12-28 Bonding pad structure of semiconductor element and its manufacture

Publications (3)

Publication Number Publication Date
JP2007194663A JP2007194663A (en) 2007-08-02
JP2007194663A5 true JP2007194663A5 (en) 2010-08-12
JP5209224B2 JP5209224B2 (en) 2013-06-12

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Family Applications (2)

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JP11375282A Pending JP2000195866A (en) 1998-12-28 1999-12-28 Bonding pad structure of semiconductor element and its manufacture
JP2007098534A Expired - Fee Related JP5209224B2 (en) 1998-12-28 2007-04-04 Method for manufacturing bonding pad structure of semiconductor element

Family Applications Before (1)

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JP11375282A Pending JP2000195866A (en) 1998-12-28 1999-12-28 Bonding pad structure of semiconductor element and its manufacture

Country Status (2)

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JP (2) JP2000195866A (en)
KR (1) KR100319896B1 (en)

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JP2000195896A (en) 1998-12-25 2000-07-14 Nec Corp Semiconductor device
KR20020021123A (en) * 2000-04-12 2002-03-18 롤페스 요하네스 게라투스 알베르투스 Semiconductor device
JP3434793B2 (en) 2000-09-29 2003-08-11 Necエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
KR100500416B1 (en) * 2000-11-15 2005-07-12 주식회사 하이닉스반도체 Method of manufacturing a pad in a semiconductor device
KR100421043B1 (en) * 2000-12-21 2004-03-04 삼성전자주식회사 Integrated circuit bonding pads including conductive layers with arrays of unaligned spaced apart insulating islands therein
JP2004095916A (en) * 2002-08-30 2004-03-25 Fujitsu Ltd Semiconductor device and its manufacturing method
US7692315B2 (en) 2002-08-30 2010-04-06 Fujitsu Microelectronics Limited Semiconductor device and method for manufacturing the same
JP4579621B2 (en) * 2003-09-26 2010-11-10 パナソニック株式会社 Semiconductor device
EP1519411A3 (en) * 2003-09-26 2010-01-13 Panasonic Corporation Semiconductor device and method for fabricating the same
US6960836B2 (en) * 2003-09-30 2005-11-01 Agere Systems, Inc. Reinforced bond pad
JP4759229B2 (en) * 2004-05-12 2011-08-31 ルネサスエレクトロニクス株式会社 Semiconductor device
JP2006024698A (en) 2004-07-07 2006-01-26 Toshiba Corp Semiconductor apparatus and manufacturing method thereof
KR100675275B1 (en) * 2004-12-16 2007-01-26 삼성전자주식회사 Semiconductor device and pad arrangement method thereof
JP4452217B2 (en) 2005-07-04 2010-04-21 富士通マイクロエレクトロニクス株式会社 Semiconductor device
JP4757660B2 (en) * 2006-02-27 2011-08-24 エルピーダメモリ株式会社 Semiconductor device
CN102414825B (en) 2009-04-28 2014-12-24 三菱电机株式会社 Power semiconductor device

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