JP2007189040A - Resistive paste, resistance object, and circuit board using the same - Google Patents

Resistive paste, resistance object, and circuit board using the same Download PDF

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JP2007189040A
JP2007189040A JP2006005502A JP2006005502A JP2007189040A JP 2007189040 A JP2007189040 A JP 2007189040A JP 2006005502 A JP2006005502 A JP 2006005502A JP 2006005502 A JP2006005502 A JP 2006005502A JP 2007189040 A JP2007189040 A JP 2007189040A
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resistor
ruo
paste
temperature coefficient
temperature
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Hiroshi Sakuma
博 佐久間
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Alps Alpine Co Ltd
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Alps Electric Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a resistive paste which has especially less variation in a resistance value and forms a resistance object whose temperature coefficient is small, and also to provide the resistance object formed by using the resistive paste, and a circuit board formed by using the resistance object. <P>SOLUTION: The resistive paste comprises; a glass composition which does not contain lead; RuO<SB>2</SB>; Ru<SB>2</SB>Nd<SB>2</SB>O<SB>7</SB>; and an organic vehicle. Since the synthetic temperature of Ru<SB>2</SB>Nd<SB>2</SB>O<SB>7</SB>is so high as approximately 1,100°C-1,300°C, it is not decomposed at the temperature for calcinating the resistive paste. As a result, a resistance object with less variation in resistance value is formed. The temperature coefficient of Ru<SB>2</SB>Nd<SB>2</SB>O<SB>7</SB>is negative, and the temperature coefficient of RuO<SB>2</SB>is positive. By mixing them, the absolute value of the temperature coefficient of the resistance object is made small appropriately and simply. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、抵抗値のばらつきが小さく、しかも温度係数の絶対値が小さい抵抗体を形成するための抵抗体ペースト、及び前記抵抗体ペーストを用いて形成された抵抗体、ならびに、前記抵抗体を用いて形成された回路基板に関する。   The present invention provides a resistor paste for forming a resistor having a small variation in resistance value and a small absolute value of a temperature coefficient, a resistor formed using the resistor paste, and the resistor It is related with the circuit board formed using.

下記の特許文献に示すように、抵抗体ペーストには、ガラス組成物と、導電性材料と、ビヒクルとが含まれている。   As shown in the following patent document, the resistor paste includes a glass composition, a conductive material, and a vehicle.

抵抗体は、前記抵抗体ペーストを基板上にスクリーン印刷等した後、焼成することで形成される。   The resistor is formed by baking the resistor paste on the substrate after screen printing or the like.

ところで、下記の特許文献にも記載されているように、従来から、環境汚染を防止するために、鉛を含まない抵抗体ペーストが開発されている。   By the way, as described in the following patent document, a resistor paste containing no lead has been developed in order to prevent environmental pollution.

下記の特許文献では、鉛を含まない導電材料として、BiRuやNdBiRu等を用いている。
特開2002−198203号公報
In the following patent document, Bi 2 Ru 2 O 7 , NdBiRu 2 O 7 or the like is used as a conductive material not containing lead.
JP 2002-198203 A

しかしながら、BiRuやNdBiRuを含む抵抗体ペーストを用いて形成された抵抗体では、抵抗値のばらつきが大きくなることがわかった。それは、BiRuやNdBiRuは合成温度が低い(700℃〜900℃程度)ために、前記抵抗体ペーストを焼成すると(焼成温度は800度〜1000℃程度)、分解し、再焼結することが要因であると考えられる。また、BiRuやNdBiRu中のBiの存在も抵抗値のばらつきが大きくなる要因であると考えられる。 However, it has been found that the resistance value variation becomes large in a resistor formed using a resistor paste containing Bi 2 Ru 2 O 7 or NdBiRu 2 O 7 . This is because Bi 2 Ru 2 O 7 and NdBiRu 2 O 7 have low synthesis temperatures (about 700 ° C. to 900 ° C.), so when the resistor paste is baked (baking temperature is about 800 ° C. to 1000 ° C.), it decomposes. Re-sintering is considered to be a factor. Further, the presence of Bi in Bi 2 Ru 2 O 7 and NdBiRu 2 O 7 is considered to be a factor that causes a large variation in resistance value.

また、抵抗体の温度係数(TCR:Temperature Coefficient of Resistance)の絶対値を小さくことも重要である。例えば、符合の異なる温度係数を有する複数の導電性材料を抵抗体ペースト内に添加して、前記温度係数の絶対値を小さくすることが成される。例えばRuOは正の温度係数を有するため、負の温度係数を有するNbやMnO等を添加する如くである。 It is also important to reduce the absolute value of the temperature coefficient of resistance (TCR). For example, a plurality of conductive materials having different temperature coefficients may be added to the resistor paste to reduce the absolute value of the temperature coefficient. For example, since RuO 2 has a positive temperature coefficient, Nb 2 O 5 or MnO 2 having a negative temperature coefficient is added.

しかしながら従来から使用されている導電性材料では、温度係数のコントロールが非常に難しく、TCR特性にばらつきが生じやすくなっていた。   However, in the conventional conductive materials, it is very difficult to control the temperature coefficient, and the TCR characteristics tend to vary.

そこで本発明は上記従来の課題を解決するためのものであり、特に、抵抗値のばらつきが小さく、しかも温度係数の絶対値が小さい抵抗体を形成するための抵抗体ペースト、及び前記抵抗体ペーストを用いて形成された抵抗体、ならびに、前記抵抗体を用いて形成された回路基板を提供することを目的としている。   Accordingly, the present invention is to solve the above-described conventional problems, and in particular, a resistor paste for forming a resistor having a small variation in resistance value and a small absolute value of a temperature coefficient, and the resistor paste. It is an object of the present invention to provide a resistor formed by using the resistor and a circuit board formed using the resistor.

本発明における抵抗体ペーストは、鉛を含有しないガラス組成物と、RuOと、RuNdと、有機ビヒクルとを有することを特徴とするものである。 The resistor paste in the present invention is characterized by having a glass composition not containing lead, RuO 2 , Ru 2 Nd 2 O 7, and an organic vehicle.

RuNdの合成温度は、1100℃〜1300℃程度と高温であるため、前記抵抗体ペーストを焼成する温度で分解されることはなく、抵抗値のばらつきが小さい抵抗体を形成することが可能になる。また、RuNdの温度係数は負であり、RuOの温度係数は正であり、これらの混合により、抵抗体の温度係数の絶対値を適切に且つ簡単に小さくすることが可能である。 Since the synthesis temperature of Ru 2 Nd 2 O 7 is as high as about 1100 ° C. to 1300 ° C., it is not decomposed at the temperature at which the resistor paste is baked, and a resistor having a small variation in resistance value is formed. It becomes possible. In addition, the temperature coefficient of Ru 2 Nd 2 O 7 is negative and the temperature coefficient of RuO 2 is positive. By mixing these, the absolute value of the temperature coefficient of the resistor can be appropriately and easily reduced. It is.

本発明では、RuOと、RuNdとの混合比(RuO:RuNd)は、質量%で、97:3〜50:50の範囲内であることが好ましい。これにより、より適切に、抵抗値のばらつきが小さい抵抗体を形成することが出来る。 In the present invention, and RuO 2, the mixing ratio of Ru 2 Nd 2 O 7 (RuO 2: Ru 2 Nd 2 O 7) is in mass%, 97: 3-50: is preferably in the range of 50 . Thereby, it is possible to more appropriately form a resistor having a small variation in resistance value.

また本発明では、前記ガラス組成物には、B,CaO,SiO及びAlが含まれることが好ましい。B−CaO−SiO−Al系のガラス組成物は高温焼結に適している。 With this embodiment, the the glass composition, B 2 O 3, CaO, it is preferable to include SiO 2 and Al 2 O 3. The B 2 O 3 —CaO—SiO 2 —Al 2 O 3 -based glass composition is suitable for high-temperature sintering.

また本発明における抵抗体は、鉛を含有しないガラス組成物と、RuOと、RuNdと、を有することを特徴とするものである。 The resistor of the present invention, a glass composition containing no lead, and RuO 2, is characterized in that it has a, and Ru 2 Nd 2 O 7.

前記抵抗体は、前述した抵抗体ペーストを焼成することにより得られたものである。本発明では、抵抗値のばらつきが小さく、温度係数の絶対値が小さい抵抗体を簡単且つ適切に得ることが出来る。   The resistor is obtained by firing the resistor paste described above. In the present invention, a resistor having a small variation in resistance value and a small absolute value of temperature coefficient can be obtained easily and appropriately.

また、本発明における回路基板は、基材の表面、あるいは前記基材の内部の少なくともいずれかに上記に記載された抵抗体が形成されることを特徴とするものである。本発明では、抵抗値のばらつきが小さく、温度係数の絶対値が小さい抵抗体を有する回路基板を簡単且つ適切に得ることが出来る。   The circuit board according to the present invention is characterized in that the resistor described above is formed on at least one of the surface of the base material and the inside of the base material. According to the present invention, it is possible to easily and appropriately obtain a circuit board having a resistor with a small variation in resistance value and a small absolute value of temperature coefficient.

本発明における抵抗体ペーストは、鉛を含有しないガラス組成物と、RuOと、RuNdと、有機ビヒクルとを有することを特徴とするものである。 The resistor paste in the present invention is characterized by having a glass composition not containing lead, RuO 2 , Ru 2 Nd 2 O 7, and an organic vehicle.

RuNdの合成温度は、1100℃〜1300℃程度と高温であるため、前記抵抗体ペーストを焼成する温度で分解されることはなく、抵抗値のばらつきが小さい抵抗体を形成することが可能になる。また、RuNdの温度係数は負であり、RuOの温度係数は正であり、これらの混合により、抵抗体の温度係数の絶対値を適切に且つ簡単に小さくすることが可能である。 Since the synthesis temperature of Ru 2 Nd 2 O 7 is as high as about 1100 ° C. to 1300 ° C., it is not decomposed at the temperature at which the resistor paste is baked, and a resistor having a small variation in resistance value is formed. It becomes possible. In addition, the temperature coefficient of Ru 2 Nd 2 O 7 is negative and the temperature coefficient of RuO 2 is positive. By mixing these, the absolute value of the temperature coefficient of the resistor can be appropriately and easily reduced. It is.

本実施形態の抵抗体ペーストは、鉛を含有しないガラス組成物と、RuOと、RuNdと、有機ビヒクルとを有して構成されている。 The resistor paste of the present embodiment includes a glass composition not containing lead, RuO 2 , Ru 2 Nd 2 O 7, and an organic vehicle.

前記ガラス組成物には、B−CaO−SiO−Al系を用いることが高温焼結に適しているために好ましい。Bの組成比xは1〜50質量%で、CaOの組成比yは10〜50質量%で、SiOの組成比zは45〜70質量%で、Alの組成比wは1〜30質量%(ただし、組成比x+y+z+w≦100質量%の関係を満たす)であることが好ましい。また前記ガラス組成物には、余剰組成としてNaO、KO、MgOのうち少なくとも1種を含めてもよく、前記余剰組成の組成比vは、0〜10質量%の範囲内(ただし、組成比x+y+z+w+v=100質量%の関係を満たす)であることが好ましい。 It is preferable to use a B 2 O 3 —CaO—SiO 2 —Al 2 O 3 system for the glass composition because it is suitable for high-temperature sintering. The composition ratio x of B 2 O 3 is 1-50 mass%, the composition ratio y of CaO is 10-50 mass%, the composition ratio z of SiO 2 is 45-70 mass%, and the composition ratio of Al 2 O 3 It is preferable that w is 1 to 30% by mass (provided that the composition ratio x + y + z + w ≦ 100% by mass is satisfied). In addition, the glass composition may include at least one of Na 2 O, K 2 O, and MgO as a surplus composition, and the composition ratio v of the surplus composition is within a range of 0 to 10% by mass (however, And the composition ratio x + y + z + w + v = 100 mass% is satisfied).

前記有機ビヒクルには、有機バインダと有機溶剤とが含まれている。前記有機バインダとしては、エチルセルロース、ニトロセルロース、メタクリレート等から少なくとも1種が選ばれる。また前記有機溶剤としては、ターピネオール、エタノール、ブチルカルビトールアセテート等から少なくとも1種が選択される。   The organic vehicle contains an organic binder and an organic solvent. As the organic binder, at least one selected from ethyl cellulose, nitrocellulose, methacrylate and the like is selected. As the organic solvent, at least one selected from terpineol, ethanol, butyl carbitol acetate and the like is selected.

また分散剤や、界面活性剤、可塑剤等は用途に応じて適宜添加される。
RuNdは負の温度係数を有し、RuOは正の温度係数を有している。
Further, a dispersant, a surfactant, a plasticizer, and the like are appropriately added depending on the use.
Ru 2 Nd 2 O 7 has a negative temperature coefficient, and RuO 2 has a positive temperature coefficient.

本実施形態では、RuOと、RuNdとの混合比(RuO:RuNd)は、質量%で、97:3〜50:50の範囲内であることが好ましい。より好ましい前記混合比は、95:5〜55:45の範囲内、さらに好ましい範囲は、90:10〜55:45の範囲内である。後述する実験によれば、前記混合比を適切に調整することで、抵抗体の抵抗値のばらつき(3σ/T(%))を効果的に抑制できることがわかっている。ここでσは標準偏差であり、Tは平均の抵抗値を示す。 In the present embodiment, the mixing ratio of RuO 2 and Ru 2 Nd 2 O 7 (RuO 2 : Ru 2 Nd 2 O 7 ) is in mass% and is in the range of 97: 3 to 50:50. preferable. A more preferable mixing ratio is in the range of 95: 5 to 55:45, and a further preferable range is in the range of 90:10 to 55:45. According to the experiment described later, it is known that variation in the resistance value of the resistor (3σ / T (%)) can be effectively suppressed by appropriately adjusting the mixing ratio. Here, σ is a standard deviation, and T represents an average resistance value.

また、前記ガラス組成物と、RuO及びRuNdの混合比(質量%)は、必要な抵抗値に合わせて適宜調整される。絶縁材料であるガラス組成物の混合比を多くすれば前記抵抗体の抵抗値を大きくでき、一方、RuO及びRuNdの混合比を多くすれば、前記抵抗体の抵抗値を小さくすることができる。 Moreover, the mixing ratio (mass%) of the glass composition and RuO 2 and Ru 2 Nd 2 O 7 is appropriately adjusted according to the required resistance value. Increasing the mixing ratio of the glass composition, which is an insulating material, can increase the resistance value of the resistor, while increasing the mixing ratio of RuO 2 and Ru 2 Nd 2 O 7 increases the resistance value of the resistor. Can be small.

本実施形態の前記抵抗体ペーストを基板上にスクリーン印刷等し、焼成すると有機溶剤が蒸発し、抵抗体を形成できる。前記抵抗体は回路基板、例えば、低温焼成セラミック基板(LTCC:Low Temperature Co-fired Ceramic substrate)の表面あるいは内部等に使用される。   When the resistor paste of this embodiment is screen-printed on a substrate and baked, the organic solvent evaporates and a resistor can be formed. The resistor is used on the surface or inside of a circuit board, for example, a low temperature co-fired ceramic substrate (LTCC).

図1は、前記低温焼成セラミック基板を膜厚方向から切断し、その切断面を示す部分断面図である。   FIG. 1 is a partial cross-sectional view showing the cut surface of the low-temperature fired ceramic substrate cut from the film thickness direction.

前記低温焼成セラミック基板1は、複数のセラミック層2が積層されて成る。図1に示すように、各セラミック層2には、ビアホール2aが打ち抜き形成され、各セラミック層2間を電気的に接続できるように、各ビアホール2aに例えばAg系のビア導体3が充填されている。   The low-temperature fired ceramic substrate 1 is formed by laminating a plurality of ceramic layers 2. As shown in FIG. 1, via holes 2a are punched in each ceramic layer 2, and each via hole 2a is filled with, for example, an Ag-based via conductor 3 so that the ceramic layers 2 can be electrically connected. Yes.

また図1に示すように、各セラミック層2間には、例えばAg系導体の内層配線導体4がパターン形成されている。前記内層配線導体4は、導体ペーストを、グリーンシート(この明細書においては、前記セラミック層2とは、前記グリーンシートを焼成した後の状態を指す)の表面にスクリーン印刷等でパターン形成し、焼成して形成されるものである。   As shown in FIG. 1, for example, an inner-layer wiring conductor 4 made of an Ag-based conductor is formed between the ceramic layers 2. The inner layer wiring conductor 4 is formed by patterning a conductive paste on the surface of a green sheet (in this specification, the ceramic layer 2 indicates a state after firing the green sheet) by screen printing or the like, It is formed by firing.

また図1に示すように低温焼成セラミック基板1の表面には、例えばAg系導体の表層配線導体5がパターン形成されている。前記表層配線導体5は、導体ペーストを最上層となるグリーンシートの表面にスクリーン印刷等でパターン形成し、焼成して形成されるものである。   Further, as shown in FIG. 1, a surface layer wiring conductor 5 made of, for example, an Ag-based conductor is patterned on the surface of the low-temperature fired ceramic substrate 1. The surface layer wiring conductor 5 is formed by forming a pattern on the surface of the uppermost green sheet by screen printing or the like and baking it.

各内層配線導体4及び前記表層配線導体5は、前記ビア導体3を介して電気的に接続されている。   Each inner layer wiring conductor 4 and the surface layer wiring conductor 5 are electrically connected via the via conductor 3.

図1に示すように前記低温焼成セラミック基板1には、本実施形態の抵抗体6が用いられる。前記抵抗体6は前記セラミック基板1の内層に、あるいは表面にパターン形成される。   As shown in FIG. 1, the resistor 6 of the present embodiment is used for the low-temperature fired ceramic substrate 1. The resistor 6 is patterned on the inner layer or on the surface of the ceramic substrate 1.

図1に示すように前記低温焼成セラミック基板1の表面には、チップ部品7が前記表層配線導体(電極)5に電気的に接続されている。   As shown in FIG. 1, a chip component 7 is electrically connected to the surface wiring conductor (electrode) 5 on the surface of the low-temperature fired ceramic substrate 1.

本実施形態における抵抗体6は、少なくとも上記したガラス組成物と、RuOと、RuNdと、を含み、抵抗値のばらつきが小さく、また抵抗値の温度係数(TCR:Temperature Coefficient of Resistance)の絶対値が小さい。 The resistor 6 in this embodiment includes at least the glass composition described above, RuO 2 , and Ru 2 Nd 2 O 7 , has a small variation in resistance value, and a temperature coefficient (TCR: Temperature Coefficient) of the resistance value. of Resistance) is small.

また上記したように、RuOと、RuNdとの混合比(RuO:RuNd)は、質量%で、97:3〜50:50の範囲内に調整されており、これにより前記抵抗体6の抵抗値のばらつき(3σ/T(%))を、効果的に小さくできる。またこの混合比では、前記温度係数の絶対値を、400ppm/℃以下にすることが可能である。 Also as described above, and RuO 2, the mixing ratio of Ru 2 Nd 2 O 7 (RuO 2: Ru 2 Nd 2 O 7) is in mass%, 97: 3-50: adjusted in the range of 50 Accordingly, variation in resistance value (3σ / T (%)) of the resistor 6 can be effectively reduced. Further, at this mixing ratio, the absolute value of the temperature coefficient can be 400 ppm / ° C. or less.

図1に示す低温焼成セラミック基板1の製造方法について説明する。まず、セラミックグリーンシート、Ag系導体ペースト、抵抗体ペーストを夫々用意する。   A method for manufacturing the low-temperature fired ceramic substrate 1 shown in FIG. 1 will be described. First, a ceramic green sheet, an Ag-based conductor paste, and a resistor paste are prepared.

前記抵抗体ペーストは鉛を含有しないガラス組成物と、RuOと、RuNdと、有機ビヒクルとを有して成る。前記抵抗体ペースト中のRuNdは、RuO粉末と、Nd粉末とを混合し、この混合して得られた粉を、1100℃〜1300℃程度の高温で合成させたものである。 The resistor paste includes a lead-free glass composition, RuO 2 , Ru 2 Nd 2 O 7, and an organic vehicle. Ru 2 Nd 2 O 7 in the resistor paste is prepared by mixing RuO 2 powder and Nd 2 O 3 powder and synthesizing the powder obtained by mixing at a high temperature of about 1100 ° C. to 1300 ° C. It is a thing.

前記セラミックグリーンシートにビアホールを形成し、前記ビアホールに前記Ag系導体ペーストを充填し、さらに前記グリーンシートの表面に、前記Ag系導体ペーストを所定パターンにスクリーン印刷する。また、前記グリーンシートの表面に、前記抵抗体ペーストを所定パターンにスクリーン印刷する。このように、ペーストの印刷・充填がなされた前記セラミックグリーンシートを複数形成する。前記セラミックグリーンシートは、焼成後、図1に示すセラミック層2となり、各グリーンシートには、図1に示すビア導体3、内層配線導体4、表層配線導体5、及び、抵抗体6の形成箇所に、ペーストの印刷・充填がなされている。   Via holes are formed in the ceramic green sheet, the Ag-based conductor paste is filled in the via holes, and the Ag-based conductor paste is screen-printed in a predetermined pattern on the surface of the green sheet. Further, the resistor paste is screen-printed in a predetermined pattern on the surface of the green sheet. In this manner, a plurality of the ceramic green sheets on which the paste is printed and filled are formed. After firing, the ceramic green sheet becomes the ceramic layer 2 shown in FIG. 1, and each green sheet has a via conductor 3, an inner wiring conductor 4, a surface wiring conductor 5, and a resistor 6 forming portion shown in FIG. 1. In addition, the paste is printed and filled.

そして複数の前記セラミックグリーンシートを重ね合わせ、前記セラミックグリーンシート、Ag系導体ペースト、及び抵抗体ペーストを同時に焼成する。焼成温度は、800℃〜1000℃の範囲内であることが好ましい。前記抵抗体ペースト中に含まれるRuNdの合成温度は1100〜1300℃であるから、焼成工程時、RuNdが分解し再焼結することはなく、抵抗値のばらつきが小さい抵抗体6を適切且つ簡単に形成することが可能である。 A plurality of the ceramic green sheets are superposed and the ceramic green sheets, the Ag-based conductor paste, and the resistor paste are fired simultaneously. The firing temperature is preferably in the range of 800 ° C to 1000 ° C. Since the synthesis temperature of Ru 2 Nd 2 O 7 contained in the resistor paste is 1100 to 1300 ° C., Ru 2 Nd 2 O 7 is not decomposed and re-sintered during the firing process, and the resistance value It is possible to appropriately and easily form the resistor 6 with small variations.

また、温度係数が負のRuNdと、温度係数が正のRuOとを混合することで簡単に温度係数をコントロールでき、特に、RuOと、RuNdとの混合比(RuO:RuNd)を、質量%で、97:3〜50:50の範囲内にしたとき、前記温度係数の絶対値を、400ppm/℃以下に簡単且つ適切に調整できる。すなわち本実施形態では、抵抗値のばらつきが小さく、しかも、温度係数の絶対値が小さい抵抗体6を簡単且つ適切に形成することが可能である。 In addition, the temperature coefficient can be easily controlled by mixing Ru 2 Nd 2 O 7 having a negative temperature coefficient and RuO 2 having a positive temperature coefficient. In particular, RuO 2 and Ru 2 Nd 2 O 7 When the mixing ratio (RuO 2 : Ru 2 Nd 2 O 7 ) is within the range of 97: 3 to 50:50 by mass%, the absolute value of the temperature coefficient is simply and appropriately set to 400 ppm / ° C. or less. Can be adjusted. That is, in this embodiment, it is possible to easily and appropriately form the resistor 6 having a small variation in resistance value and a small absolute value of the temperature coefficient.

なお本実施形態の抵抗体6は、高温焼成セラミック基板(High Temperature Co-fired Ceramic substrate)やその他、基材に使用されてもよい。   The resistor 6 according to the present embodiment may be used for a high temperature co-fired ceramic substrate or other base materials.

下記の表1に示す混合比にて形成された抵抗体ペーストを、900℃で焼成して抵抗体を形成し、各抵抗体の平均抵抗値T及び、抵抗値のばらつき(3σ/T(%))について測定した。σは標準偏差である。なお各抵抗体ペーストには有機ビヒクルとして有機バインダーのエチルセルロースと有機溶剤のターピネオールの混合物、ガラス組成物には、B−CaO−SiO−Al系を用いた。 Resistor pastes formed at a mixing ratio shown in Table 1 below were baked at 900 ° C. to form resistors, and the average resistance value T of each resistor and variation in resistance value (3σ / T (% )). σ is a standard deviation. Each resistor paste was a mixture of ethyl cellulose as an organic binder and terpineol as an organic solvent as an organic vehicle, and B 2 O 3 —CaO—SiO 2 —Al 2 O 3 was used as a glass composition.

Figure 2007189040
Figure 2007189040

表1に示すように、混合比(RuO:RuNd)を、99:1(質量%)、40:60(質量%)とすると、抵抗値のばらつきが50%を超えることから、前記混合比を、97:3〜50:50の範囲内で調整することとした。また表1に示す実験結果から前記混合比を95:5〜55:45の範囲内にすると確実に抵抗値のばらつきを50%より小さくできることがわかった。また、前記混合比を90:10〜55:45の範囲内で調整すると、前記抵抗値のばらつきを40%よりも小さくできることがわかった。 As shown in Table 1, when the mixing ratio (RuO 2 : Ru 2 Nd 2 O 7 ) is 99: 1 (mass%) and 40:60 (mass%), the variation in resistance value exceeds 50%. Therefore, the mixing ratio was adjusted within the range of 97: 3 to 50:50. Also, from the experimental results shown in Table 1, it has been found that when the mixing ratio is in the range of 95: 5 to 55:45, the variation in resistance value can be surely made smaller than 50%. It was also found that the variation in the resistance value can be made smaller than 40% by adjusting the mixing ratio within the range of 90:10 to 55:45.

次に、鉛を含まないガラス組成物(B−CaO−SiO−Al系)、RuO、RuNd、及び有機ビヒクルを含む抵抗体ペースト(実施例)を基材上にスクリーン印刷し、また前記抵抗体ペーストの両側に電極としてのAg導体ペーストをスクリーン印刷し、前記抵抗体ペースト及び前記Ag導体ペーストを同時に焼成した。なお、同じ組成から成る抵抗体(実施例)を有する基材を多数形成した。 Next, a resistor paste containing lead-free glass composition (B 2 O 3 —CaO—SiO 2 —Al 2 O 3 system), RuO 2 , Ru 2 Nd 2 O 7 , and an organic vehicle (Example) Was screen-printed on a substrate, and Ag conductor paste as an electrode was screen-printed on both sides of the resistor paste, and the resistor paste and the Ag conductor paste were fired simultaneously. A number of base materials having resistors (Examples) having the same composition were formed.

また、鉛を含むガラス組成物(PbO−B−SiO−Al系)、RuO、RuPd6.5、及び有機ビヒクルを含む抵抗体ペースト(比較例)を基材上にスクリーン印刷し、また前記抵抗体ペーストの両側に電極としてのAg導体ペーストをスクリーン印刷し、前記抵抗体ペースト及び前記Ag導体ペーストを同時に焼成した。なお、同じ組成から成る抵抗体(比較例)を有する基材を多数形成した。 Further, a resistor paste containing a glass composition containing lead (PbO—B 2 O 3 —SiO 2 —Al 2 O 3 system), RuO 2 , Ru 2 Pd 2 O 6.5 , and an organic vehicle (comparative example) Was screen-printed on a substrate, and Ag conductor paste as an electrode was screen-printed on both sides of the resistor paste, and the resistor paste and the Ag conductor paste were fired simultaneously. A number of base materials having resistors (comparative examples) having the same composition were formed.

実施例及び比較例ともに、製造方法に関する条件(焼成温度等)は同じにした。
そして実施例及び比較例の各抵抗体の抵抗値を測定した。実施例及び比較例の夫々において、測定された各抵抗体の抵抗値を、200Ω毎のデータ区間に分け、同じデータ区間内の抵抗値を有する前記抵抗体の数(頻度)を調べた。
In both the examples and comparative examples, the conditions relating to the production method (such as the firing temperature) were the same.
And the resistance value of each resistor of an Example and a comparative example was measured. In each of the example and the comparative example, the measured resistance value of each resistor was divided into data intervals of 200Ω, and the number (frequency) of the resistors having the resistance value in the same data interval was examined.

図2は、実施例の抵抗体の実験結果であり、図3は、比較例の抵抗体の実験結果である。図2,図3に示すように明らかに実施例のほうが、比較例に比べて抵抗値のばらつきが小さいことがわかった。   FIG. 2 is an experimental result of the resistor of the example, and FIG. 3 is an experimental result of the resistor of the comparative example. As shown in FIGS. 2 and 3, it was clearly found that the variation in the resistance value in the example was smaller than that in the comparative example.

低温焼成セラミック基板を膜厚方向から切断し、その切断面を示す部分断面図、Partial sectional view showing a cut surface of a low-temperature fired ceramic substrate cut from the film thickness direction, 実施例の抵抗体の抵抗値のばらつきを示すグラフ、A graph showing variation in resistance value of the resistor of the example, 比較例の抵抗体の抵抗値のばらつきを示すグラフ、A graph showing variation in resistance value of the resistor of the comparative example,

符号の説明Explanation of symbols

1 低温焼成セラミック基板
2 セラミック層
4 内層配線導体
5 表層配線導体
6 抵抗体
7 チップ部品
DESCRIPTION OF SYMBOLS 1 Low-temperature firing ceramic substrate 2 Ceramic layer 4 Inner layer wiring conductor 5 Surface layer wiring conductor 6 Resistor 7 Chip component

Claims (5)

鉛を含有しないガラス組成物と、RuOと、RuNdと、有機ビヒクルとを有することを特徴とする抵抗体ペースト。 A glass composition containing no lead, and RuO 2, and Ru 2 Nd 2 O 7, resistor paste characterized by having an organic vehicle. RuOと、RuNdとの混合比(RuO:RuNd)は、質量%で、97:3〜50:50の範囲内である請求項1記載の抵抗体ペースト。 And RuO 2, the mixing ratio of Ru 2 Nd 2 O 7 (RuO 2: Ru 2 Nd 2 O 7) is in mass%, 97: 3-50: within the scope of 50 claims 1 resistor according paste. 前記ガラス組成物には、B,CaO,SiO及びAlが含まれる請求項1又は2に記載の抵抗体ペースト。 The resistor paste according to claim 1 or 2, wherein the glass composition contains B 2 O 3 , CaO, SiO 2 and Al 2 O 3 . 鉛を含有しないガラス組成物と、RuOと、RuNdと、を有することを特徴とする抵抗体。 A resistor comprising a glass composition not containing lead, RuO 2 , and Ru 2 Nd 2 O 7 . 基材の表面、あるいは前記基材の内部の少なくともいずれかに請求項4に記載された抵抗体が形成されることを特徴とする回路基板。   A circuit board, wherein the resistor according to claim 4 is formed on at least one of a surface of a base material and an inside of the base material.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008192784A (en) * 2007-02-05 2008-08-21 Sumitomo Metal Mining Co Ltd Resistive paste for forming thermistor
JP2019192690A (en) * 2018-04-19 2019-10-31 富士電機株式会社 Semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002198203A (en) * 2000-12-25 2002-07-12 Tdk Corp Resistor paste, thick-film resistor formed of the same, and circuit board equipped with the thick-film resistor
JP2002367806A (en) * 2001-06-05 2002-12-20 Tdk Corp Resistor paste and method of manufacturing thick film resistor using the same
JP2003257242A (en) * 2002-02-28 2003-09-12 Kojima Kagaku Yakuhin Kk Thick membrane resistor paste
JP2007103594A (en) * 2005-10-03 2007-04-19 Shoei Chem Ind Co Resistor composition and thick film resistor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002198203A (en) * 2000-12-25 2002-07-12 Tdk Corp Resistor paste, thick-film resistor formed of the same, and circuit board equipped with the thick-film resistor
JP2002367806A (en) * 2001-06-05 2002-12-20 Tdk Corp Resistor paste and method of manufacturing thick film resistor using the same
JP2003257242A (en) * 2002-02-28 2003-09-12 Kojima Kagaku Yakuhin Kk Thick membrane resistor paste
JP2007103594A (en) * 2005-10-03 2007-04-19 Shoei Chem Ind Co Resistor composition and thick film resistor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008192784A (en) * 2007-02-05 2008-08-21 Sumitomo Metal Mining Co Ltd Resistive paste for forming thermistor
JP2019192690A (en) * 2018-04-19 2019-10-31 富士電機株式会社 Semiconductor device
JP7099027B2 (en) 2018-04-19 2022-07-12 富士電機株式会社 Semiconductor equipment

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