JP2007134540A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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JP2007134540A
JP2007134540A JP2005326932A JP2005326932A JP2007134540A JP 2007134540 A JP2007134540 A JP 2007134540A JP 2005326932 A JP2005326932 A JP 2005326932A JP 2005326932 A JP2005326932 A JP 2005326932A JP 2007134540 A JP2007134540 A JP 2007134540A
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circuit board
semiconductor elements
underfill resin
semiconductor
protrusion
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Takayuki Kita
貴之 北
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device of which the underfill resin is simultaneously and stably packed on the lower surface side of a plurality of semiconductor elements arranged to adjoin each other. <P>SOLUTION: A plurality of semiconductor elements 2 and 3 are mounted in face-down manner on a circuit board 1 through bumps 4 and 5. An underfill resin 6 is packed in the gap between the lower surfaces of the semiconductor elements 2 and 3 and the upper surface of the circuit board 1. The plurality of semiconductor elements 2 and 3 are arranged to adjoin each other on the circuit board 1. A projection 9 which encourages flowing of the underfill resin 6 into the gap between the lower surfaces of the semiconductor elements 2 and 3 and the upper surface of the circuit board 1 is arranged on the circuit board 1 in the middle of the adjoining semiconductor elements 2 and 3. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、複数の半導体素子を回路基板上にフェースダウン実装するとともに、半導体素子の下面と回路基板の上面との隙間にアンダーフィル樹脂を充填してなる半導体装置およびその製造方法に関するものである。 The present invention relates to a semiconductor device in which a plurality of semiconductor elements are mounted facedown on a circuit board, and a gap between the lower surface of the semiconductor element and the upper surface of the circuit board is filled with an underfill resin, and a method for manufacturing the same. .

従来、回路基板に半導体素子（ベアチップＩＣ）を搭載する方法として、半導体素子をバンプ（突起電極）を介して回路基板にフェースダウン実装するとともに、半導体素子の下面と回路基板の上面との隙間にアンダーフィル樹脂を充填することが行われる。アンダーフィル樹脂は、半導体素子の接合強度の向上、バンプの酸化防止、半導体素子から回路基板への熱伝達向上などを目的としている。 Conventionally, as a method of mounting a semiconductor element (bare chip IC) on a circuit board, the semiconductor element is mounted face-down on the circuit board via bumps (projection electrodes), and the gap is formed between the lower surface of the semiconductor element and the upper surface of the circuit board. Filling with an underfill resin is performed. The purpose of the underfill resin is to improve the bonding strength of the semiconductor element, prevent the bumps from being oxidized, and improve the heat transfer from the semiconductor element to the circuit board.

半導体素子の高密度化、半導体装置の高機能化に伴い、半導体素子を回路基板に複数個配置したマルチチップモジュール技術の開発が進められている。このようなマルチチップモジュールにおいて、半導体素子の角部に切欠を設けたり、半導体素子の配置を工夫することによって、それらの略中央位置にアンダーフィル樹脂の充填部を形成したものが提案されている（特許文献１参照）。
この場合は、複数個の半導体素子を隙間なく配置することで、マルチチップモジュールの小型化を実現するとともに、半導体素子と回路基板とが対向する全領域にアンダーフィル樹脂を同時に充填することが可能になる。 Development of multichip module technology in which a plurality of semiconductor elements are arranged on a circuit board is being promoted as the density of semiconductor elements increases and the functions of semiconductor devices increase. In such a multi-chip module, an underfill resin filling portion is formed at a substantially central position by providing a cutout at a corner of the semiconductor element or by devising the arrangement of the semiconductor element. (See Patent Document 1).
In this case, by arranging a plurality of semiconductor elements without gaps, it is possible to reduce the size of the multichip module and simultaneously fill the underfill resin all over the area where the semiconductor elements and the circuit board face each other. become.

しかしながら、特許文献１の場合、隣接する半導体素子の間にアンダーフィル樹脂の充填用ノズルを、半導体素子の高さより低い位置まで挿入するための領域を設ける必要がある。例えば、半導体素子に切欠部を設ける場合には、半導体素子に加工が必要になり、製造コストの上昇を招くとともに、加工状態や加工位置によっては素子強度の低下を招く恐れがある。また、半導体素子の間に充填部を設ける場合には、半導体素子で充填部を取り囲む必要があるため、４個の場合には有効であるが、２個あるいは３個の半導体素子を隣接配置した場合には効果的でない。 However, in the case of Patent Document 1, it is necessary to provide a region for inserting the underfill resin filling nozzle to a position lower than the height of the semiconductor element between adjacent semiconductor elements. For example, when a notch is provided in a semiconductor element, the semiconductor element needs to be processed, resulting in an increase in manufacturing cost and a decrease in element strength depending on the processing state and processing position. Further, in the case where the filling portion is provided between the semiconductor elements, it is necessary to surround the filling portion with the semiconductor element. Therefore, although four cases are effective, two or three semiconductor elements are arranged adjacent to each other. It is not effective in some cases.

図９，図１０は２個の半導体素子４０，４１を隣接配置した例である。半導体素子４０，４１はそれぞれバンプ４０ａ，４１ａを介して回路基板４２にフェースダウン実装される。２つの半導体素子４０，４１の間に充填用ノズル４３を挿入し、アンダーフィル樹脂４４を吐出することで、１回の充填作業で２つの半導体素子４０，４１の下面側にアンダーフィル樹脂４４を充填することが可能になる。なお、半導体素子４０，４１の周囲には、アンダーフィル樹脂４４の拡がりを防止するための囲い４５が設けられている。 9 and 10 show examples in which two semiconductor elements 40 and 41 are arranged adjacent to each other. The semiconductor elements 40 and 41 are mounted face-down on the circuit board 42 via bumps 40a and 41a, respectively. By inserting the filling nozzle 43 between the two semiconductor elements 40 and 41 and discharging the underfill resin 44, the underfill resin 44 is applied to the lower surface side of the two semiconductor elements 40 and 41 by one filling operation. It becomes possible to fill. An enclosure 45 for preventing the underfill resin 44 from spreading is provided around the semiconductor elements 40 and 41.

上記の例は、半導体素子４０，４１の間にノズル４３を挿入できる間隔Ｄ1 を設けた場合であるが、アンダーフィル樹脂４４の充填領域を削減し、回路面積を小さくするために、図１１，図１２に示すように、２つの半導体素子４０，４１の間隔Ｄ2 を狭くするのが望ましい。隣接する半導体素子４０，４１の間隔Ｄ2 が狭くなると、半導体素子４０，４１の間に充填用ノズル４３を挿入できなくなるため、ノズル４３を半導体素子４０，４１の中間部上方に位置させるか、あるいは半導体素子４０，４１の上面に当接させた状態で、アンダーフィル樹脂４４を吐出しなければならない。 The above example is a case where the interval D 1 into which the nozzle 43 can be inserted is provided between the semiconductor elements 40 and 41. In order to reduce the filling area of the underfill resin 44 and reduce the circuit area, FIG. As shown in FIG. 12, it is desirable to narrow the distance D 2 between the two semiconductor elements 40 and 41. If the interval D 2 between adjacent semiconductor devices 40, 41 is narrowed, it becomes impossible inserting a filling nozzle 43 between the semiconductor elements 40 and 41, or to position the nozzle 43 in the middle portion above the semiconductor device 40, 41, Alternatively, the underfill resin 44 must be discharged while being in contact with the upper surfaces of the semiconductor elements 40 and 41.

しかしながら、この場合には、図１２に示すように、ノズル４３から吐出されたアンダーフィル樹脂４４が表面張力によって半導体素子４０，４１の側壁の下端位置で停止してしまい、半導体素子４０，４１の下面側に安定して充填できなくなるという問題が発生する。さらに、この場合にはアンダーフィル樹脂４４が半導体素子４０，４１の周囲にも回り込まなくなる。
特開平７−８６４９２号公報 However, in this case, as shown in FIG. 12, the underfill resin 44 discharged from the nozzle 43 stops at the lower end position of the side walls of the semiconductor elements 40 and 41 due to the surface tension, and the semiconductor elements 40 and 41 There arises a problem that the lower surface cannot be stably filled. Further, in this case, the underfill resin 44 does not go around the semiconductor elements 40 and 41.
JP 7-86492 A

そこで、本発明の目的は、隣接配置された複数の半導体素子の下面側にアンダーフィル樹脂を同時にかつ安定して充填できる半導体装置およびその製造方法を提供することにある。 SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device capable of simultaneously and stably filling an underfill resin on the lower surface side of a plurality of adjacent semiconductor elements and a method for manufacturing the same.

上記目的を達成するため、本発明は、複数の半導体素子を回路基板上にバンプを介してフェースダウン実装するとともに、半導体素子の下面と回路基板の上面との隙間にアンダーフィル樹脂を充填してなる半導体装置において、上記複数の半導体素子は回路基板上に隣接配置されており、上記隣接する半導体素子の中間の回路基板上に、半導体素子の下面と回路基板の上面との隙間へのアンダーフィル樹脂の流入を促す突起物が配置されていることを特徴とするものである。 In order to achieve the above object, the present invention mounts a plurality of semiconductor elements face-down on a circuit board via bumps, and fills a gap between the lower surface of the semiconductor element and the upper surface of the circuit board with an underfill resin. In the semiconductor device, the plurality of semiconductor elements are arranged adjacent to each other on the circuit board, and an underfill to a gap between the lower surface of the semiconductor element and the upper surface of the circuit board is provided on the circuit board in the middle of the adjacent semiconductor elements. Protrusions that promote the inflow of resin are arranged.

本発明に係る半導体装置の製造方法は、複数の半導体素子を隣接して回路基板上にバンプを介してフェースダウン実装する工程と、上記隣接する半導体素子の中間の回路基板上に、半導体素子の下面と回路基板の上面との隙間へのアンダーフィル樹脂の流入を促す突起物を配置する工程と、上記突起物の上方からアンダーフィル樹脂を供給し、上記半導体素子の下面と回路基板の上面との隙間にアンダーフィル樹脂を充填する工程と、を有するものである。 A method of manufacturing a semiconductor device according to the present invention includes a step of mounting a plurality of semiconductor elements adjacent to each other on a circuit board via bumps, and a step of mounting a semiconductor element on a circuit board intermediate between the adjacent semiconductor elements. A step of disposing a protrusion that promotes inflow of the underfill resin into a gap between the lower surface and the upper surface of the circuit board; and supplying the underfill resin from above the protrusion, and the lower surface of the semiconductor element and the upper surface of the circuit board Filling the gap with underfill resin.

アンダーフィル樹脂を隣接する半導体素子の隙間へ充填する際、半導体素子の側壁の下端位置でアンダーフィル樹脂の流れが停止してしまうのは、半導体素子の側壁の隙間から半導体素子の下面側に流入しようとしたとき、表面積が急拡大するため、アンダーフィル樹脂の持つ表面張力によって流れが停止してしまうためであると考えられる。
そこで、本発明では、半導体素子の側壁の隙間に入ったアンダーフィル樹脂を半導体素子の下面側へ導入するために、毛細管現象を利用してアンダーフィル樹脂の導入の起点となる突起物を、隣接する半導体素子の中間の回路基板上に設けたものである。
すなわち、隣接する半導体素子の中間の回路基板上に突起物を設け、この突起物の上方からアンダーフィル樹脂を吐出すると、隣接する半導体素子の側壁の隙間から半導体素子の下面側への流入経路の途中において、毛細管現象によりアンダーフィル樹脂の流入を促進させる隙間が生じ、この隙間を通って半導体素子の下面側へ流れ込む。一旦アンダーフィル樹脂が半導体素子の下面側へ流れ込めば、後続のアンダーフィル樹脂が続いて流れ込むので、半導体素子の下面側の空間にアンダーフィル樹脂を充填できる。突起物は、隣接する半導体素子の対向した側壁の全領域に亘って設ける必要はなく、中間の１箇所のみに設ければよい。つまり、アンダーフィル樹脂の流入を阻害している領域の１箇所だけでも導入経路を確保すればよい。 When filling underfill resin into the gap between adjacent semiconductor elements, the flow of underfill resin stops at the lower end position of the side wall of the semiconductor element. When trying to do so, the surface area suddenly expands, so the flow is stopped by the surface tension of the underfill resin.
Therefore, in the present invention, in order to introduce the underfill resin that has entered the gap between the side walls of the semiconductor element to the lower surface side of the semiconductor element, the protrusion that becomes the starting point of the introduction of the underfill resin using the capillary phenomenon is adjacent to the protrusion. It is provided on a circuit board in the middle of the semiconductor element to be operated.
That is, when a protrusion is provided on the circuit board in the middle of the adjacent semiconductor element and the underfill resin is discharged from above the protrusion, the inflow path from the gap between the side walls of the adjacent semiconductor element to the lower surface side of the semiconductor element In the middle, a gap that promotes the inflow of the underfill resin is generated by capillary action, and flows into the lower surface side of the semiconductor element through this gap. Once the underfill resin flows into the lower surface side of the semiconductor element, the subsequent underfill resin continues to flow, so that the space on the lower surface side of the semiconductor element can be filled with the underfill resin. The protrusions do not need to be provided over the entire region of the opposing side walls of the adjacent semiconductor elements, and may be provided only at one intermediate position. That is, it is only necessary to secure the introduction path at only one location in the area where the inflow of the underfill resin is hindered.

上記突起物の幅を、隣接する半導体素子の間隔より小さく、上記突起物の高さを、上記半導体素子の下面と回路基板の上面との隙間と同等またはこれより高くするのがよい。
突起物の幅を隣接する半導体素子の間隔より小さくすることで、突起物と半導体素子の側壁との間に狭い空間を形成でき、毛細管現象によるアンダーフィル樹脂の吸込みを促進できる。また、突起物の高さを半導体素子の下面と回路基板の上面との隙間以上とすることで、半導体素子の側壁の隙間に入った樹脂が突起物に濡れやすく、アンダーフィル樹脂の導入効果が高い。 It is preferable that the width of the protrusion is smaller than the interval between adjacent semiconductor elements, and the height of the protrusion is equal to or higher than the gap between the lower surface of the semiconductor element and the upper surface of the circuit board.
By making the width of the protrusion smaller than the interval between adjacent semiconductor elements, a narrow space can be formed between the protrusion and the side wall of the semiconductor element, and suction of the underfill resin due to capillary action can be promoted. In addition, by setting the height of the protrusions to be equal to or greater than the gap between the lower surface of the semiconductor element and the upper surface of the circuit board, the resin that has entered the gap between the side walls of the semiconductor element can easily get wet with the protrusions, and the effect of introducing the underfill resin can be improved. high.

上記突起物としては、上記回路基板上に実装された上記半導体素子より小型のチップ部品を用いてもよい。
例えば小型の角形チップ部品を隣接する半導体素子の間の回路基板上に実装することで、本発明の効果を得ることが可能である。このチップ部品は、何らかの回路機能を有する部品であってもよいし、回路機能を有しないダミー部品であってもよい。 As the protrusion, a chip component smaller than the semiconductor element mounted on the circuit board may be used.
For example, the effect of the present invention can be obtained by mounting a small square chip component on a circuit board between adjacent semiconductor elements. The chip component may be a component having some circuit function or a dummy component having no circuit function.

上記隣接する半導体素子の間隔を、上記アンダーフィル樹脂の充填用ノズルの径とこのノズルの位置決めばらつきの幅との和より小さくするのがよい。
アンダーフィル樹脂の充填にディスペンサなどの自動塗布装置を用いる場合、ノズルの位置決めばらつきがあるので、従来のようにノズルを半導体素子の隙間に挿入するには、半導体素子の間隔をノズルの径とこのノズルの位置決めばらつきの幅との和より大きくしなければならず、回路面積が大きくなる。これに対し、本発明では、ノズルを半導体素子の上方に位置させたままアンダーフィル樹脂を充填できるので、隣接する半導体素子の間隔を充填用ノズルの径とノズルの位置決めばらつきの幅との和より小さくすることができる。その結果、回路面積を小さくできる。
なお、ノズルの径は樹脂材料によって異なり、０．３５〜２．７６ｍｍ程度と幅広く存在しており、設備のノズル位置決め精度は±０．１ｍｍ程度である。
さらに本発明では、隣接する半導体素子の間隔を充填用ノズルの径より小さくしても問題なく充填でき、回路面積をさらに小さくできる。 The interval between the adjacent semiconductor elements is preferably smaller than the sum of the diameter of the nozzle for filling the underfill resin and the width of the positioning variation of the nozzle.
When an automatic application device such as a dispenser is used for filling the underfill resin, there is a variation in nozzle positioning, so in order to insert the nozzle into the gap between the semiconductor elements as in the past, the interval between the semiconductor elements and the diameter of the nozzle This must be larger than the sum of the widths of nozzle positioning variations, which increases the circuit area. On the other hand, in the present invention, the underfill resin can be filled while the nozzle is positioned above the semiconductor element. Therefore, the interval between adjacent semiconductor elements is determined by the sum of the diameter of the filling nozzle and the width of the nozzle positioning variation. Can be small. As a result, the circuit area can be reduced.
The diameter of the nozzle varies depending on the resin material, and exists widely as about 0.35 to 2.76 mm. The nozzle positioning accuracy of the equipment is about ± 0.1 mm.
Furthermore, in the present invention, even if the interval between adjacent semiconductor elements is made smaller than the diameter of the filling nozzle, it can be filled without any problem, and the circuit area can be further reduced.

以上のように、本発明によれば、半導体素子の側壁の隙間に入ったアンダーフィル樹脂を半導体素子の下面側へ導入するために、毛細管現象を利用してアンダーフィル樹脂の導入の起点となる突起物を、隣接する半導体素子の中間の回路基板上に設けたので、複数の半導体素子の下面側の空間にアンダーフィル樹脂を同時にかつ安定して充填できる。 As described above, according to the present invention, in order to introduce the underfill resin that has entered the gap between the side walls of the semiconductor element to the lower surface side of the semiconductor element, it becomes a starting point of the introduction of the underfill resin using the capillary phenomenon. Since the protrusion is provided on the circuit board in the middle of the adjacent semiconductor elements, the underfill resin can be simultaneously and stably filled into the space on the lower surface side of the plurality of semiconductor elements.

以下に、本発明の実施の形態を図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.

（第１実施形態）
図１，図２は本発明にかかる半導体装置の第１実施形態を示す。
この半導体装置（マルチチップモジュール）Ａ１は、回路基板１とその上に隣接してフェースダウン実装された複数（ここでは２個）の半導体素子２，３とで構成されている。半導体素子２，３の下面にはそれぞれバンプ４，５が固定されており、これらバンプ４，５を介して回路基板１に接合されている。バンプ４，５としては金バンプ、はんだバンプなど公知のバンプを使用すればよい。隣接する半導体素子２，３の間隔Ｄは、後述するように充填用ノズル１０の直径φと位置決めばらつきの幅ｄＰとの和より狭く設定されており、ノズル１０を半導体素子２，３の間には挿入できないようになっている。 (First embodiment)
1 and 2 show a first embodiment of a semiconductor device according to the present invention.
The semiconductor device (multi-chip module) A1 includes a circuit board 1 and a plurality (two in this case) of semiconductor elements 2 and 3 mounted face-down adjacently on the circuit board 1. Bumps 4 and 5 are respectively fixed to the lower surfaces of the semiconductor elements 2 and 3, and are joined to the circuit board 1 via these bumps 4 and 5. As the bumps 4 and 5, known bumps such as gold bumps and solder bumps may be used. The interval D between adjacent semiconductor elements 2 and 3 is set to be narrower than the sum of the diameter φ of the filling nozzle 10 and the width dP of the positioning variation, as will be described later, and the nozzle 10 is located between the semiconductor elements 2 and 3. Cannot be inserted.

半導体素子２，３の周囲および半導体素子２，３の下面と回路基板１の上面との隙間には、アンダーフィル樹脂６が充填されている。半導体素子２，３の周囲の回路基板１上には、アンダーフィル樹脂６の拡がりを防止するための囲いがソルダーレジスト膜７などによって形成されている。この例では、ソルダーレジスト膜７に設けた開口部７ａの内縁が囲いとなる。 Underfill resin 6 is filled around the semiconductor elements 2 and 3 and in the gaps between the lower surfaces of the semiconductor elements 2 and 3 and the upper surface of the circuit board 1. On the circuit board 1 around the semiconductor elements 2 and 3, an enclosure for preventing the underfill resin 6 from spreading is formed by a solder resist film 7 or the like. In this example, the inner edge of the opening 7a provided in the solder resist film 7 is enclosed.

半導体素子２，３の中間の回路基板１上には、アンダーフィル樹脂６の流入を促進させる作用を持つ突起物９が配置されている。突起物９としては、絶縁物、導電物のいずれでもよく、樹脂濡れ性のよい物体であればよい。この例では、突起物９として、角形の小型チップ部品を用いており、チップ部品９の側面が半導体素子２，３の側壁と平行になるように配置されている。突起物９の高さＨは、アンダーフィル樹脂６の表面張力に依存して設定されるが、半導体素子２，３の下面と回路基板１の上面との隙間Ｓ1 と同一高さまたはこれより高く、回路基板１から半導体素子２，３の上面までの高さＳ2 より低いものが、充填性の面で望ましい。
Ｓ2 ＞Ｈ≧Ｓ1
なお、突起物９の高さＨが隙間Ｓ1 より多少低くても、効果はある。
また、突起物９の幅Ｗは半導体素子２，３の隙間Ｄより短く、突起物９と半導体素子２，３との間にアンダーフィル樹脂６が流入しやすい隙間を生じさせるものがよい。
Ｗ＜Ｄ
突起物９の長さＬは任意であるが、半導体素子２，３の対向する辺の長さに比べて十分に短くてもよい。 On the circuit board 1 in the middle of the semiconductor elements 2 and 3, a protrusion 9 having an action of promoting the inflow of the underfill resin 6 is disposed. The protrusion 9 may be either an insulator or a conductor, and may be an object having good resin wettability. In this example, a rectangular small chip component is used as the protrusion 9, and the side surface of the chip component 9 is arranged to be parallel to the side walls of the semiconductor elements 2 and 3. The height H of the protrusion 9 is set depending on the surface tension of the underfill resin 6, but is the same height as the gap S 1 between the lower surface of the semiconductor elements 2 and 3 and the upper surface of the circuit board 1 or from this. A height that is higher than the height S 2 from the circuit board 1 to the upper surfaces of the semiconductor elements 2 and 3 is desirable in terms of filling properties.
S 2 > H ≧ S 1
The height H of the protrusions 9 is also slightly lower than the gap S 1, the effect is.
Moreover, the width W of the protrusion 9 is shorter than the gap D between the semiconductor elements 2 and 3, and it is preferable that a gap where the underfill resin 6 easily flows between the protrusion 9 and the semiconductor elements 2 and 3 is generated.
W <D
The length L of the protrusion 9 is arbitrary, but may be sufficiently shorter than the length of the opposing sides of the semiconductor elements 2 and 3.

ここで、上記半導体装置Ａ１の製造方法、特にアンダーフィル樹脂６の充填方法について、図３を参照しながら説明する。
図３の（ａ）は、充填用ノズル１０を半導体素子２，３の中間位置の上方、特に突起物９の直上に配置し、アンダーフィル樹脂６の供給を開始した状態を示す。なお、ノズル１０を半導体素子２，３の上面に当接させてもよい。ノズル１０から供給されたアンダーフィル樹脂６は半導体素子２，３の側壁の隙間に入り、突起物９に付着する。
図３の（ｂ）は、アンダーフィル樹脂６の充填が進行した状態を示す。突起物９の存在によって、アンダーフィル樹脂６は毛細管現象により半導体素子２，３と突起物９との間に入り込み、さらに半導体素子２，３の下面側へと流れ込む。一旦アンダーフィル樹脂６が半導体素子２，３の下面側へ流れ込めば、後続のアンダーフィル樹脂６が連続して流れ込むので、半導体素子２，３の下面側の空間にアンダーフィル樹脂６が充填される。 Here, a manufacturing method of the semiconductor device A1, particularly a filling method of the underfill resin 6, will be described with reference to FIG.
FIG. 3A shows a state in which the filling nozzle 10 is disposed above the intermediate position of the semiconductor elements 2, 3, particularly just above the protrusion 9, and supply of the underfill resin 6 is started. The nozzle 10 may be brought into contact with the upper surfaces of the semiconductor elements 2 and 3. The underfill resin 6 supplied from the nozzle 10 enters the gap between the side walls of the semiconductor elements 2 and 3 and adheres to the protrusions 9.
FIG. 3B shows a state in which filling of the underfill resin 6 has progressed. Due to the presence of the protrusions 9, the underfill resin 6 enters between the semiconductor elements 2 and 3 and the protrusions 9 by a capillary phenomenon, and further flows into the lower surface side of the semiconductor elements 2 and 3. Once the underfill resin 6 flows into the lower surface side of the semiconductor elements 2 and 3, the subsequent underfill resin 6 flows continuously, so that the space on the lower surface side of the semiconductor elements 2 and 3 is filled with the underfill resin 6. The

図３に示すように、ディスペンサを用いてアンダーフィル樹脂６を充填する場合、幅ｄＰ分だけノズル１０の位置にばらつきがある。したがって、従来のようにノズル１０を半導体素子２，３の高さより低い位置まで挿入するには、半導体素子２，３の隙間Ｄをノズル１０の径φと位置決めばらつきの幅ｄＰとの和より広くする必要がある。
これに対し、本発明では半導体素子２，３の隙間Ｄがφ＋ｄＰより狭くても、すなわちノズル１０を半導体素子２，３の高さより低い位置まで挿入できなくても、半導体素子２，３の間に突起物９を配置することで、アンダーフィル樹脂６を安定して充填できるようになる。特に、突起物９は２つの半導体素子２，３の対向する辺のほぼ全長に亘って、あるいは複数個配置する必要はなく、図１に示すように、中間の１箇所に小型の突起物９を１個配置するだけで足りる。そのため、半導体装置Ａ１のコスト上昇を招くことがなく、かつ回路面積の拡大を抑制できる。なお、突起物９がチップ部品の場合、何らかの回路機能を持つものであってもよい。
なお、本発明は、半導体素子２，３の隙間Ｄがノズル１０の径φより小さい場合であっても、上記と同様に有効である。 As shown in FIG. 3, when filling the underfill resin 6 using a dispenser, the position of the nozzle 10 varies by the width dP. Therefore, in order to insert the nozzle 10 to a position lower than the height of the semiconductor elements 2 and 3 as in the prior art, the gap D between the semiconductor elements 2 and 3 is wider than the sum of the diameter φ of the nozzle 10 and the width dP of the positioning variation. There is a need to.
On the other hand, in the present invention, even if the gap D between the semiconductor elements 2 and 3 is narrower than φ + dP, that is, even if the nozzle 10 cannot be inserted to a position lower than the height of the semiconductor elements 2 and 3, By disposing the protrusions 9 on the underfill resin 6, the underfill resin 6 can be stably filled. In particular, the protrusions 9 do not need to be disposed over substantially the entire length of the opposing sides of the two semiconductor elements 2 and 3 or a plurality of protrusions 9, and as shown in FIG. It is enough to arrange one. For this reason, the cost of the semiconductor device A1 is not increased, and an increase in circuit area can be suppressed. When the protrusion 9 is a chip component, it may have some circuit function.
Note that the present invention is effective as described above even when the gap D between the semiconductor elements 2 and 3 is smaller than the diameter φ of the nozzle 10.

（第２実施形態）
図４，図５は本発明にかかる半導体装置の第２実施形態を示す。
この実施形態の半導体装置Ａ２は、隣合う半導体素子２，３ａの形状が異なる例を示している。半導体素子３ａは半導体素子２より小型に形成され、両半導体素子２，３ａが対向する辺の間に突起物９が配置されている。この実施形態では、回路基板１上のバンプ４，５を接合する部分を除くほぼ全面にソルダーレジスト膜７を形成するとともに、半導体素子２，３ａの周囲を取り囲むようにソルダーレジスト膜７に溝またはスリット７ｂを形成することで、アンダーフィル樹脂６の充填領域を限定する囲いとしている。すなわち、溝７ｂの内側縁部でアンダーフィル樹脂６の拡がりを止めることができる。 (Second Embodiment)
4 and 5 show a second embodiment of the semiconductor device according to the present invention.
The semiconductor device A2 of this embodiment shows an example in which the shapes of adjacent semiconductor elements 2 and 3a are different. The semiconductor element 3a is formed smaller than the semiconductor element 2, and a protrusion 9 is disposed between the sides where the semiconductor elements 2 and 3a face each other. In this embodiment, the solder resist film 7 is formed on almost the entire surface excluding the portion where the bumps 4 and 5 are joined on the circuit board 1, and a groove or a groove is formed in the solder resist film 7 so as to surround the periphery of the semiconductor elements 2 and 3a. By forming the slits 7b, the enclosure is defined to limit the filling region of the underfill resin 6. That is, the expansion of the underfill resin 6 can be stopped at the inner edge of the groove 7b.

この場合も、突起物９の直上位置から充填用ノズルによってアンダーフィル樹脂６を供給すれば、アンダーフィル樹脂６は半導体素子２，３ａの下面側の空間に安定して充填される。半導体素子２，３ａの大きさが異なる場合には、アンダーフィル樹脂６を同時充填すると、樹脂６が必要以上に広がることがあるが、囲い７ｂによってアンダーフィル樹脂６の充填領域を制限しているので、所定の範囲にアンダーフィル樹脂６を収めることができる。 Also in this case, if the underfill resin 6 is supplied from the position directly above the protrusion 9 by the filling nozzle, the underfill resin 6 is stably filled in the space on the lower surface side of the semiconductor elements 2 and 3a. When the sizes of the semiconductor elements 2 and 3a are different, the resin 6 may spread more than necessary when the underfill resin 6 is filled at the same time. However, the filling region of the underfill resin 6 is limited by the enclosure 7b. Therefore, the underfill resin 6 can be contained in a predetermined range.

（第３実施形態）
図６は本発明にかかる半導体装置の第３実施形態を示す。
この半導体装置Ａ３では、４個の半導体素子２０〜２３が格子状に隣接配列され、４個の半導体素子２０〜２３の角部で囲まれた中心位置の回路基板（図示せず）上に突起物２４が配置されている。突起物２４の直上位置からアンダーフィル樹脂を供給すれば、突起物２４にそって半導体素子２０〜２３の下面側の空間に導入され、半導体素子２０〜２３の下面側の空間に安定して充填される。 (Third embodiment)
FIG. 6 shows a third embodiment of the semiconductor device according to the present invention.
In the semiconductor device A3, four semiconductor elements 20 to 23 are arranged adjacent to each other in a lattice pattern, and are projected on a circuit board (not shown) at the center position surrounded by corners of the four semiconductor elements 20 to 23. An object 24 is arranged. If the underfill resin is supplied from a position directly above the protrusion 24, the underfill resin is introduced into the space on the lower surface side of the semiconductor elements 20 to 23 along the protrusion 24 and stably filled in the space on the lower surface side of the semiconductor elements 20 to 23. Is done.

（第４実施形態）
図７は本発明にかかる半導体装置の第４実施形態を示す。
この半導体装置Ａ４では、３個の半導体素子３０〜３２を隣接配置した例であり、半導体素子３０，３１が半導体素子３２に比べて小型に構成されている。半導体素子３０，３１の角部と半導体素子３２の側面との間の回路基板（図示せず）上に突起物３３が配置されている。突起物３３の直上位置からアンダーフィル樹脂を供給することで、突起物３３にそって流れたアンダーフィル樹脂は半導体素子３０〜３２の下面側の空間に安定して導入される。 (Fourth embodiment)
FIG. 7 shows a fourth embodiment of the semiconductor device according to the present invention.
This semiconductor device A4 is an example in which three semiconductor elements 30 to 32 are arranged adjacent to each other, and the semiconductor elements 30 and 31 are configured smaller than the semiconductor element 32. A protrusion 33 is disposed on a circuit board (not shown) between the corners of the semiconductor elements 30 and 31 and the side surfaces of the semiconductor element 32. By supplying the underfill resin from a position directly above the protrusion 33, the underfill resin flowing along the protrusion 33 is stably introduced into the space on the lower surface side of the semiconductor elements 30 to 32.

第１，第２の実施形態では、アンダーフィル樹脂６の拡がりを防止するための囲いとして、ソルダーレジスト膜７に開口部７ａまたは溝７ｂを形成したが、図８に示すように、半導体素子の周囲を取り囲むようにダム８を形成してもよい。この例では、ダム８をソルダーレジスト膜７の上に形成したが、回路基板１の上に直接形成してもよい。 In the first and second embodiments, the opening 7a or the groove 7b is formed in the solder resist film 7 as an enclosure for preventing the underfill resin 6 from spreading. However, as shown in FIG. The dam 8 may be formed so as to surround the periphery. In this example, the dam 8 is formed on the solder resist film 7, but it may be formed directly on the circuit board 1.

本発明における突起物としては、小型チップ部品に限るものではなく、セラミック片、樹脂片、金属片などを用いてもよい。アンダーフィル樹脂との濡れ性のよい部品がよい。また、回路基板上に搭載されるものに限らず、回路基板を貫通するピンのようなものでもよく、回路基板自身が予め突起を有するように形成されているものでもよい。さらに、上記のピンを使う場合は、アンダーフィル樹脂の充填時のみ設けられるものであっても構わない。 The protrusions in the present invention are not limited to small chip parts, and ceramic pieces, resin pieces, metal pieces, and the like may be used. Good wettability with the underfill resin. The circuit board is not limited to being mounted on the circuit board, but may be a pin that penetrates the circuit board, or the circuit board itself may be formed in advance to have a protrusion. Furthermore, when using said pin, you may provide only at the time of filling of underfill resin.

本発明にかかる半導体装置の第１実施形態の平面図である。1 is a plan view of a first embodiment of a semiconductor device according to the present invention. 図１のII−II線断面図である。It is the II-II sectional view taken on the line of FIG. アンダーフィル樹脂の塗布・充填方法を示す図である。It is a figure which shows the application | coating and filling method of underfill resin. 本発明にかかる半導体装置の第２実施形態の平面図である。It is a top view of 2nd Embodiment of the semiconductor device concerning this invention. 図４のＶ−Ｖ線拡大断面図である。It is the VV line expanded sectional view of FIG. 本発明にかかる半導体装置の第３実施形態の平面図である。It is a top view of 3rd Embodiment of the semiconductor device concerning this invention. 本発明にかかる半導体装置の第４実施形態の平面図である。It is a top view of 4th Embodiment of the semiconductor device concerning this invention. アンダーフィル樹脂の拡がりを防止するための囲いの他の例の断面図である。It is sectional drawing of the other example of the enclosure for preventing the expansion of underfill resin. ２個の半導体素子を広い間隔をあけて隣接配置した半導体装置の平面図である。2 is a plan view of a semiconductor device in which two semiconductor elements are arranged adjacent to each other with a wide interval. FIG. 図９に示す半導体装置にアンダーフィル樹脂を充填する方法を示す図である。It is a figure which shows the method of filling underfill resin in the semiconductor device shown in FIG. ２個の半導体素子を狭い間隔をあけて隣接配置した半導体装置の平面図である。FIG. 3 is a plan view of a semiconductor device in which two semiconductor elements are arranged adjacent to each other with a narrow interval. 図１１に示す半導体装置にアンダーフィル樹脂を充填する方法を示す図である。It is a figure which shows the method of filling underfill resin in the semiconductor device shown in FIG.

符号の説明Explanation of symbols

Ａ１〜Ａ４ 半導体装置
１ 回路基板
２，３ 半導体素子
４，５ バンプ
６ アンダーフィル樹脂
７ ソルダーレジスト膜
９ 突起物（チップ部品） A1 to A4 Semiconductor device 1 Circuit board 2, 3 Semiconductor element 4, 5 Bump 6 Underfill resin 7 Solder resist film 9 Protrusion (chip component)

Claims (9)

複数の半導体素子を回路基板上にバンプを介してフェースダウン実装するとともに、半導体素子の下面と回路基板の上面との隙間にアンダーフィル樹脂を充填してなる半導体装置において、
上記複数の半導体素子は回路基板上に隣接配置されており、
上記隣接する半導体素子の中間の回路基板上に、半導体素子の下面と回路基板の上面との隙間へのアンダーフィル樹脂の流入を促す突起物が配置されていることを特徴とする半導体装置。 In a semiconductor device in which a plurality of semiconductor elements are mounted face-down on a circuit board via bumps, and a gap between the lower surface of the semiconductor element and the upper surface of the circuit board is filled with an underfill resin.
The plurality of semiconductor elements are arranged adjacent to each other on a circuit board,
2. A semiconductor device according to claim 1, wherein a protrusion is provided on a circuit board between the adjacent semiconductor elements to facilitate inflow of underfill resin into a gap between the lower surface of the semiconductor element and the upper surface of the circuit board. 上記突起物の幅は、隣接する半導体素子の間隔より小さく、上記突起物の高さは、上記半導体素子の下面と回路基板の上面との隙間と同等またはこれより高いことを特徴とする請求項１に記載の半導体装置。 The width of the protrusion is smaller than the interval between adjacent semiconductor elements, and the height of the protrusion is equal to or higher than the gap between the lower surface of the semiconductor element and the upper surface of the circuit board. 2. The semiconductor device according to 1. 上記突起物は、上記回路基板上に実装された上記半導体素子より小型のチップ部品であることを特徴とする請求項１または２に記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the protrusion is a chip component that is smaller than the semiconductor element mounted on the circuit board. 上記隣接する半導体素子の間隔は、上記アンダーフィル樹脂の充填用ノズルの径とこのノズルの位置決めばらつきの幅との和より小さいことを特徴とする請求項１ないし３のいずれかに記載の半導体装置。 4. The semiconductor device according to claim 1, wherein an interval between the adjacent semiconductor elements is smaller than a sum of a diameter of the nozzle for filling the underfill resin and a width of a positioning variation of the nozzle. . 上記隣接する半導体素子の間隔は、上記アンダーフィル樹脂の充填用ノズルの径より小さいことを特徴とする請求項１ないし３のいずれかに記載の半導体装置。 4. The semiconductor device according to claim 1, wherein a distance between the adjacent semiconductor elements is smaller than a diameter of the nozzle for filling the underfill resin. 複数の半導体素子を隣接して回路基板上にバンプを介してフェースダウン実装する工程と、
上記隣接する半導体素子の中間の回路基板上に、半導体素子の下面と回路基板の上面との隙間へのアンダーフィル樹脂の流入を促す突起物を配置する工程と、
上記突起物の上方からアンダーフィル樹脂を供給し、上記半導体素子の下面と回路基板の上面との隙間にアンダーフィル樹脂を充填する工程と、を有することを特徴とする半導体装置の製造方法。 Mounting a plurality of semiconductor elements adjacent to each other on a circuit board via bumps; and
A step of disposing a protrusion for encouraging inflow of underfill resin into a gap between the lower surface of the semiconductor element and the upper surface of the circuit board on the circuit board in the middle of the adjacent semiconductor elements;
A method of manufacturing a semiconductor device, comprising: supplying an underfill resin from above the protrusion, and filling the gap between the lower surface of the semiconductor element and the upper surface of the circuit board. 上記突起物の幅は、隣接する半導体素子の間隔より小さく、上記突起物の高さは、上記半導体素子の下面と回路基板の上面との隙間と同等またはこれより高いことを特徴とする請求項６に記載の半導体装置の製造方法。 The width of the protrusion is smaller than the interval between adjacent semiconductor elements, and the height of the protrusion is equal to or higher than the gap between the lower surface of the semiconductor element and the upper surface of the circuit board. 6. A method for manufacturing a semiconductor device according to 6. 上記突起物は、上記回路基板上に実装された上記半導体素子より小型のチップ部品であることを特徴とする請求項６または７に記載の半導体装置の製造方法。 8. The method of manufacturing a semiconductor device according to claim 6, wherein the protrusion is a chip component smaller than the semiconductor element mounted on the circuit board. 上記隣接する半導体素子の間隔は、上記アンダーフィル樹脂の充填用ノズルの径より小さいことを特徴とする請求項６ないし８のいずれかに記載の半導体装置の製造方法。 9. The method of manufacturing a semiconductor device according to claim 6, wherein a distance between the adjacent semiconductor elements is smaller than a diameter of the underfill resin filling nozzle.
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