JP2006524850A - データ処理方法およびデータ処理装置 - Google Patents
データ処理方法およびデータ処理装置 Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
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Abstract
Description
本発明は独立請求項の上位概念記載のデータ処理方法およびデータ処理装置に関し、したがってデータ処理のためのリコンフィギュアラブルなプロセッサ技術を使用する際の改善に取り組む。
Claims (2)
- データ処理論理セルフィールドおよび少なくとも1つのシーケンシャルなCPUを有するデータ処理装置において、
キャッシュメモリに案内される配線によって例えばブロック的な形態でデータを交換するために、前記シーケンシャルなCPUおよび前記データ処理論理セルフィールドが結合されることを特徴とする、データ処理装置。 - 実行時間が制限されているコンフィギュレーションを用いるリコンフィギュアラブルなユニットの動作方法であって、前記コンフィギュレーションは該コンフィギュレーションの最大許容実行時間を、例えば同調カウンタのトリガによって延長可能である、リコンフィギュアラブルなユニットの動作方法において、
前記コンフィギュレーションによるコンフィギュレーションの実行時間の延長を割込に応答して阻止することを特徴とする、リコンフィギュアラブルなユニットの動作方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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DE10315295 | 2003-04-04 | ||
DE10321834 | 2003-05-15 | ||
PCT/EP2004/003603 WO2004088502A2 (de) | 2003-04-04 | 2004-04-05 | Verfahren und vorrichtung für die datenverarbeitung |
Publications (1)
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JP2006524850A true JP2006524850A (ja) | 2006-11-02 |
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JP2006505004A Pending JP2006524850A (ja) | 2003-04-04 | 2004-04-05 | データ処理方法およびデータ処理装置 |
Country Status (5)
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US (2) | US20070011433A1 (ja) |
EP (1) | EP1611528A2 (ja) |
JP (1) | JP2006524850A (ja) |
DE (1) | DE112004000026D2 (ja) |
WO (1) | WO2004088502A2 (ja) |
Cited By (1)
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JP2012243086A (ja) * | 2011-05-19 | 2012-12-10 | Renesas Electronics Corp | 半導体集積回路装置 |
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EP2441005A2 (en) | 2009-06-09 | 2012-04-18 | Martin Vorbach | System and method for a cache in a multi-core processor |
CN102737007B (zh) | 2011-04-07 | 2015-01-28 | 中兴通讯股份有限公司 | 一种支持多个数据单元任意置换的方法和装置 |
WO2013147885A1 (en) | 2012-03-30 | 2013-10-03 | Intel Corporation | Apparatus and method for accelerating operations in a processor which uses shared virtual memory |
US9003218B2 (en) | 2012-05-21 | 2015-04-07 | International Business Machines Corporation | Power shifting in multicore platforms by varying SMT levels |
EP2840503A1 (de) * | 2013-08-22 | 2015-02-25 | Continental Automotive GmbH | Verfahren zum Betreiben eines Pufferspeichers einer Datenverarbeitungsanlage und Datenverarbeitungsanlage |
JP2016178229A (ja) | 2015-03-20 | 2016-10-06 | 株式会社東芝 | 再構成可能な回路 |
CN108108191A (zh) * | 2018-01-09 | 2018-06-01 | 湖南国科微电子股份有限公司 | 一种soc芯片及soc芯片cpu指令集的配置方法 |
DE102018215139A1 (de) * | 2018-09-06 | 2020-03-12 | Robert Bosch Gmbh | Betriebsverfahren und Steuereinheit für ein Daten-/Signalauswertesystem, Daten-/Signalauswertesystem, Ultraschallbetriebsassistenzsystem und Arbeitsvorrichtung |
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US20070011433A1 (en) | 2007-01-11 |
WO2004088502A2 (de) | 2004-10-14 |
EP1611528A2 (de) | 2006-01-04 |
US20100122064A1 (en) | 2010-05-13 |
WO2004088502A3 (de) | 2005-01-13 |
DE112004000026D2 (de) | 2006-06-14 |
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