JP2006507686A - ボンディングパッドを有する半導体装置及びその形成方法 - Google Patents
ボンディングパッドを有する半導体装置及びその形成方法 Download PDFInfo
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- JP2006507686A JP2006507686A JP2004555419A JP2004555419A JP2006507686A JP 2006507686 A JP2006507686 A JP 2006507686A JP 2004555419 A JP2004555419 A JP 2004555419A JP 2004555419 A JP2004555419 A JP 2004555419A JP 2006507686 A JP2006507686 A JP 2006507686A
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Abstract
Description
に設けることによりプローブ領域間の距離を効率的に大きくすることができる。プローブ領域をワイヤボンディング領域から分離することにより、ワイヤボンディング領域はプローブテストによって傷が付くことがないので、信頼度の高いワイヤボンディングが可能になる。また、ボンディングパッドを、金属配線層を含む能動回路を覆って形成することにより、集積回路をより小さくすることができる。
成する。電気回路は、例えば通信、輸送、汎用計算、または娯楽のような種々の集積回路用途に使用することができる。図示の実施形態では、金属層28,30及び32は、例えばアルミニウム、銅、または金のような導電材料を使用して形成される。他の実施形態では、上述の実施形態よりも多くの、または少ない金属層を設けることができる。ボンディングパッド10は最終金属層28の一部として形成される。金属層28を形成した後、パッシベーション層18を半導体装置20全面を覆って堆積させる。開口は、ボンディングパッド10を覆う形で示されるパッシベーション層18に設けられ、半導体装置20とパッケージ上のピンとの間のような電気コンタクトが可能になる。
の領域はワイヤボンディングに使用される領域をほぼ示している。複数のボンディングパッドは周辺61に対して配列される。これらのワイヤボンディン領域は各ボンディングパッドのプローブ領域よりも周辺61に近い。隣接ボンディンパッドのワイヤボンディン領域はエッジ61から等距離に一直線に並べられる。同様に、隣接ボンディンパッドのプローブ領域はエッジ61から等距離に一直線に並べられる。他の実施形態では、プローブ領域及びワイヤボンディン領域は入れ替えることができる。
ず、この場合ピッチとはパッド間の距離を指す。ボンディングパッドを細長くし、プローブ領域をジグザグに配置することにより、現状のプローブ技術を狭いピッチのパッドにまで拡張して適用することができる。ワイヤボンディング領域を一直線に並べることにより、ワイヤボンディング装置のプログラムが一層簡単になる。ここで、他の実施形態では、プローブ領域及びワイヤボンディング領域は入れ替えることができる。
離れて位置する。また、これらのボンディングパッドの各々のプローブ領域は、図7,図8及び図9に関して上に記載したように、ジグザグに配置される。また、各パッドのワイヤボンディング領域は周辺111から等距離に並べられる。
ン層18及び下層の能動回路26、及び/又は配線領域24を覆って延び、そして残りの部分は最終金属層パッド206とパッシベーション層18の開口で接続される。上述のように、ボンディングパッド200はワイヤボンディング領域202及びワイヤボンディング領域204に分離される。図示の実施形態では、ワイヤボンディング領域204は、最終金属層パッド206に接続されるボンディングパッド200の部分の上に形成され、そしてワイヤボンディング領域202は、パッシベーション層18を覆って形成される。すなわち、ボンディングパッド200の一部がパッシベーション層18を覆って延びる。従って、一の実施形態では、ワイヤボンディング領域202またはワイヤボンディング領域204のいずれかの非周辺部分、或いはワイヤボンディング領域202またはワイヤボンディング領域204のいずれかの主要部分がパッシベーション層18を覆う形で位置することができる。例えば、一の実施形態では、ワイヤボンディング領域204の一部のみを最終金属層パッド206に接続されるボンディングパッド200の部分の上に形成することができる。この実施形態では、ワイヤボンディング領域202の全て、及びワイヤボンディング領域204の残りの部分がパッシベーション層18を覆う。別の構成として、ワイヤボンディング領域204の全て、及びワイヤボンディング領域202の一部を、最終金属層パッド206に接続されるボンディングパッド200の部分の上に形成することができる。この実施形態では、ワイヤボンディング領域202の残りの部分のみがパッシベーション層18を覆うことになる。更に別の実施形態では、パッシベーション層18は、最終金属層28を露出させる複数の開口を有することができ、これらの開口において、ボンディングパッド200の複数の部分(ワイヤボンディング領域204の各部分、ワイヤボンディング領域202の各部分、またはこれら両方の領域の各部分を含む)が最終金属層28との接続を行なうことができる。
は集積回路230のエッジ232に沿って形成される。複数のボンディングパッドの各々に付した破線はパッシベーション層に形成される開口220を示している。これらのボンディングパッドの各々は、図15において議論したように、複数のワイヤボンディング領域(この例では2つの領域)に分離される。円で囲まれた各ボンディングパッド上の領域はワイヤボンディングに使用される領域をほぼ示している。複数のボンディングパッドは周辺232に対して並べられる。図示の実施形態では、これらのボンディングパッドは、エッジ232から等距離に一直線に並べられる。他の実施形態では、複数のボンディングパッドの各々は、図17に示す丁度2つよりも多いワイヤボンディング領域を含むことができる。
ような異なる半導体装置において構成することができる。図19は、本発明の別の実施形態による半導体装置314(集積回路314とも記載する)の断面図を示している。半導体装置314は、エッジまたは周辺25、パッシベーション層18、配線領域24、及び能動領域26、及びボンディングパッド300を有する。ボンディングパッド300はアルミニウムパッド308及び最終金属層パッド206を含む。最終金属層パッド206は最終金属層28の一部として形成する。従って、一の実施形態では、ボンディングパッド300はアルミニウムにより形成し、そして最終金属層パッド206は銅により形成することができる。ボンディングパッド300は半導体装置314の周辺25に対して配置し、かつ図19の縦方向破線で示すように、2つのワイヤボンディング領域304及び306、及び一つのプローブ領域302に分離する。図19に示す実施形態では、アルミニウムパッド308は最終金属層パッド206からバリア層310によって分離され、このバリア層は、最終金属層パッド206とアルミニウムパッド308との間、及びアルミニウムパッド308とパッシベーション層18との間の拡散バリア兼接着層となる。しかしながら、別の実施形態では、バリア層310を設けてはならないことに留意されたい。例えば、最終金属層パッド206を銅ではなくアルミニウムにより形成する場合には、バリア層310は設けてはならない。また、ボンディングパッド200は、例えばアルミニウム、銅、及び金のようなワイヤボンディングが可能な導電材料であればどのような材料によっても形成することができることに留意されたい。
位置するように示されているが、開口316は、図19を参照しながら上に議論したように種々の構成で形成することができる。また、開口316はどのようなサイズ及び形とすることもできる。例えば、開口316をボンディングパッド318全体に渡る大きさとする、または図示の大きさよりも小さくすることができる。開口316は、円形、正方形など、どのような形とすることもできる。別の構成として、開口316はボンディングパッド318の下方に複数の開口(サイズまたは形は問わない)を含むことができる。また、別の実施形態では、ボンディングパッド318〜321に関して別の構成を用いることができることに留意されたい。例えば、これらのボンディングパッドに関して、上の図7〜14に示したように、多くの異なる方法でパッドをジグザグに並べる、パッドのサイズを決める、パッドをレイアウトする、そしてパッドを配置することができる。例えば、図7〜14に示す構成を複数のワイヤボンディング領域及び一つ以上のプローブ領域を有するボンディングパッドに対して適用することもできる。
34及び336それぞれとの電気接続(例えばワイヤ接続)が行なわれ、更にボンディングパッド339及び342との電気接続が行なわれてPCB326(ボンディングポスト345及び347)との接続が行なわれる。複数のワイヤボンディング領域を有するボンディングパッドを使用することにより、PCB326との複数のチップ接続を行なうためには追加のボンディングパッドが不要となる。また、図示はしないが、電気接続を集積回路チップ330からPCB326へ直接行なうことができることに留意されたい。例えば、ボンディングパッド350からの接続手段の内の一つの接続手段を、集積回路チップ328上のボンディングパッド351を通してボンディングポスト352に接続するのではなく、ボンディングポスト352に直接接続することができる。
あらゆるタイプの材料、例えば金、アルミニウム、銅、及び絶縁ワイヤなどを使用することができる。
Claims (11)
- 基板(26)と、
基板を覆うパッシベーション層(18)と、
基板を覆うボンディングパッド(200)とを備え、前記ボンディングパッドは、
第1ボンディングワイヤを集積回路に接続するための第1ワイヤボンディング領域(202)と、
第2ボンディングワイヤを集積回路に接続するための第2ワイヤボンディング領域(204)とを含み、
第1ワイヤボンディング領域の少なくとも非周辺部分がパッシベーションの上に位置する、集積回路(20)。 - 前記基板は能動回路を有し、能動回路の少なくとも一部が、パッシベーションの上に位置するボンディングパッドの前記部分の下方に横たわる、請求項1記載の集積回路。
- 前記基板は配線領域を有し、そして配線領域の少なくとも一部が、パッシベーションの上に位置するボンディングパッドの前記部分の下方に横たわる、請求項1記載の集積回路。
- 第1ワイヤボンディング領域の主要部分がパッシベーションの上に位置する請求項1記載の集積回路。
- 第1ワイヤボンディング領域の少なくとも一部がパッシベーションの上に位置し、かつ第2ワイヤボンディング領域の少なくとも一部がパッシベーションの上に位置する、請求項1記載の集積回路。
- 第1ワイヤボンディング領域及び第2ワイヤボンディング領域(302)は電気的に接続される請求項1記載の集積回路。
- ボンディングパッドは更に、プローブが接触するプローブ領域(302)を含む、請求項1記載の集積回路。
- ボンディングパッドは集積回路の周辺領域に位置する請求項1記載の集積回路。
- ボンディングパッドは集積回路の非周辺領域に位置する請求項1記載の集積回路。
- 集積回路(20)の形成方法であって、
基板(26)を設ける工程と、
パッシベーション層(18)を基板を覆って形成する工程と
ボンディングパッド(200)を基板を覆って形成する工程とを備え、前記ボンディングパッドを形成する工程では、
第1ボンディングワイヤを集積回路に接続するための第1ワイヤボンディング領域(202)を形成する工程と、
第2ボンディングワイヤを集積回路に接続するための第2ワイヤボンディング領域(204)を形成する工程とを備え、
前記第1ワイヤボンディング領域の少なくとも非周辺部分がパッシベーションの上に位置する、方法。 - マルチチップパッケージ(325)であって、
第1集積回路(330)と、第2集積回路(328)と、第1ワイヤとを含み、第1集積
回路は、
基板と、
基板を覆うパッシベーション層と、
基板を覆う第1ボンディングパッドとを備え、第1ボンディングパッドは、
第1ボンディングワイヤを第1集積回路に接続するための第1ワイヤボンディング領域と、
第2ボンディングワイヤを第1集積回路に接続するための第2ワイヤボンディング領域と、を含み、
第1ワイヤボンディング領域の少なくとも非周辺部分がパッシベーションの上に位置し、第2集積回路は、
第2ボンディングパッドを含み、
第1ワイヤは、第1ワイヤボンディング領域と第2ボンディングパッドとを電気的に接続する、マルチチップパッケージ。
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US10/304,416 US6921979B2 (en) | 2002-03-13 | 2002-11-26 | Semiconductor device having a bond pad and method therefor |
PCT/US2003/035964 WO2004049436A1 (en) | 2002-11-26 | 2003-11-12 | Semiconductor device having a bond pad and method for its fabrication |
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JP2010043549A Pending JP2010153901A (ja) | 2002-11-26 | 2010-02-26 | ボンディングパッドを有する半導体装置及びその形成方法 |
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JP2010043549A Pending JP2010153901A (ja) | 2002-11-26 | 2010-02-26 | ボンディングパッドを有する半導体装置及びその形成方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US6921979B2 (ja) |
EP (1) | EP1565939A1 (ja) |
JP (2) | JP2006507686A (ja) |
KR (1) | KR20050075447A (ja) |
CN (1) | CN1717802B (ja) |
AU (1) | AU2003291472A1 (ja) |
TW (1) | TWI313921B (ja) |
WO (1) | WO2004049436A1 (ja) |
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JP2016195263A (ja) * | 2005-06-24 | 2016-11-17 | クゥアルコム・インコーポレイテッドQualcomm Incorporated | 線路デバイスの製造方法 |
JP2019169639A (ja) * | 2018-03-23 | 2019-10-03 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
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US7305509B2 (en) * | 2003-03-07 | 2007-12-04 | Dell Products L.P. | Method and apparatus for zero stub serial termination capacitor of resistor mounting option in an information handling system |
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JPWO2007114057A1 (ja) * | 2006-04-04 | 2009-08-13 | パナソニック株式会社 | 半導体集積回路装置およびpdpドライバおよびプラズマディスプレイパネル |
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US20080182120A1 (en) * | 2007-01-28 | 2008-07-31 | Lan Chu Tan | Bond pad for semiconductor device |
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US8242613B2 (en) | 2010-09-01 | 2012-08-14 | Freescale Semiconductor, Inc. | Bond pad for semiconductor die |
FR2974665A1 (fr) * | 2011-04-27 | 2012-11-02 | St Microelectronics Crolles 2 | Puce microelectronique, composant incluant une telle puce et procede de fabrication |
JP2014241309A (ja) * | 2011-10-06 | 2014-12-25 | 株式会社村田製作所 | 半導体装置およびその製造方法 |
US9599657B2 (en) * | 2013-01-03 | 2017-03-21 | Globalfoundries Inc. | High power radio frequency (RF) in-line wafer testing |
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JP3022819B2 (ja) * | 1997-08-27 | 2000-03-21 | 日本電気アイシーマイコンシステム株式会社 | 半導体集積回路装置 |
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US6303459B1 (en) * | 1999-11-15 | 2001-10-16 | Taiwan Semiconductor Manufacturing Company | Integration process for Al pad |
US20020016070A1 (en) * | 2000-04-05 | 2002-02-07 | Gerald Friese | Power pads for application of high current per bond pad in silicon technology |
JP3631120B2 (ja) * | 2000-09-28 | 2005-03-23 | 沖電気工業株式会社 | 半導体装置 |
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-
2002
- 2002-11-26 US US10/304,416 patent/US6921979B2/en not_active Expired - Lifetime
-
2003
- 2003-11-12 EP EP03768874A patent/EP1565939A1/en not_active Withdrawn
- 2003-11-12 JP JP2004555419A patent/JP2006507686A/ja active Pending
- 2003-11-12 AU AU2003291472A patent/AU2003291472A1/en not_active Abandoned
- 2003-11-12 KR KR1020057009386A patent/KR20050075447A/ko not_active Application Discontinuation
- 2003-11-12 CN CN2003801042618A patent/CN1717802B/zh not_active Expired - Lifetime
- 2003-11-12 WO PCT/US2003/035964 patent/WO2004049436A1/en active Application Filing
- 2003-11-21 TW TW092132757A patent/TWI313921B/zh not_active IP Right Cessation
-
2010
- 2010-02-26 JP JP2010043549A patent/JP2010153901A/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016195263A (ja) * | 2005-06-24 | 2016-11-17 | クゥアルコム・インコーポレイテッドQualcomm Incorporated | 線路デバイスの製造方法 |
JP2008218442A (ja) * | 2007-02-28 | 2008-09-18 | Matsushita Electric Ind Co Ltd | 半導体集積回路装置及びその製造方法 |
JP2019169639A (ja) * | 2018-03-23 | 2019-10-03 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
EP1565939A1 (en) | 2005-08-24 |
AU2003291472A1 (en) | 2004-06-18 |
CN1717802B (zh) | 2010-10-27 |
TWI313921B (en) | 2009-08-21 |
US20030173668A1 (en) | 2003-09-18 |
JP2010153901A (ja) | 2010-07-08 |
KR20050075447A (ko) | 2005-07-20 |
WO2004049436A1 (en) | 2004-06-10 |
TW200503221A (en) | 2005-01-16 |
US6921979B2 (en) | 2005-07-26 |
CN1717802A (zh) | 2006-01-04 |
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