JP2006270935A - 信号伝送回路、icパッケージ及び実装基板 - Google Patents
信号伝送回路、icパッケージ及び実装基板 Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0298—Arrangement for terminating transmission lines
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0246—Termination of transmission lines
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0292—Arrangements specific to the receiver end
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10022—Non-printed resistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dc Digital Transmission (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
【解決手段】第1のインピーダンスを有する伝送路21、22と、所定の抵抗値を有する終端抵抗33、34と、伝送路21、22及び終端抵抗33、34に接続され、前記第1のインピーダンス及び前記所定の抵抗値のいずれよりも高い第2のインピーダンスを有する伝送路31、32と、伝送路21、22及び伝送路31、32の接続部で信号を受信する入力バッファ35とを設けた。
【選択図】図1
Description
この発明の実施の形態1に係る信号伝送回路について図1及び図2を参照しながら説明する。図1は、この発明の実施の形態1に係る信号伝送回路の構成を等価回路で示す図である。なお、各図中、同一符号は同一又は相当部分を示す。
この発明の実施の形態2に係る信号伝送回路について図3を参照しながら説明する。図3は、この発明の実施の形態2に係る信号伝送回路の構成をレシーバICパッケージで示す部分断面図である。この図3は、高インピーダンス伝送路を、パッケージ基板配線で形成した例を示す。
この発明の実施の形態3に係る信号伝送回路について図4を参照しながら説明する。図4は、この発明の実施の形態3に係る信号伝送回路のICパッケージの断面を示す図である。この図4は、上記実施の形態2のパッケージ基板を使用したICパッケージの例を示す。
この発明の実施の形態4に係る信号伝送回路について図5を参照しながら説明する。図5は、この発明の実施の形態4に係る信号伝送回路のICパッケージを搭載した実装基板の断面を示す図である。
この発明の実施の形態5に係る信号伝送回路について図6を参照しながら説明する。図6は、この発明の実施の形態5に係る信号伝送回路の構成を実装基板で示す断面図である。この図6は、高インピーダンス伝送路を、実装基板配線で形成した例を示す。
Claims (8)
- 第1のインピーダンスを有する第1の伝送路と、
所定の抵抗値を有する終端抵抗と、
前記第1の伝送路に一端が接続され、かつ前記終端抵抗に他端が接続され、前記第1のインピーダンス及び前記所定の抵抗値のいずれよりも高い第2のインピーダンスを有する第2の伝送路とを備え、
前記第1及び第2の伝送路の接続部で信号を受信する
ことを特徴とする信号伝送回路。 - 前記第2の伝送路は、
前記第2のインピーダンスが前記第1のインピーダンスの1.1倍から4倍であり、かつ
遅延時間が信号の動作周波数の周期の0.1倍から2倍の範囲に相当する長さを有する
ことを特徴とする請求項1記載の信号伝送回路。 - 第1のインピーダンスを有する第1の伝送路と、
所定の抵抗値を有する終端抵抗と、
前記第1の伝送路に一端が接続され、かつ前記終端抵抗に他端が接続され、前記第1のインピーダンス及び前記所定の抵抗値のいずれよりも高い第2のインピーダンスを有する第2の伝送路とを備え、
前記第2の伝送路を基板配線で形成し、
前記第1及び第2の伝送路の接続部で信号を受信する
ことを特徴とする信号伝送回路。 - 請求項3記載の信号伝送回路
を備えたことを特徴とするICパッケージ。 - 外部から信号を受信する受信信号伝送経路と、
外部へ信号を送信する送信信号伝送経路とを備えたICパッケージであって、
前記受信信号伝送経路は、
パッケージ基板内部に形成され、第1のインピーダンスを有する第1のパッケージ基板配線と、
前記パッケージ基板表面に形成され、所定の抵抗値を有する終端抵抗と、
前記パッケージ基板表面に形成され、前記第1のパッケージ基板配線に一端が接続され、かつ前記終端抵抗に他端が接続され、前記第1のインピーダンス及び前記所定の抵抗値のいずれよりも高い第2のインピーダンスを有する第2のパッケージ基板配線とから構成されているとともに、
前記送信信号伝送経路は、前記パッケージ基板内部に形成された第3のパッケージ基板配線から構成され、
前記第1及び第2のパッケージ基板配線の接続部で信号を受信するともに、前記第3のパッケージ基板配線へ信号を送信する受信回路
をさらに備えたことを特徴とするICパッケージ。 - 請求項4、請求項5のいずか一方に記載の第1及び第2のICパッケージを搭載した実装基板であって、
前記第1のICパッケージの送信信号端子と前記第2のICパッケージの受信信号端子を接続する実装基板配線
を備えたことを特徴とする実装基板。 - 実装基板に設けられ、第1のインピーダンスを有する第1の実装基板配線と、
前記実装基板に設けられ、所定の抵抗値を有する終端抵抗と、
前記実装基板に設けられ、前記第1の実装基板配線に一端が接続され、かつ前記終端抵抗に他端が接続され、前記第1のインピーダンス及び前記所定の抵抗値のいずれよりも高い第2のインピーダンスを有する第2の実装基板配線とを備え、
前記第1及び第2の実装基板配線の接続部で信号を受信する
ことを特徴とする信号伝送回路。 - 請求項7記載の信号伝送回路
を備えたことを特徴とする実装基板。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006045521A JP4855101B2 (ja) | 2005-02-25 | 2006-02-22 | 信号伝送回路、icパッケージ及び実装基板 |
US11/359,510 US7501910B2 (en) | 2005-02-25 | 2006-02-23 | Signal transmission circuit, IC package, and mounting board |
US12/195,851 US8081487B2 (en) | 2005-02-25 | 2008-08-21 | Signal transmission circuit, IC package, and mounting board |
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JP2005051515 | 2005-02-25 | ||
JP2005051515 | 2005-02-25 | ||
JP2006045521A JP4855101B2 (ja) | 2005-02-25 | 2006-02-22 | 信号伝送回路、icパッケージ及び実装基板 |
Publications (2)
Publication Number | Publication Date |
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JP2006270935A true JP2006270935A (ja) | 2006-10-05 |
JP4855101B2 JP4855101B2 (ja) | 2012-01-18 |
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JP2006045521A Active JP4855101B2 (ja) | 2005-02-25 | 2006-02-22 | 信号伝送回路、icパッケージ及び実装基板 |
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US (2) | US7501910B2 (ja) |
JP (1) | JP4855101B2 (ja) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008294837A (ja) * | 2007-05-25 | 2008-12-04 | Fuji Xerox Co Ltd | 信号伝送回路及び信号伝送システム |
JP2009260919A (ja) * | 2008-03-17 | 2009-11-05 | Nippon Soken Inc | 受信装置 |
JP2012090057A (ja) * | 2010-10-19 | 2012-05-10 | Canon Inc | プリント回路板 |
JP2013128190A (ja) * | 2011-12-19 | 2013-06-27 | Hitachi Ltd | 半導体装置、信号伝送システム及び信号伝送方法 |
WO2013183318A1 (ja) * | 2012-06-07 | 2013-12-12 | 国立大学法人 筑波大学 | 高周波用配線構造体、高周波用実装基板、高周波用配線構造体の製造方法および高周波信号の波形整形方法 |
US10763214B2 (en) | 2018-05-25 | 2020-09-01 | Renesas Electronics Corporation | Semiconductor device |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4855101B2 (ja) * | 2005-02-25 | 2012-01-18 | 三菱電機株式会社 | 信号伝送回路、icパッケージ及び実装基板 |
US10153238B2 (en) * | 2014-08-20 | 2018-12-11 | Samsung Display Co., Ltd. | Electrical channel including pattern voids |
KR102251671B1 (ko) * | 2015-06-29 | 2021-05-13 | 삼성전자주식회사 | 송신 신호의 품질을 향상시키는 전자 장치 및 방법, 및 이를 위한 시스템 |
CN105808491A (zh) * | 2016-03-03 | 2016-07-27 | 北京小米移动软件有限公司 | 带状差分线、智能设备及改善智能设备usb眼图的方法 |
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2006
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- 2006-02-23 US US11/359,510 patent/US7501910B2/en active Active
-
2008
- 2008-08-21 US US12/195,851 patent/US8081487B2/en not_active Expired - Fee Related
Patent Citations (5)
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JPH0451607A (ja) * | 1990-06-19 | 1992-02-20 | Fujitsu Ltd | 負荷反射防止配線方法 |
JPH05265614A (ja) * | 1992-03-17 | 1993-10-15 | Hitachi Ltd | 双方向信号伝送回路 |
JP2001111408A (ja) * | 1999-10-08 | 2001-04-20 | Hitachi Ltd | 高速信号伝送配線実装構造 |
JP2003134177A (ja) * | 2001-10-25 | 2003-05-09 | Nec Corp | デジタル信号伝送回路の設計方法 |
JP2005150644A (ja) * | 2003-11-19 | 2005-06-09 | Japan Science & Technology Agency | 高周波用配線構造及び高周波用配線構造の形成方法並びに高周波信号の波形整形方法 |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008294837A (ja) * | 2007-05-25 | 2008-12-04 | Fuji Xerox Co Ltd | 信号伝送回路及び信号伝送システム |
JP4616861B2 (ja) * | 2007-05-25 | 2011-01-19 | 富士ゼロックス株式会社 | 信号伝送回路及び信号伝送システム |
JP2009260919A (ja) * | 2008-03-17 | 2009-11-05 | Nippon Soken Inc | 受信装置 |
JP4603069B2 (ja) * | 2008-03-17 | 2010-12-22 | 株式会社日本自動車部品総合研究所 | 受信装置 |
JP2012090057A (ja) * | 2010-10-19 | 2012-05-10 | Canon Inc | プリント回路板 |
JP2013128190A (ja) * | 2011-12-19 | 2013-06-27 | Hitachi Ltd | 半導体装置、信号伝送システム及び信号伝送方法 |
WO2013183318A1 (ja) * | 2012-06-07 | 2013-12-12 | 国立大学法人 筑波大学 | 高周波用配線構造体、高周波用実装基板、高周波用配線構造体の製造方法および高周波信号の波形整形方法 |
US10763214B2 (en) | 2018-05-25 | 2020-09-01 | Renesas Electronics Corporation | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
US20080315975A1 (en) | 2008-12-25 |
US8081487B2 (en) | 2011-12-20 |
JP4855101B2 (ja) | 2012-01-18 |
US7501910B2 (en) | 2009-03-10 |
US20060197679A1 (en) | 2006-09-07 |
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