JP2006108861A - 発振周波数制御回路 - Google Patents
発振周波数制御回路 Download PDFInfo
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- JP2006108861A JP2006108861A JP2004290011A JP2004290011A JP2006108861A JP 2006108861 A JP2006108861 A JP 2006108861A JP 2004290011 A JP2004290011 A JP 2004290011A JP 2004290011 A JP2004290011 A JP 2004290011A JP 2006108861 A JP2006108861 A JP 2006108861A
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- circuit
- frequency
- oscillation
- control circuit
- voltage
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- 230000010355 oscillation Effects 0.000 title claims abstract description 74
- 238000006243 chemical reaction Methods 0.000 claims description 35
- 230000001419 dependent effect Effects 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 7
- 230000006870 function Effects 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229920005994 diacetyl cellulose Polymers 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
- H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Superheterodyne Receivers (AREA)
Abstract
【解決手段】入力されるアナログ制御電圧に応じた周波数の発振信号を生成する発振回路から出力される、発振信号の周波数を計数する周波数カウンタと、入力されるデジタル値に応じて前記アナログ制御電圧を生成する複数のD/Aコンバータと、入力される制御信号に応じたデジタル値を生成するデジタル値生成回路と、周波数カウンタにより計数される周波数を基準の周波数と比較して、比較の結果に応じて前記デジタル値生成回路に入力する制御信号を生成する演算回路とを備える発振周波数制御回路を提供する。
【選択図】 図1
Description
12 D/Aコンバータ
13 アンプ回路
14 周波数カウンタ
15 演算回路
16 アップダウンカウンタ
111 V/I変換回路
113 電流制御発振回路
161 CPU
162 メモリ
Claims (6)
- 入力されるアナログ制御電圧に応じた周波数の発振信号を生成する発振回路から出力される、前記発振信号の周波数を計数する周波数カウンタと、
入力されるデジタル値に応じて前記アナログ制御電圧を生成する複数のD/Aコンバータと、
入力される制御信号に応じて前記デジタル値を生成するデジタル値生成回路と、
前記周波数カウンタにより計数される周波数を基準の周波数と比較して、前記比較の結果に応じて前記デジタル値生成回路に入力する前記制御信号を生成する演算回路と、
を備えることを特徴とする発振周波数制御回路。 - 請求項1に記載の発振周波数制御回路であって、
前記デジタル値生成回路はアップダウンカウンタであることを特徴とする発振周波数制御回路。 - 請求項1または2に記載の発振周波数制御回路であって、
前記発振回路を備えることを特徴とする発振周波数制御回路。 - 請求項3に記載の発振周波数制御回路であって、
前記発振回路は、
前記各D/Aコンバータの夫々に対応されて設けられる複数の電圧/電流変換回路と、
前記各電圧/電流変換回路の夫々から出力される電流を合成した値に応じた周波数の前記発振信号を生成する電流制御発振回路と、
を有することを特徴とする発振周波数制御回路。 - 請求項4に記載の発振周波数制御回路であって、
前記各電圧/電流変換回路の入力電圧の変化に対する出力電流の変化が前記電圧/電流変換回路ごとに異なること
を特徴とする発振周波数制御回路。 - 請求項5に記載の発振周波数制御回路であって、
前記電圧/電流変換回路から出力される電流の変域は、他の前記電圧/電流変換回路から出力される電流の前記デジタル値の最小変化量に対する変化量よりも大きくなるように設定されていること
を特徴とする発振周波数制御回路。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004290011A JP4434906B2 (ja) | 2004-10-01 | 2004-10-01 | 発振周波数制御回路 |
CN200510106820XA CN1756081B (zh) | 2004-10-01 | 2005-09-23 | 振荡频率控制电路 |
TW094133833A TWI310268B (en) | 2004-10-01 | 2005-09-28 | Controlling circuit for oscillation frequency |
KR1020050091927A KR100714351B1 (ko) | 2004-10-01 | 2005-09-30 | 발진 주파수 제어 회로 |
US11/240,830 US7310022B2 (en) | 2004-10-01 | 2005-09-30 | CPU-based oscillation frequency control circuit eliminating the need for a loop filter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004290011A JP4434906B2 (ja) | 2004-10-01 | 2004-10-01 | 発振周波数制御回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006108861A true JP2006108861A (ja) | 2006-04-20 |
JP4434906B2 JP4434906B2 (ja) | 2010-03-17 |
Family
ID=36124952
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004290011A Expired - Fee Related JP4434906B2 (ja) | 2004-10-01 | 2004-10-01 | 発振周波数制御回路 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7310022B2 (ja) |
JP (1) | JP4434906B2 (ja) |
KR (1) | KR100714351B1 (ja) |
CN (1) | CN1756081B (ja) |
TW (1) | TWI310268B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015139218A (ja) * | 2014-01-20 | 2015-07-30 | 三星電子株式会社Samsung Electronics Co.,Ltd. | デジタル位相固定ループとその制御方法及びこれを用いた超低電力送受信機 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070266263A1 (en) * | 2006-05-11 | 2007-11-15 | Silicon Integrated Systems Corp. | Speed adjustment system and method for performing the same |
JP5123942B2 (ja) | 2006-08-08 | 2013-01-23 | エヌエックスピー ビー ヴィ | 信号符号化変調搬送波信号の周波数を測定する装置および方法 |
KR100868734B1 (ko) * | 2006-12-15 | 2008-11-13 | 신코엠 주식회사 | 발진주파수를 가변시킬 수 있는 발진기 |
US7917799B2 (en) * | 2007-04-12 | 2011-03-29 | International Business Machines Corporation | Method and system for digital frequency clocking in processor cores |
JP5194663B2 (ja) * | 2007-09-13 | 2013-05-08 | 株式会社リコー | 半導体装置 |
US20090085678A1 (en) * | 2007-09-28 | 2009-04-02 | Ahmadreza Rofougaran | Method and system for signal generation via a digitally controlled oscillator |
US7945804B2 (en) * | 2007-10-17 | 2011-05-17 | International Business Machines Corporation | Methods and systems for digitally controlled multi-frequency clocking of multi-core processors |
DE102010061041A1 (de) * | 2010-12-06 | 2012-06-06 | Hella Kgaa Hueck & Co. | Vorrichtung mit einem spannungsgesteuerten Oszillator und Mitteln zur Eigenkalibrierung |
DE102012100427A1 (de) * | 2012-01-19 | 2013-07-25 | Hella Kgaa Hueck & Co. | Vorrichtung mit einem spannungsgesteuerten Oszillator und einer Schaltungsanordnung zum Ansteuern des Oszillators |
WO2014013289A1 (en) * | 2012-07-20 | 2014-01-23 | Freescale Semiconductor, Inc. | Calibration arrangement for frequency synthesizers |
CN104702364B (zh) * | 2013-12-10 | 2017-12-22 | 华为技术有限公司 | 时钟频率调整方法及装置 |
US10291389B1 (en) * | 2018-03-16 | 2019-05-14 | Stmicroelectronics International N.V. | Two-point modulator with matching gain calibration |
CN112782474A (zh) * | 2021-01-19 | 2021-05-11 | 国硅集成电路技术(无锡)有限公司 | 频率检测电路及频率检测方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SE384956B (sv) | 1975-06-17 | 1976-05-24 | Ericsson Telefon Ab L M | Anordning for frekvensreglering av en oscillatorkrets |
US5495207A (en) | 1994-08-31 | 1996-02-27 | International Business Machines Corporation | Differential current controlled oscillator with variable load |
KR100380580B1 (ko) * | 1995-08-26 | 2003-07-10 | 페어차일드코리아반도체 주식회사 | 에이엠밴드패스필터를이용한에프엠스테레오복조기 |
US5757238A (en) * | 1996-08-19 | 1998-05-26 | International Business Machines Corporation | Fast locking variable frequency phase-locked loop |
JPH10276084A (ja) | 1997-03-28 | 1998-10-13 | Sanyo Electric Co Ltd | Pllシンセサイザ集積回路 |
KR19990008563A (ko) * | 1997-07-02 | 1999-02-05 | 문정환 | 복수의 vcd를 갖는 아날로그 pll회로 |
JP3592269B2 (ja) * | 2001-07-19 | 2004-11-24 | 埼玉日本電気株式会社 | 位相同期回路 |
JP3838180B2 (ja) * | 2002-09-12 | 2006-10-25 | 富士通株式会社 | クロック生成回路及びクロック生成方法 |
DE10260713B4 (de) * | 2002-12-23 | 2005-05-04 | Infineon Technologies Ag | Digital steuerbarer Oszillator |
DE10262079A1 (de) * | 2002-12-23 | 2004-11-18 | Infineon Technologies Ag | Verfahren und Vorrichtung zum Extrahieren einer einem Datenstrom zugrundeliegenden Taktfrequenz |
JP2005049970A (ja) * | 2003-07-30 | 2005-02-24 | Renesas Technology Corp | 半導体集積回路 |
-
2004
- 2004-10-01 JP JP2004290011A patent/JP4434906B2/ja not_active Expired - Fee Related
-
2005
- 2005-09-23 CN CN200510106820XA patent/CN1756081B/zh not_active Expired - Fee Related
- 2005-09-28 TW TW094133833A patent/TWI310268B/zh active
- 2005-09-30 US US11/240,830 patent/US7310022B2/en active Active
- 2005-09-30 KR KR1020050091927A patent/KR100714351B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015139218A (ja) * | 2014-01-20 | 2015-07-30 | 三星電子株式会社Samsung Electronics Co.,Ltd. | デジタル位相固定ループとその制御方法及びこれを用いた超低電力送受信機 |
Also Published As
Publication number | Publication date |
---|---|
KR100714351B1 (ko) | 2007-05-04 |
CN1756081A (zh) | 2006-04-05 |
US20060071720A1 (en) | 2006-04-06 |
KR20060051906A (ko) | 2006-05-19 |
US7310022B2 (en) | 2007-12-18 |
CN1756081B (zh) | 2010-12-08 |
TW200614674A (en) | 2006-05-01 |
JP4434906B2 (ja) | 2010-03-17 |
TWI310268B (en) | 2009-05-21 |
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