JP2005116612A - Flip chip packaging method and electronic circuit device using the same - Google Patents

Flip chip packaging method and electronic circuit device using the same Download PDF

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JP2005116612A
JP2005116612A JP2003345664A JP2003345664A JP2005116612A JP 2005116612 A JP2005116612 A JP 2005116612A JP 2003345664 A JP2003345664 A JP 2003345664A JP 2003345664 A JP2003345664 A JP 2003345664A JP 2005116612 A JP2005116612 A JP 2005116612A
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electrode
metal
substrate
chip
metal paste
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Tatsuya Funaki
達弥 舟木
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a flip chip packaging method which can connect an electrode and metal particulate with high reliability without needing high heating and pressurization even if oxide and contamination exist on the surface of the electrode. <P>SOLUTION: Metal paste 20 wherein the metal particulate 21 whose mean particle diameter is 1-100 nm is distributed in solvent 22 is supplied on the electrode 2 of a substrate 1. The electrode 11 of a chip 10 and the electrode 2 of the substrate 1 are aligned interposing the metal paste 20, ultrasonic vibration U is impressed to at least one of a chip side and a substrate side, and the surface of the electrode at an interface with the metal paste 20 is activated. After that, heating is performed at a temperature which is at least boiling point of the solvent 22 which constitutes the metal paste 20 and at most melting point of the metal particulate 21, the solvent 22 is evaporated, and metal bonding of the electrode 11 of the chip 10 and the electrode 2 of the substrate 1 is performed through a metal sintered body 23. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、回路素子の電極と基板の電極とを対向させ、電極間を電気的および機械的に接続するフリップチップ実装方法、およびこのフリップチップ実装方法を用いて製造した電子回路装置に関するものである。 The present invention relates to a flip chip mounting method in which an electrode of a circuit element and an electrode of a substrate are opposed to each other, and the electrodes are electrically and mechanically connected, and an electronic circuit device manufactured using the flip chip mounting method. is there.

近年、携帯電話やパソコンなどの高性能化、小型化、低背化のため、フリップチップ実装方法の採用が増えている。フリップチップ実装は、ベアチップの電極と基板の電極とを対向させ、電極間を電気的および機械的に接続するものである。代表的なフリップチップ実装方法は、金属結合によるものと接着によるものとに大別でき、それらはさらに下記のように分類できる。
（１）金属結合
（１−１）液相−固相接合：チップ電極にはんだバンプを形成して、はんだバンプと基板電極とをはんだ付けするもの、あるいはチップ電極にＡｕバンプを形成すると共に、基板電極にはんだを供給して、Ａｕバンプとはんだとをはんだ付けするもの。
（１−２）固相−固相接合：チップ電極にＡｕバンプを形成して、Ａｕバンプと基板電極とを熱圧着接合や超音波接合するもの。
（２）接着
（２−１）導電性樹脂による接着：チップ電極にバンプを形成して、バンプと基板電極とを導電性樹脂で接着するもの。
（２−２）異方性導電性樹脂による接着：チップ電極にバンプを形成し、チップと基板とを異方性導電性樹脂で接着して、バンプと基板電極との電気的接続を導電粒子を介した接触で得るもの。
（２−３）絶縁性樹脂による接着：チップ電極にバンプを形成し、チップと基板を絶縁性樹脂で接着して、バンプと基板電極との電気的接続を直接接触で得るもの。 In recent years, the flip chip mounting method has been increasingly used to improve the performance, size, and height of mobile phones and personal computers. In flip chip mounting, the electrodes of the bare chip and the electrodes of the substrate are opposed to each other, and the electrodes are electrically and mechanically connected. Typical flip chip mounting methods can be broadly classified into those by metal bonding and those by bonding, and they can be further classified as follows.
(1) Metal bond (1-1) Liquid phase-solid phase bonding: A solder bump is formed on the chip electrode and the solder bump and the substrate electrode are soldered, or an Au bump is formed on the chip electrode. Solder is supplied to the substrate electrode, and Au bumps and solder are soldered.
(1-2) Solid phase-solid phase bonding: Au bumps are formed on chip electrodes, and Au bumps and substrate electrodes are bonded by thermocompression bonding or ultrasonic bonding.
(2) Adhesion (2-1) Adhesion with conductive resin: A bump formed on a chip electrode, and the bump and the substrate electrode are bonded with a conductive resin.
(2-2) Adhesion with anisotropic conductive resin: Bumps are formed on the chip electrode, the chip and the substrate are bonded with the anisotropic conductive resin, and the electrical connection between the bump and the substrate electrode is made of conductive particles. What you get through contact.
(2-3) Adhesion with insulating resin: A bump is formed on a chip electrode, the chip and a substrate are bonded with an insulating resin, and an electrical connection between the bump and the substrate electrode is obtained by direct contact.

一般的に、金属結合と接着とを比較すると、金属結合は強い結合力のため、高信頼性な接続であるが、接続するためには高い加熱や加圧あるいは超音波を必要とするので、チップや基板の損傷確率が高くなる。逆に、接着は弱い結合力を基本としているので、チップや基板の損傷確率は低いが、接続信頼性が低い。そこで、これらの欠点を解消するべく、現在、フリップチップ実装方法の開発が進んでいる。 Generally, when comparing metal bonding and adhesion, metal bonding is a highly reliable connection due to its strong bonding force, but high heating, pressurization, or ultrasonic waves are required for connection. The probability of damage to the chip or substrate increases. On the contrary, since the adhesion is based on a weak bonding force, the damage probability of the chip and the substrate is low, but the connection reliability is low. Therefore, in order to solve these disadvantages, development of a flip chip mounting method is currently in progress.

特許文献１には、接続材料としてナノレベルの粒子径の金属微粒子と溶剤とからなる金属ペーストを用いた実装方法が提案されている。このような金属ペーストは次のような特徴を持つ。
（１）ナノレベルの金属微粒子は、ミクロンレベルの金属粒子と比較して表面が活性なため、金属微粒子を含む金属ペーストを低温で焼結（粒子間の金属結合）することができる。
（２）溶媒は、金属微粒子の焼結温度より低い温度で分解・蒸発などにより除去できるものが選択できるので、金属微粒子を焼結すると、ほぼ原料金属の物性を持つ焼結体が得られる。
このような金属微粒子を含む金属ペーストを、チップと基板の電極間に塗布して焼結すると、金属微粒子の焼結体を介してチップと基板の電気的な接続を得ることができる。接続するために高い加熱や加圧あるいは超音波を必要としないので、チップや基板の損傷確率が低くなるという利点がある。 Patent Document 1 proposes a mounting method using a metal paste composed of metal fine particles having a nano-level particle diameter and a solvent as a connection material. Such metal paste has the following characteristics.
(1) Since nano-level metal fine particles have a more active surface than micron-level metal particles, a metal paste containing metal fine particles can be sintered (metal bonding between particles) at a low temperature.
(2) A solvent that can be removed by decomposition or evaporation at a temperature lower than the sintering temperature of the metal fine particles can be selected. Therefore, when the metal fine particles are sintered, a sintered body having almost the physical properties of the raw metal is obtained.
When such a metal paste containing metal fine particles is applied and sintered between the electrodes of the chip and the substrate, electrical connection between the chip and the substrate can be obtained through the sintered body of metal fine particles. Since high heating, pressurization, or ultrasonic waves are not required for connection, there is an advantage that the probability of damage to the chip or the substrate is lowered.

しかし、チップ電極や基板電極の電極材料としてＡｌやＡｌ合金、Ｃｕなどの卑金属が使用された場合や、貴金属を使用しても表面が汚れている場合には、電極表面に酸化物や汚染物が存在するので、これら酸化物や汚染物を除去しない限り、電極と金属微粒子とが高い信頼性の接続（金属結合による低抵抗・高強度の接続）をすることができない。
特開平９−３２６４１６号公報 However, if a base metal such as Al, Al alloy, or Cu is used as the electrode material of the chip electrode or the substrate electrode, or if the surface is dirty even if noble metal is used, oxides or contaminants on the electrode surface Therefore, unless these oxides and contaminants are removed, the electrode and the metal fine particle cannot be connected with high reliability (low resistance and high strength connection by metal bonding).
Japanese Patent Laid-Open No. 9-326416

そこで、本発明の目的は、チップや基板の損傷確率が低く、かつ電極表面に酸化物や汚染物が存在しても、電極と金属微粒子とを高い信頼性で接続できるフリップチップ実装方法およびこの実装方法を用いた電子回路装置を提供することにある。 Accordingly, an object of the present invention is to provide a flip chip mounting method capable of connecting an electrode and a metal fine particle with high reliability even when the probability of damage to a chip or a substrate is low and oxides or contaminants are present on the electrode surface. An object of the present invention is to provide an electronic circuit device using a mounting method.

上記目的を達成するため、請求項１に係る発明は、回路素子の電極と基板の電極とを対向させ、電極間を電気的および機械的に接続するフリップチップ実装方法において、上記回路素子の電極または基板の電極上の少なくとも一方に、平均粒径が１〜１００ｎｍの金属微粒子を溶媒中に分散させた金属ペーストを供給する工程と、上記回路素子の電極と基板の電極とを上記金属ペーストを間にして位置合わせする工程と、上記回路素子側および基板側の少なくとも一方に超音波振動を印加し、上記金属ペーストとの界面における電極表面を活性化させる工程と、上記金属ペーストを構成する溶媒の沸点以上、金属微粒子の融点以下の温度で加熱し、溶媒を蒸発させて回路素子の電極と基板の電極とを電気的および機械的に接続する工程と、を有することを特徴とするフリップチップ実装方法を提供する。 To achieve the above object, the invention according to claim 1 is directed to a flip-chip mounting method in which an electrode of a circuit element and an electrode of a substrate are opposed to each other, and the electrodes are electrically and mechanically connected. Alternatively, a step of supplying a metal paste in which metal fine particles having an average particle size of 1 to 100 nm are dispersed in a solvent is applied to at least one of the electrodes on the substrate, and the metal paste is combined with the circuit element electrode and the substrate electrode. A step of positioning in between, a step of applying ultrasonic vibration to at least one of the circuit element side and the substrate side to activate the electrode surface at the interface with the metal paste, and a solvent constituting the metal paste Heating at a temperature not lower than the boiling point of the metal fine particle and not higher than the melting point of the metal fine particles, evaporating the solvent, and electrically and mechanically connecting the electrode of the circuit element and the electrode of the substrate, Providing a flip chip mounting method which is characterized in that.

請求項５に係る発明は、回路素子の電極と基板の電極とを対向させ、電極間を電気的および機械的に接続してなる電子回路装置において、請求項１ないし３のいずれかに記載の方法を用いて回路素子の電極と基板の電極とを接続してなることを特徴とする電子回路装置を提供する。 The invention according to claim 5 is an electronic circuit device according to any one of claims 1 to 3, wherein an electrode of a circuit element and an electrode of a substrate are opposed to each other, and the electrodes are electrically and mechanically connected. Provided is an electronic circuit device comprising a circuit element electrode and a substrate electrode connected using a method.

請求項１では、加熱工程、つまり溶媒を蒸発させて回路素子の電極と基板の電極とを電気的に接続する工程の前に、回路素子側および基板側の少なくとも一方に超音波振動を印加し、金属ペーストとの界面における電極表面を活性化させる工程を設ける。
超音波振動を印加すると、金属ペースト中に過圧と負圧とが生じ、この負圧部で金属ペーストが引き裂かれて空洞が生じる。この現象はキャビテーションと呼ばれる。この空洞は正の半サイクル時に金属ペーストの液圧によって押し潰されて瞬時に壊滅し、この時の金属ペーストを構成する原子の衝突により強力な衝撃波が局所的に発生する。このように発生した衝撃波が電極表面に強い衝撃を与えて、電極表面に存在する酸化物や汚染物を除去する。
上記のメカニズムで活性化した電極表面が、超音波印加終了後も金属ペーストで覆われて電極表面と外部雰囲気との接触を絶つので、電極表面の再酸化や再汚染は抑制され、電極表面の活性状態が維持される。
加熱工程では、チップおよび基板の電極と金属微粒子との金属結合、金属微粒子間の金属結合（焼結）、金属ペースト内の金属微粒子を除く成分（主に溶媒）の除去を行う。チップおよび基板の電極と金属微粒子とが金属結合するのは、電極表面が超音波印加によって活性化され、しかも金属微粒子表面は元来活性だからである。金属微粒子同士が金属結合するのは、焼結のメカニズムによるが、一般的な金属粒子（平均粒径が１００ｎｍを超える金属粒子）と比較して、平均粒径が１〜１００ｎｍの金属微粒子の場合には、表面が活性なため、比較的低温（１００℃〜３００℃）で焼結することができる。 In claim 1, before the heating step, that is, the step of evaporating the solvent to electrically connect the electrode of the circuit element and the electrode of the substrate, ultrasonic vibration is applied to at least one of the circuit element side and the substrate side. A step of activating the electrode surface at the interface with the metal paste is provided.
When ultrasonic vibration is applied, an overpressure and a negative pressure are generated in the metal paste, and the metal paste is torn at the negative pressure portion to generate a cavity. This phenomenon is called cavitation. This cavity is crushed by the liquid pressure of the metal paste during the positive half cycle and instantly destroyed, and a strong shock wave is locally generated by collision of atoms constituting the metal paste at this time. The shock wave generated in this way gives a strong impact to the electrode surface and removes oxides and contaminants present on the electrode surface.
The electrode surface activated by the above mechanism is covered with a metal paste even after the application of ultrasonic waves and the electrode surface is disconnected from the external atmosphere, so that reoxidation and recontamination of the electrode surface are suppressed, The active state is maintained.
In the heating step, metal bonds between the chip and substrate electrodes and the metal fine particles, metal bonds between the metal fine particles (sintering), and removal of components (mainly solvent) excluding the metal fine particles in the metal paste are performed. The reason why the chip and substrate electrodes and metal fine particles are metal-bonded is that the electrode surface is activated by applying ultrasonic waves, and the metal fine particle surface is originally active. The metal fine particles are metal-bonded depending on the sintering mechanism, but in the case of metal fine particles having an average particle diameter of 1 to 100 nm as compared with general metal particles (metal particles having an average particle diameter exceeding 100 nm). Since the surface is active, it can be sintered at a relatively low temperature (100 ° C. to 300 ° C.).

請求項２のように、超音波振動の印加方向が電極面に対して垂直方向とするのがよい。
超音波の印加方向は、電極面に対して垂直方向でも平行方向でも電極表面の活性化の効果があるが、超音波振動の方向が電極面に対して垂直方向の方がより電極表面の活性化が生じやすく、しかも電極同士の摩擦を発生させないので、効果的である。 As in claim 2, it is preferable that the application direction of the ultrasonic vibration be a direction perpendicular to the electrode surface.
The application direction of ultrasonic waves has the effect of activating the electrode surface both in the direction perpendicular to and parallel to the electrode surface, but the direction of ultrasonic vibration is more active in the direction perpendicular to the electrode surface. This is effective because it does not generate friction between the electrodes.

請求項３のように、金属ペーストを供給する工程において、金属ペーストを基板の電極に対して供給するのがよい。
金属ペーストを塗布すべき電極は、基板の電極だけでなく、チップの電極であってもよいが、基板の電極の場合には、次のような利点がある。
すなわち、基板製造工程における電極・配線形成工程でも、金属微粒子を含む金属ペーストを使用することができる。そのため、金属ペーストを供給する装置として、電極・配線形成工程で使用した設備を共用することが可能になる。このような設備共用により、工程簡略化、設備開発費の抑制と同時に、基板製造における電極ピッチ設計ルールと実装工程における電極ピッチ設計ルールとが乖離するという問題を解消できる。 According to a third aspect of the present invention, in the step of supplying the metal paste, the metal paste is preferably supplied to the electrode of the substrate.
The electrode to which the metal paste is to be applied may be not only a substrate electrode but also a chip electrode, but the substrate electrode has the following advantages.
That is, a metal paste containing metal fine particles can also be used in the electrode / wiring forming process in the substrate manufacturing process. Therefore, the equipment used in the electrode / wiring forming process can be shared as a device for supplying the metal paste. Such facility sharing can solve the problem that the electrode pitch design rule in the board manufacturing and the electrode pitch design rule in the mounting process are different from each other while simplifying the process and suppressing the facility development cost.

請求項４では、請求項１ないし３のいずれかに記載の方法を用いて電子回路装置を製造するので、接続信頼性が高く、かつ安価な電子回路装置を得ることができる。 In claim 4, since the electronic circuit device is manufactured by using the method according to any one of claims 1 to 3, an electronic circuit device having high connection reliability and low cost can be obtained.

請求項１に記載の発明によれば、平均粒径が１〜１００ｎｍの金属微粒子を溶媒中に分散させた金属ペーストを用い、超音波振動を印加して金属ペーストとの界面における電極表面を活性化させ、さらに金属ペーストを構成する溶媒の沸点以上、金属微粒子の融点以下の温度で加熱し、溶媒を蒸発させて回路素子と基板の電極同士を接続しているので、接続時に高い加熱や加圧を必要とせず、印加する超音波も超音波接合のような被接合面を変形させるものではなく、電極表面を活性化させるだけであるから、チップや基板の損傷確率が低い。このように損傷確率を低くしながら、チップと基板の電極間を金属微粒子の焼結体を介して金属結合できるので、高い接続信頼性（低抵抗・高接合強度）を実現できる。 According to the first aspect of the present invention, a metal paste in which metal fine particles having an average particle diameter of 1 to 100 nm are dispersed in a solvent is used to activate the electrode surface at the interface with the metal paste by applying ultrasonic vibration. Furthermore, heating is performed at a temperature not lower than the boiling point of the solvent constituting the metal paste and not higher than the melting point of the metal fine particles, and the solvent is evaporated to connect the circuit element and the substrate electrodes. No pressure is required, and the applied ultrasonic wave does not deform the surface to be bonded as in ultrasonic bonding, but only activates the electrode surface, so the probability of damage to the chip or substrate is low. Thus, since the damage probability can be lowered and the metal between the chip and the electrode of the substrate can be bonded via the sintered body of the metal fine particles, high connection reliability (low resistance and high bonding strength) can be realized.

また、超音波印加によって電極表面に存在する酸化物や汚染物が除去されるので、従来の常温接合のような接続前処理、接続時の清浄雰囲気、被接合面の高い平滑度、被接合面同士の高い平行度が必須でなくなる。
すなわち、従来の常温接合では、被接合面への原子ビーム照射などの接続前処理によって、被接合面の酸化物や汚染物の除去を行って表面を活性化させるのに対し、本発明では接続時の超音波印加によって表面を活性化させるので、接続前処理は必要でなくなる。 In addition, the application of ultrasonic waves removes oxides and contaminants present on the electrode surface, so connection pretreatment like conventional room temperature bonding, clean atmosphere during connection, high smoothness of the surface to be bonded, surface to be bonded A high degree of parallelism between them is no longer essential.
In other words, in the conventional room temperature bonding, the surface is activated by removing oxides and contaminants on the surface to be bonded by pre-connection processing such as atomic beam irradiation on the surface to be bonded. Since the surface is activated by the application of ultrasonic waves, pre-connection treatment is not necessary.

また、常温接合では、接続時の雰囲気を超高真空などの清浄雰囲気とすることで、被接合面の再酸化や再汚染を抑制して活性状態を維持させるのに対し、本発明では超音波印加によって活性化した電極表面をそのまま金属ペーストで覆い続けることで、電極表面と外部雰囲気との接触を絶ち、活性状態を維持させるので、接続時の清浄雰囲気が不要となる。
さらに、常温接合では、被接合面を構成する金属原子同士を結合力の作用する距離まで近づけるために、接続する前の被接合面を極めて平滑にし、かつ接続する時の被接合面同士の平行度を極めて良くする必要がある。これに対し、本発明では被接合面の一方が金属ペーストを構成する金属微粒子となるので、金属微粒子が溶媒中を移動して被接合面の他方（電極）に金属原子同士の結合力が作用する距離まで近づくことは容易であり、被接合面の高い平滑度や高い平行度は不要である。
上記のように接続前処理や清浄雰囲気などが必須条件でないので、作業工程が簡略化され、生産性の向上を達成することができる。
但し、接続前処理や、接続時の清浄雰囲気、被接合面である電極面の平滑化などの処理を行っても本発明の効果は得られることは勿論である。 Also, in normal temperature bonding, the atmosphere during connection is a clean atmosphere such as ultra-high vacuum, so that reoxidation and recontamination of the surfaces to be bonded are suppressed and the active state is maintained. By continuously covering the electrode surface activated by application with the metal paste as it is, the contact between the electrode surface and the external atmosphere is cut off and the active state is maintained, so that a clean atmosphere at the time of connection becomes unnecessary.
Furthermore, in normal temperature bonding, in order to bring the metal atoms constituting the surfaces to be bonded close to the distance where the bonding force acts, the surfaces to be bonded before connection are made extremely smooth and the surfaces to be bonded when connected are parallel to each other. The degree needs to be very good. On the other hand, in the present invention, since one of the surfaces to be joined becomes the metal fine particles constituting the metal paste, the metal fine particles move in the solvent, and the bonding force between the metal atoms acts on the other (electrode) of the surfaces to be joined. It is easy to get close to the distance, and high smoothness and high parallelism of the surfaces to be joined are unnecessary.
As described above, connection pretreatment, clean atmosphere, and the like are not essential conditions, so that the work process is simplified and productivity can be improved.
However, it is needless to say that the effects of the present invention can be obtained even if processing such as pre-connection treatment, clean atmosphere at the time of connection, and smoothing of the electrode surface, which is the surface to be joined, are performed.

以下に、本発明の実施の形態を、実施例を参照して説明する。 Embodiments of the present invention will be described below with reference to examples.

図１は本発明にかかるフリップチップ実装方法により製造された電子回路装置の第１実施例を示す。
この電子回路装置は、基板１の電極２と回路素子（以下、チップと呼ぶ）１０の電極１１とを対向させ、電極間を金属焼結体２３を介して金属結合させたものである。 FIG. 1 shows a first embodiment of an electronic circuit device manufactured by a flip chip mounting method according to the present invention.
In this electronic circuit device, an electrode 2 of a substrate 1 and an electrode 11 of a circuit element (hereinafter referred to as a chip) 10 are opposed to each other, and the electrodes are metal-bonded via a metal sintered body 23.

基板１は、ガラスエポキシ基板などの樹脂基板、アルミナなどの焼成基板などで構成されている。基板１の上面には、チップ搭載位置の範囲内に複数の電極２が形成されており、基板１の上面のほぼ全面が絶縁保護膜３が形成されている。保護膜３の電極２と対応する部位は開口しており、この開口部の周囲に後述する金属ペーストの広がりを防止するためのダム３ａが形成されている。なお、ダム３ａは必須のものではなく、ペーストが広がらないチップや基板（電極部以外の部分とペーストの濡れが悪いもの）の場合は、ダム構造は不要である。電極２は、Ａｕ、Ａｇ、Ｃｕなどの単層構造としてもよいし、例えばＡｕ／Ｎｉ／Ｃｕの多層構造としてもよい。電極２の配線幅は８０〜１２０μｍ程度に形成され、配線厚みは１５〜５０μｍ程度に形成されている。生産性を向上させるため、基板１上には電極２の同一パターンが複数個形成され、チップ実装後、分割してもよい。なお、図示していないが、基板１上に表面実装部品などを搭載するための別の電極を設けてもよい。 The substrate 1 is composed of a resin substrate such as a glass epoxy substrate, a fired substrate such as alumina, and the like. A plurality of electrodes 2 are formed within the range of the chip mounting position on the upper surface of the substrate 1, and an insulating protective film 3 is formed on almost the entire upper surface of the substrate 1. A portion corresponding to the electrode 2 of the protective film 3 is opened, and a dam 3a for preventing the spread of a metal paste described later is formed around the opening. Note that the dam 3a is not essential, and a dam structure is not necessary in the case of a chip or a substrate where paste does not spread (a portion other than the electrode portion and the paste is poorly wetted). The electrode 2 may have a single layer structure such as Au, Ag, or Cu, or may have a multilayer structure of Au / Ni / Cu, for example. The electrode 2 has a wiring width of about 80 to 120 μm and a wiring thickness of about 15 to 50 μm. In order to improve productivity, a plurality of the same patterns of the electrodes 2 may be formed on the substrate 1 and divided after chip mounting. Although not shown, another electrode for mounting a surface mount component or the like may be provided on the substrate 1.

チップ１０は、例えば半導体素子や表面弾性波素子などの小型素子であり、その下面に形成されたチップ電極１１は、Ａｌ、Ａｌ合金（９０％以上のＡｌを含有し、Ａｌ−１％Ｃｕ，Ａｌ−１％Ｓｉ，Ａｌ−１％Ｓｉ−０．５％ＣｕなどＣｕやＳｉが添加されていてもよい）、Ｃｕ、Ａｕなどよりなり、電極厚みは１〜２μｍ程度である。チップ１０は予め個片に分割されている。
なお、チップ１０の表面にも絶縁保護膜１２が形成され、チップ電極１１部分にはダム１２ａが形成されている。
なお、基板１およびチップ１０の保護膜３，１２は必要に応じて設けられるものである。 The chip 10 is a small element such as a semiconductor element or a surface acoustic wave element. A chip electrode 11 formed on the lower surface of the chip 10 is made of Al, Al alloy (containing 90% or more Al, Al-1% Cu, Cu or Si may be added such as Al-1% Si, Al-1% Si-0.5% Cu), Cu, Au, etc., and the electrode thickness is about 1 to 2 μm. The chip 10 is divided into pieces in advance.
An insulating protective film 12 is also formed on the surface of the chip 10, and a dam 12a is formed on the chip electrode 11 portion.
The protective films 3 and 12 of the substrate 1 and the chip 10 are provided as necessary.

基板１の電極２とチップ１０の電極１１とを金属結合させる金属焼結体２３は、後述する金属微粒子２１を溶媒２２中に分散させた金属ペースト２０を少なくとも一方の電極上に塗布し、この金属ペースト２０を構成する溶媒２２の沸点以上、金属微粒子２１の融点以下の温度で加熱し、溶媒２２を蒸発させて形成したものである。金属微粒子２１と電極２，１１とが金属結合し、かつ金属微粒子２１同士も金属結合しているので、接続信頼性が非常に高い。 The metal sintered body 23 for metal-bonding the electrode 2 of the substrate 1 and the electrode 11 of the chip 10 is obtained by applying a metal paste 20 in which metal fine particles 21 described later are dispersed in a solvent 22 on at least one electrode. The metal paste 20 is formed by heating at a temperature not lower than the boiling point of the solvent 22 and not higher than the melting point of the metal fine particles 21 to evaporate the solvent 22. Since the metal fine particles 21 and the electrodes 2 and 11 are metal-bonded and the metal fine particles 21 are also metal-bonded, the connection reliability is very high.

次に、図１に示す電子回路装置の製造方法、特にフリップチップ実装方法を図２を参照しながら説明する。
（Ａ）は基板１の電極２上に金属微粒子２１を溶媒２２中に分散させた金属ペースト２０を供給する工程を示す。金属ペースト２０の供給には、インクジェットやディスペンサによる吐出供給、スクリーン印刷や転写など各種供給方法を用いることができる。供給量は、フリップチップ実装後にチップ電極１１と基板電極２の隙間を埋めるのに必要な量以上で、隣接する電極同士を接続してしまう量未満であればよい。例えば、１００μｍ□の電極の場合、高さ１０〜１００μｍ程度とすればよい。
金属ペースト２０は、主に平均粒径が１〜１００ｎｍの金属微粒子２１と、液体である溶媒２２とで構成されている。金属微粒子２１の組成は、例えばＡｕ，Ａｇ，Ｃｕ，Ｎｉなどであり、溶媒２２としては金属の融点より低い沸点を有する液体を選択でき、例えばテルピネオール，トルエン，テトラデカンなどを用いることができる。なお、金属微粒子２１と溶媒２２以外に、少量の分散剤、有機バインダー、補足物質が添加されていてもよい。さらに、電極材料に対して還元作用を有する物質を添加してもよい。 Next, a method for manufacturing the electronic circuit device shown in FIG. 1, particularly a flip chip mounting method, will be described with reference to FIG.
(A) shows a step of supplying a metal paste 20 in which metal fine particles 21 are dispersed in a solvent 22 on the electrode 2 of the substrate 1. For the supply of the metal paste 20, various supply methods such as discharge supply by ink jet or dispenser, screen printing or transfer can be used. The supply amount is not less than the amount necessary for filling the gap between the chip electrode 11 and the substrate electrode 2 after flip-chip mounting and less than the amount connecting adjacent electrodes. For example, in the case of an electrode of 100 μm □, the height may be about 10 to 100 μm.
The metal paste 20 is mainly composed of metal fine particles 21 having an average particle diameter of 1 to 100 nm and a solvent 22 that is a liquid. The composition of the metal fine particles 21 is, for example, Au, Ag, Cu, Ni, etc., and a liquid having a boiling point lower than the melting point of the metal can be selected as the solvent 22, and for example, terpineol, toluene, tetradecane, etc. can be used. In addition to the metal fine particles 21 and the solvent 22, a small amount of a dispersant, an organic binder, and a supplementary substance may be added. Furthermore, a substance having a reducing action on the electrode material may be added.

（Ｂ）は基板１の電極２とチップ１０の電極１１とを位置合わせする工程を示す。この工程は、従来のフリップチップ実装方法と同様の方法で行えばよい。
なお、電極２，１１と金属ペースト２０とを接触させた後、後述する加熱工程で金属結合を行うまでの間、金属ペースト２０は液体挙動を示すので、電極２，１１は金属ペースト２０の表面張力に起因するセルフアライメント作用によって、高精度の位置決めを自発的に行うことができる。
また、セルフアライメント作用は、金属ペースト２０の表面張力と正の相関があるので、金属ペースト２０の表面張力を主に支配する溶媒２２として、表面張力の高い溶媒を選択することで、その能力を向上させることができる。 (B) shows the process of aligning the electrode 2 of the substrate 1 and the electrode 11 of the chip 10. This step may be performed by a method similar to the conventional flip chip mounting method.
Since the metal paste 20 exhibits a liquid behavior after the electrodes 2 and 11 are brought into contact with the metal paste 20 until metal bonding is performed in a heating process described later, the electrodes 2 and 11 are on the surface of the metal paste 20. High-accuracy positioning can be performed spontaneously by the self-alignment effect resulting from the tension.
In addition, since the self-alignment action has a positive correlation with the surface tension of the metal paste 20, the ability of the self-alignment function can be increased by selecting a solvent having a high surface tension as the solvent 22 that mainly controls the surface tension of the metal paste 20. Can be improved.

（Ｃ）はチップ１０側から超音波を印加する工程を示す。すなわち、チップ１０の背面をツール１３で吸着保持し、電極面に対して垂直方向の超音波振動Ｕを印加すると、超音波印加によりチップ１０および基板１の金属ペースト２０と接する電極表面の酸化物や汚染物が除去されて金属表面が活性化される。以下に、そのメカニズムについて詳しく説明する。
電極２，１１と金属ペースト２０とを接触させ、チップ１０を介して金属ペースト２０に超音波振動Ｕを印加すると、金属ペースト２０中には過圧部と負圧部とが生じ、この負圧部で金属ペースト２０が引き裂かれて空洞が生じる。この空洞は正の半サイクル時に金属ペースト２０の液圧によって押し潰されて瞬時に壊滅し、この時の金属ペースト２０を構成する原子の衝突により強力な衝撃波が局所的に発生する。このように発生した衝撃波が電極表面に強い衝撃を与えて、電極表面に存在する酸化物や汚染物を除去する。
上記メカニズムで活性化した電極表面が、超音波印加終了後も金属ペースト２０で覆われて電極表面と外部雰囲気との接触を絶つので、電極表面の再酸化や再汚染は抑制され、電極表面の活性状態が維持される。
超音波印加は、従来の超音波接合方式のフリップチップ実装用設備を用いれば、容易に実施できる。ここで、一般的な超音波接合方式のフリップチップ実装用設備の場合、超音波の振動方向は電極面に対して平行な方向であるが、本実施例では超音波を電極面に対してほぼ垂直方向としてある。この場合は、平行な方向に比べてキャビテーションが発生しやすく、電極表面の活性化が生じやすくなり、より高い接続信頼性（低抵抗、高強度）が得られるからである。超音波の条件としては、例えば超音波周波数２０ｋＨｚ〜１００ｋＨｚ、超音波振動振幅０．１μｍ〜５μｍである。この工程の雰囲気は、低酸素雰囲気とするのがよい。低酸素雰囲気の場合、電極表面の活性状態をより安定に維持でき、接続信頼性が向上するからである。 (C) shows a step of applying ultrasonic waves from the chip 10 side. That is, when the back surface of the chip 10 is adsorbed and held by the tool 13 and an ultrasonic vibration U in the direction perpendicular to the electrode surface is applied, the oxide on the surface of the electrode in contact with the chip 10 and the metal paste 20 of the substrate 1 by the application of ultrasonic waves. And contaminants are removed and the metal surface is activated. The mechanism will be described in detail below.
When the electrodes 2 and 11 are brought into contact with the metal paste 20 and the ultrasonic vibration U is applied to the metal paste 20 via the chip 10, an overpressure portion and a negative pressure portion are generated in the metal paste 20. The metal paste 20 is torn at the part to form a cavity. This cavity is crushed by the liquid pressure of the metal paste 20 in the positive half cycle and instantaneously destroyed, and a powerful shock wave is locally generated by collision of atoms constituting the metal paste 20 at this time. The shock wave generated in this way gives a strong impact to the electrode surface and removes oxides and contaminants present on the electrode surface.
The electrode surface activated by the above mechanism is covered with the metal paste 20 even after the application of ultrasonic waves and the contact between the electrode surface and the external atmosphere is cut off, so that reoxidation and recontamination of the electrode surface are suppressed, The active state is maintained.
The application of ultrasonic waves can be easily performed by using conventional ultrasonic bonding type flip-chip mounting equipment. Here, in the case of a general ultrasonic bonding type flip-chip mounting facility, the vibration direction of the ultrasonic wave is parallel to the electrode surface, but in the present embodiment, the ultrasonic wave is almost directed to the electrode surface. It is as vertical direction. In this case, cavitation is more likely to occur than in the parallel direction, activation of the electrode surface is likely to occur, and higher connection reliability (low resistance, high strength) can be obtained. The ultrasonic conditions are, for example, an ultrasonic frequency of 20 kHz to 100 kHz and an ultrasonic vibration amplitude of 0.1 μm to 5 μm. The atmosphere in this step is preferably a low oxygen atmosphere. This is because, in a low oxygen atmosphere, the active state of the electrode surface can be maintained more stably and connection reliability is improved.

（Ｄ）は加熱工程を示す。加熱工程では、金属ペースト２０に含まれる溶媒２２を蒸発させて、電極２，１１と金属微粒子２１との金属結合、金属微粒子２１間の金属結合（焼結）を行う。電極２，１１と金属微粒子２１とが金属結合するのは、電極表面が工程（Ｃ）で活性化され、金属微粒子２１は元来活性だからである。金属微粒子２１間が金属結合するのは、焼結のメカニズムによるが、粒子径１００ｎｍを超える一般的な金属粒子と比較して、粒子径１〜１００ｎｍの金属微粒子の場合は、低温で焼結することができる。金属微粒子２１以外の部分（主に溶媒）を除去できるのは、溶媒２２の沸点以上の温度に加熱するからである。したがって、加熱温度は溶媒２２の沸点以上で、かつ金属微粒子２１を構成する金属の融点以下の温度範囲から選択できる。
加熱方法としては、例えば基板１上にチップ１０を仮保持した状態の電子回路装置を焼成炉やリフロー炉などの加熱設備に投入してもよいし、超音波接合方式のフリップチップ実装設備に設けられている加熱機構を用いて加熱してもよい。加熱条件としては、例えば加熱温度１００℃〜３００℃、加熱時間５分〜６０分である。なお、加熱工程を低酸素雰囲気中で実施した場合、電極表面の活性状態をより安定に維持でき、接続信頼性が向上するため好ましい。 (D) shows a heating process. In the heating step, the solvent 22 contained in the metal paste 20 is evaporated to perform metal bonding between the electrodes 2 and 11 and the metal fine particles 21 and metal bonding (sintering) between the metal fine particles 21. The reason why the electrodes 2 and 11 and the metal fine particles 21 are metal-bonded is that the electrode surface is activated in the step (C), and the metal fine particles 21 are originally active. The metal bond between the metal fine particles 21 depends on the sintering mechanism, but in the case of metal fine particles having a particle diameter of 1 to 100 nm, sintering is performed at a low temperature as compared with general metal particles having a particle diameter exceeding 100 nm. be able to. The reason why the portion other than the metal fine particles 21 (mainly the solvent) can be removed is because the temperature is higher than the boiling point of the solvent 22. Therefore, the heating temperature can be selected from a temperature range not lower than the boiling point of the solvent 22 and not higher than the melting point of the metal constituting the metal fine particles 21.
As a heating method, for example, an electronic circuit device in which the chip 10 is temporarily held on the substrate 1 may be put into a heating facility such as a firing furnace or a reflow furnace, or provided in an ultrasonic bonding type flip chip mounting facility. You may heat using the heating mechanism currently used. As heating conditions, for example, the heating temperature is 100 ° C. to 300 ° C., and the heating time is 5 minutes to 60 minutes. Note that it is preferable to perform the heating step in a low oxygen atmosphere because the active state of the electrode surface can be more stably maintained and the connection reliability is improved.

以上の（Ａ）〜（Ｄ）の工程の後、チップ１０と基板１との隙間に樹脂を流し込んで、樹脂硬化させる工程を追加してもよい。この工程追加により、本発明にかかる電子回路装置は、実際に使用される時に接続部に生じる歪み（チップと基板の線膨張係数差に起因する歪み）を低減することができ、耐環境性能がより高まる。
さらに、基板１としてマザー基板を使用した場合には、チップ１０の接合、樹脂封止の後、マザー基板を個片に分離する工程を設けてもよい。 After the above steps (A) to (D), a step of pouring resin into the gap between the chip 10 and the substrate 1 and curing the resin may be added. With the addition of this process, the electronic circuit device according to the present invention can reduce distortion (strain caused by the difference between the linear expansion coefficients of the chip and the substrate) generated in the connection portion when actually used, and environmental resistance performance is improved. Increase more.
Further, when a mother substrate is used as the substrate 1, a step of separating the mother substrate into individual pieces after bonding of the chip 10 and resin sealing may be provided.

図３はチップ電極１１と金属焼結体２３との界面における断面写真を示す。なお、チップ電極１１の材料としてＡｌを、金属微粒子２１の材料としてＡｇを使用した。
図３から明らかなように、チップ電極１１と金属焼結体２３とは、サブミクロンオーダーで観察しても、隙間なく接触しており、チップ電極１１と金属焼結体２３とは共に強く金属結合していることがわかる。ここでは示していないが、基板電極２と金属焼結体２３との間でも、図３と同様な強い金属結合が得られている。 FIG. 3 shows a cross-sectional photograph at the interface between the chip electrode 11 and the metal sintered body 23. Note that Al was used as the material of the chip electrode 11, and Ag was used as the material of the metal fine particles 21.
As is clear from FIG. 3, the chip electrode 11 and the metal sintered body 23 are in contact with each other even when observed on the submicron order, and the chip electrode 11 and the metal sintered body 23 are both strongly metal. You can see that they are connected. Although not shown here, a strong metal bond similar to that in FIG. 3 is also obtained between the substrate electrode 2 and the metal sintered body 23.

図４は、超音波を印加せずに焼結した場合（工程（Ｃ）を省略）におけるチップ電極１１と金属焼結体２３との界面における断面写真を示す。超音波印加以外の条件は図３と同一である。
図４から明らかなように、Ａｌ電極表面に存在する酸化物や汚染物のため、電極１１と金属焼結体２３との間に、隙間が発生していることがわかる。そのため、電極１１と金属焼結体２３との間の抵抗値が高くなったり、両者の接合強度が低くなる可能性がある。
図３，図４から明らかなように、超音波を印加することで、電極と金属焼結体との間で良好な金属結合が得られたことが実証された。 FIG. 4 shows a cross-sectional photograph at the interface between the chip electrode 11 and the metal sintered body 23 in the case of sintering without applying ultrasonic waves (step (C) is omitted). Conditions other than the application of ultrasonic waves are the same as in FIG.
As can be seen from FIG. 4, a gap is generated between the electrode 11 and the sintered metal body 23 due to oxides and contaminants present on the surface of the Al electrode. Therefore, there is a possibility that the resistance value between the electrode 11 and the metal sintered body 23 is increased or the bonding strength between the two is decreased.
As apparent from FIGS. 3 and 4, it was demonstrated that a good metal bond was obtained between the electrode and the sintered metal by applying ultrasonic waves.

本発明にかかる電子回路装置の一例の断面図である。It is sectional drawing of an example of the electronic circuit apparatus concerning this invention. 図１に示す電子回路装置の製造方法、特にフリップチップ実装方法を示す工程図である。It is process drawing which shows the manufacturing method of the electronic circuit device shown in FIG. 1, especially the flip chip mounting method. 図２に示す方法で実装したチップ電極と金属焼結体との界面写真である。FIG. 3 is an interface photograph between a chip electrode and a metal sintered body mounted by the method shown in FIG. 2. 超音波を印加せずに実装したチップ電極と金属焼結体との界面写真である。It is an interface photograph of the chip electrode and metal sintered compact which were mounted without applying an ultrasonic wave.

符号の説明Explanation of symbols

１ 基板
２ 電極
１０ チップ（回路素子）
１１ 電極
２０ 金属ペースト
２１ 金属微粒子
２２ 溶媒
２３ 金属焼結体 1 Substrate 2 Electrode 10 Chip (circuit element)
11 Electrode 20 Metal paste 21 Metal fine particles 22 Solvent 23 Metal sintered body

Claims (4)

回路素子の電極と基板の電極とを対向させ、電極間を電気的および機械的に接続するフリップチップ実装方法において、
上記回路素子の電極または基板の電極上の少なくとも一方に、平均粒径が１〜１００ｎｍの金属微粒子を溶媒中に分散させた金属ペーストを供給する工程と、
上記回路素子の電極と基板の電極とを上記金属ペーストを間にして位置合わせする工程と、
上記回路素子側および基板側の少なくとも一方に超音波振動を印加し、上記金属ペーストとの界面における電極表面を活性化させる工程と、
上記金属ペーストを構成する溶媒の沸点以上、金属微粒子の融点以下の温度で加熱し、溶媒を蒸発させて回路素子の電極と基板の電極とを電気的および機械的に接続する工程と、を有することを特徴とするフリップチップ実装方法。 In the flip chip mounting method in which the electrode of the circuit element and the electrode of the substrate are opposed to each other and the electrodes are electrically and mechanically connected,
Supplying a metal paste in which metal fine particles having an average particle diameter of 1 to 100 nm are dispersed in a solvent on at least one of the circuit element electrode and the substrate electrode;
Aligning the electrode of the circuit element and the electrode of the substrate with the metal paste in between,
Applying ultrasonic vibration to at least one of the circuit element side and the substrate side to activate the electrode surface at the interface with the metal paste;
Heating at a temperature not lower than the boiling point of the solvent constituting the metal paste and not higher than the melting point of the metal fine particles, and evaporating the solvent to electrically and mechanically connect the circuit element electrode and the substrate electrode. A flip chip mounting method characterized by the above. 上記超音波振動の印加方向が電極面に対して垂直方向であることを特徴とする請求項１に記載のフリップチップ実装方法。 2. The flip chip mounting method according to claim 1, wherein an application direction of the ultrasonic vibration is a direction perpendicular to the electrode surface. 上記金属ペーストを供給する工程において、上記金属ペーストは基板の電極に対して供給されることを特徴とする請求項１または２に記載のフリップチップ実装方法。 3. The flip chip mounting method according to claim 1, wherein in the step of supplying the metal paste, the metal paste is supplied to an electrode of a substrate. 回路素子の電極と基板の電極とを対向させ、電極間を電気的および機械的に接続してなる電子回路装置において、
請求項１ないし３のいずれかに記載の方法を用いて回路素子の電極と基板の電極とを接続してなることを特徴とする電子回路装置。 In the electronic circuit device in which the electrode of the circuit element and the electrode of the substrate are opposed to each other and the electrodes are electrically and mechanically connected,
4. An electronic circuit device comprising a circuit element electrode and a substrate electrode connected to each other using the method according to claim 1.
JP2003345664A 2003-10-03 2003-10-03 Flip chip packaging method and electronic circuit device using the same Pending JP2005116612A (en)

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