JP2004253463A - Method for manufacturing circuit board, method for manufacturing power module substrate, circuit board, and power module substrate - Google Patents

Method for manufacturing circuit board, method for manufacturing power module substrate, circuit board, and power module substrate Download PDF

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Publication number
JP2004253463A
JP2004253463A JP2003039902A JP2003039902A JP2004253463A JP 2004253463 A JP2004253463 A JP 2004253463A JP 2003039902 A JP2003039902 A JP 2003039902A JP 2003039902 A JP2003039902 A JP 2003039902A JP 2004253463 A JP2004253463 A JP 2004253463A
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Japan
Prior art keywords
circuit board
manufacturing
power module
module substrate
groove
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JP2003039902A
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JP4010258B2 (en
Inventor
Reiko Ogawa
怜子 小川
Yoshiyuki Nagatomo
義幸 長友
Toshiyuki Nagase
敏之 長瀬
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Mitsubishi Materials Corp
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Mitsubishi Materials Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To perform patterning by wet etching with a high aspect ratio even on a thick metal plate in a process for producing a circuit board, a process for producing a power module substrate, the circuit board, and the power module substrate. <P>SOLUTION: The process for manufacturing a patterned circuit board 4 by applying a mask 3 onto a metal plate 2 and removing the non-masked part by wet etching comprises a step for previously forming a groove 2b in the center of the non-masked part on the metal plate and the wet etching is carried out after the step for forming the groove. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、パワーモジュールを搭載するのに好適な回路基板の製造方法及びパワーモジュール用基板の製造方法並びに回路基板及びパワーモジュール用基板に関する。
【0002】
【従来の技術】
半導体素子の中でも電力供給のためのパワーモジュールは発熱量が比較的高いため、これを搭載する基板としては、通常、セラミックス基板上にCu又はAl等の回路基板が直接又はろう材・はんだ材を介して接着されたものが用いられる。
上記回路基板は、金属板上にレジスト膜で所定パターンのマスクを施した状態で、ウェットエッチングにより所定の回路形状にパターンニングしたものであり、一般的なシリコン基板上に形成されるCuの配線等の薄膜回路に比べて厚い板状のものである(特許文献1参照)。
【0003】
【特許文献1】
特開昭62−226692号公報
【0004】
【発明が解決しようとする課題】
しかしながら、上記従来の回路基板の製造技術には、以下の課題が残されている。すなわち、図4の(a)(b)に示すように、セラミックス基板1上の金属板2が比較的厚いため、ウェットエッチングによりパターン形成を行うと、等方性エッチングのためにレジスト膜3下にアンダーカットを生じ、アスペクト比が低下してしまう不都合があった。このため、エッチング不足が生じた場合、図4の(b)に示すように、断面V字状のエッチング溝2aとなり、該溝2aで金属板2を完全に分離できないおそれがあった。また、厚い金属板では、回路パターンの細かい(幅の狭い)パターン形成が困難であった。また、イオンビームを用いたドライエッチング(RIBE等)を採用する場合、条件により異方性エッチングが可能であり高いアスペクト比によりマスク寸法に等しいパターン形成が実現できるが、ウェットエッチングに比べて製造コストが高くなるという不都合がある。
【0005】
本発明は、前述の課題に鑑みてなされたもので、厚い金属板でも高アスペクト比でウェットエッチングによりパターン形成を行うことができる回路基板の製造方法及びパワーモジュール用基板の製造方法並びに回路基板及びパワーモジュール用基板
【0006】
【課題を解決するための手段】
本発明は、前記課題を解決するために以下の構成を採用した。すなわち、本発明の回路基板の製造方法は、金属板上にマスクを施して、マスクされていない部分をウェットエッチングにより除去してパターンニングされた回路基板を製造する方法であって、前記金属板上のマスクされていない部分の中央に溝を予め形成する溝形成工程を有し、該溝形成工程後に、前記ウェットエッチングを行うことを特徴とする。
【0007】
この回路基板の製造方法では、金属板上のマスクされていない部分の中央に溝を予め形成する溝形成工程を有し、該溝形成工程後に、ウェットエッチングを行うので、予め形成した溝からもエッチングされるため、擬似的な異方性エッチングとなり、深さ方向が速くエッチングされて最終的にはアスペクト比0.5〜1.5の高い矩形状のエッチング溝を形成することができる。また、溝を形成しない場合に比べて、エッチング時間の短縮を図ることができる。
【0008】
本発明のパワーモジュール用基板の製造方法は、セラミックス基板と該セラミックス基板上にパターンニングされた回路基板とを備え、該回路基板上に半導体素子が搭載されるパワーモジュール用基板の製造方法であって、前記回路基板を、上記本発明の回路基板の製造方法で作製することを特徴とする。すなわち、このパワーモジュール用基板の製造方法では、回路基板を上記本発明の回路基板の製造方法で作製するので、厚い回路基板でもアスペクト比0.5〜1.5の高い溝でパターンを完全に分離することができると共に幅の狭いパターン形成が可能になる。
【0009】
本発明の回路基板は、上記本発明の回路基板の製造方法で作製されたことを特徴とする。
また、本発明のパワーモジュール用基板は、上記本発明のパワーモジュール用基板の製造方法で作製されたことを特徴とする。
【0010】
すなわち、この回路基板では、上記本発明の回路基板の製造方法で作製され、またこのパワーモジュール用基板では、上記本発明のパワーモジュール用基板の製造方法で作製されているので、高アスペクト比で分離され、幅の狭くても高精度な回路パターンを有することができる。
【0011】
【発明の実施の形態】
以下、本発明に係る回路基板の製造方法及びパワーモジュール用基板の製造方法並びに回路基板及びパワーモジュール用基板の一実施形態を、図1から図3を参照しながら説明する。
【0012】
本実施形態のパワーモジュール用基板は、電力供給用の半導体素子を搭載するための回路基板を有するものである。この回路基板及びパワーモジュール用基板の構造を、その製造プロセスと合わせて説明すると、まず、図1の(a)に示すように、Al等を含むセラミックス基板1の表面に、格子状の突条部10aを有する型10を型押しして、予め格子状の溝であるブレークライン1aを形成しておく。次に、図1の(b)に示すように、セラミックス基板1上に直接又はろう材を介してAl(アルミニウム)の金属板2を接着する。
【0013】
さらに、図1の(b)及び図2に示すように、セラミックス基板1のブレークライン1aに合わせて、金属板2の表面に型100による型押しをしてパターン用溝2bの一部を形成する。この場合に形成されたパターン用溝2bは、隣接するパワーモジュールの金属板2を互いに分離するパターン形成の領域に配されるものである。さらに、所望の回路パターンの中央に対応させた突条部を有する別の型を用いて、金属板2の表面に型押しし、所望の回路パターンの中央に位置するようパターン用溝2bを形成しておく。
【0014】
次に、金属板2の表面に、レジストを塗布してレジスト膜3を形成した後、フォトリソグラフィ技術により、レジスト膜3に所定のパターンのフォトマスクを施して露光し、現像して、図2の(a)に示すように、回路パターンとして後述するエッチング工程で抜く部分を除去する。なお、レジスト膜のマスクは、現像型だけでなく、熱乾燥させて形成することもできる。また、残存するレジスト膜(マスク)3にマスクされていない部分の中央に、上記パターン用溝2bが配されるように設定する。
【0015】
次に、エッチャントにCuCl、FeCl等を用いて金属板2をウェットエッチングして、レジスト膜3でマスクされていない部分を除去する。この際、レジスト膜3にマスクされていない部分では、図2の(b)に示すように、予め設けておいたパターン用溝2bからもエッチングが進むため、擬似的な異方性エッチングとなり、深さ方向が速くエッチングされてアンダーカットが少なくなる。そして、最終的には、図2の(c)に示すように、アスペクト比の高い矩形状のエッチング溝2aがされる。このようにして所望の回路パターンが形成された回路基板4を有するパワーモジュール用基板が形成される。
【0016】
本実施形態では、金属板2上のマスクされていない部分の中央にパターン用溝2bを予め形成する工程を有し、該工程後に、ウェットエッチングを行うので、深さ方向のエッチング量が少なくてすみ、アスペクト比0.5〜1.5の高い矩形状のエッチング溝2aを形成することができる。また、パターン用溝2bを形成しない場合に比べて、エッチング時間の短縮を図ることができる。
【0017】
なお、本発明の技術範囲は上記実施の形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。
上記実施形態では、回路基板をパワーモジュール用基板に適用したが、電力供給用半導体素子以外の素子を搭載するモジュール用基板に適用しても構わない。
また、パターン用溝を型による型押しで形成したが、他の手段で形成しても構わない。例えば、レーザー加工により形成しても構わない。
【0018】
【発明の効果】
本発明によれば、以下の効果を奏する。
すなわち、本発明の回路基板の製造方法及びパワーモジュール用基板の製造方法によれば、金属板上のマスクされていない部分の中央に溝を予め形成する溝形成工程を有し、該溝形成工程後に、ウェットエッチングを行うので、予め形成した溝からもエッチングされるため、アスペクト比の高い矩形状のエッチング溝を形成することができ、厚い金属板でも高アスペクト比でウェットエッチングによりパターン形成を行うことができる。
また、溝を形成しない場合に従来の手段に比べて、エッチング時間の短縮を図ることができる。
【0019】
本発明の回路基板によれば、上記本発明の回路基板の製造方法で作製され、また本発明のパワーモジュール用基板によれば、上記本発明のパワーモジュール用基板の製造方法で作製されているので、高アスペクト比で分離され、幅の狭くても高精度な回路パターンを有することができる。
【図面の簡単な説明】
【図1】本発明に係る一実施形態において、型によるブレイクラインの形成及びパターン用溝の形成を示す要部の概略的な断面図である。
【図2】本発明に係る一実施形態において、レジスト膜のマスク形成後の製造工程を示す概略的な断面図である。
【図3】本発明に係る一実施形態において、パターン用溝とブレイクラインとの位置関係を示す要部の平面図である。
【図4】本発明に係る従来例において、レジスト膜のマスク形成後の製造工程を示す概略的な断面図である。
【符号の説明】
1 セラミックス基板
2 金属板
2a エッチング溝
2b パターン用溝
3 レジスト膜(マスク)
4 回路基板
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a circuit board suitable for mounting a power module, a method for manufacturing a power module substrate, and a circuit board and a power module substrate.
[0002]
[Prior art]
Since a power module for power supply among semiconductor elements generates a relatively large amount of heat, a circuit board such as Cu or Al is usually mounted directly on a ceramic substrate or a brazing material or solder material on a ceramic substrate. What is adhered through is used.
The circuit board is formed by patterning into a predetermined circuit shape by wet etching in a state where a mask of a predetermined pattern is formed on a metal plate with a resist film, and Cu wiring formed on a general silicon substrate is used. (See Patent Document 1).
[0003]
[Patent Document 1]
Japanese Patent Application Laid-Open No. 62-226692
[Problems to be solved by the invention]
However, the following problems remain in the conventional circuit board manufacturing technology. That is, as shown in FIGS. 4A and 4B, since the metal plate 2 on the ceramic substrate 1 is relatively thick, when a pattern is formed by wet etching, the resist film 3 is formed under the resist film 3 for isotropic etching. There was a disadvantage that an undercut was generated and the aspect ratio was lowered. Therefore, when insufficient etching occurs, as shown in FIG. 4B, the etching groove 2a has a V-shaped cross section, and there is a possibility that the metal plate 2 cannot be completely separated by the groove 2a. Also, with a thick metal plate, it is difficult to form a fine (narrow) circuit pattern. In addition, when dry etching (such as RIBE) using an ion beam is employed, anisotropic etching can be performed depending on conditions, and a pattern having a high aspect ratio equal to the mask size can be realized. However, there is a disadvantage that the cost is high.
[0005]
The present invention has been made in view of the above-described problems, and has a method of manufacturing a circuit board, a method of manufacturing a power module substrate, and a circuit board capable of forming a pattern by wet etching with a high aspect ratio even on a thick metal plate. Substrate for power module [0006]
[Means for Solving the Problems]
The present invention has the following features to attain the object mentioned above. That is, the method of manufacturing a circuit board of the present invention is a method of manufacturing a patterned circuit board by applying a mask on a metal plate and removing an unmasked portion by wet etching. A groove forming step of previously forming a groove in the center of the unmasked portion above, and the wet etching is performed after the groove forming step.
[0007]
This method of manufacturing a circuit board includes a groove forming step of previously forming a groove at the center of an unmasked portion on a metal plate, and wet etching is performed after the groove forming step. Since the etching is performed, pseudo anisotropic etching is performed, and the etching is rapidly performed in the depth direction, so that a high rectangular etching groove having an aspect ratio of 0.5 to 1.5 can be finally formed. Further, the etching time can be reduced as compared with the case where no groove is formed.
[0008]
A method for manufacturing a power module substrate according to the present invention is a method for manufacturing a power module substrate including a ceramic substrate and a circuit substrate patterned on the ceramic substrate, wherein a semiconductor element is mounted on the circuit substrate. The circuit board is manufactured by the method for manufacturing a circuit board according to the present invention. That is, in this method of manufacturing a power module substrate, since the circuit board is manufactured by the above-described method of manufacturing a circuit board of the present invention, the pattern is completely formed by a high groove having an aspect ratio of 0.5 to 1.5 even on a thick circuit board. Separation is possible and a narrow pattern can be formed.
[0009]
A circuit board according to the present invention is manufactured by the above-described method for manufacturing a circuit board according to the present invention.
Further, a substrate for a power module of the present invention is characterized by being manufactured by the above-described method for manufacturing a substrate for a power module of the present invention.
[0010]
That is, this circuit board is manufactured by the above-described method of manufacturing a circuit board of the present invention, and this power module substrate is manufactured by the above-described method of manufacturing a power module substrate of the present invention. It is possible to have a highly accurate circuit pattern even if it is separated and narrow.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of a method for manufacturing a circuit board, a method for manufacturing a power module substrate, and a circuit board and a power module substrate according to the present invention will be described with reference to FIGS. 1 to 3.
[0012]
The power module substrate of the present embodiment has a circuit board for mounting a semiconductor element for power supply. The structure of the circuit board and the power module substrate will be described together with the manufacturing process. First, as shown in FIG. 1A, a lattice-like structure is formed on the surface of a ceramic substrate 1 containing Al 2 O 3 or the like. The mold 10 having the ridges 10a is stamped to form break lines 1a which are lattice-shaped grooves in advance. Next, as shown in FIG. 1B, a metal plate 2 made of Al (aluminum) is bonded onto the ceramic substrate 1 directly or via a brazing material.
[0013]
Further, as shown in FIGS. 1B and 2, a part of the pattern groove 2 b is formed by embossing the surface of the metal plate 2 with a mold 100 in accordance with the break line 1 a of the ceramic substrate 1. I do. The pattern grooves 2b formed in this case are arranged in a pattern formation region that separates the metal plates 2 of adjacent power modules from each other. Further, using another mold having a ridge corresponding to the center of the desired circuit pattern, the surface of the metal plate 2 is pressed to form a pattern groove 2b so as to be located at the center of the desired circuit pattern. Keep it.
[0014]
Next, after a resist is applied to the surface of the metal plate 2 to form a resist film 3, the resist film 3 is exposed and developed by applying a photomask of a predetermined pattern to the resist film 3 by a photolithography technique. As shown in FIG. 3A, a portion to be removed in an etching step described later as a circuit pattern is removed. Note that the mask of the resist film can be formed not only by the development type but also by heat drying. In addition, the pattern groove 2b is set so as to be arranged at the center of the portion not masked by the remaining resist film (mask) 3.
[0015]
Next, the metal plate 2 is wet-etched using CuCl 3 , FeCl 3, or the like as an etchant to remove a portion not masked by the resist film 3. At this time, in the portion not masked by the resist film 3, as shown in FIG. 2 (b), the etching also proceeds from the pattern groove 2b provided in advance, so that pseudo anisotropic etching is performed. The depth direction is etched faster and the undercut is reduced. Finally, as shown in FIG. 2C, a rectangular etching groove 2a having a high aspect ratio is formed. Thus, a power module substrate having the circuit board 4 on which a desired circuit pattern is formed is formed.
[0016]
In the present embodiment, there is a step of forming the pattern groove 2b in the center of the unmasked portion on the metal plate 2 and wet etching is performed after this step, so that the etching amount in the depth direction is small. In other words, a high rectangular etching groove 2a having an aspect ratio of 0.5 to 1.5 can be formed. Further, the etching time can be reduced as compared with the case where the pattern groove 2b is not formed.
[0017]
The technical scope of the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the spirit of the present invention.
In the above embodiment, the circuit board is applied to the power module board. However, the circuit board may be applied to a module board on which elements other than the power supply semiconductor element are mounted.
Further, the pattern groove is formed by embossing with a mold, but may be formed by other means. For example, it may be formed by laser processing.
[0018]
【The invention's effect】
According to the present invention, the following effects can be obtained.
That is, according to the method for manufacturing a circuit board and the method for manufacturing a power module substrate of the present invention, the method includes a groove forming step of forming a groove in the center of an unmasked portion on a metal plate, Later, since wet etching is performed, etching is also performed from a groove formed in advance, so that a rectangular etching groove having a high aspect ratio can be formed, and a pattern is formed by wet etching at a high aspect ratio even on a thick metal plate. be able to.
Further, when the groove is not formed, the etching time can be reduced as compared with the conventional means.
[0019]
According to the circuit board of the present invention, it is manufactured by the above-described method of manufacturing a circuit board of the present invention, and according to the power module substrate of the present invention, it is manufactured by the above-described method of manufacturing a power module substrate of the present invention. Therefore, it is possible to have a high-precision circuit pattern that is separated at a high aspect ratio and has a small width.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a main part showing formation of a break line by a mold and formation of a pattern groove in one embodiment according to the present invention.
FIG. 2 is a schematic cross-sectional view showing a manufacturing process after forming a mask of a resist film in one embodiment according to the present invention.
FIG. 3 is a plan view of a main part showing a positional relationship between a pattern groove and a break line in one embodiment according to the present invention.
FIG. 4 is a schematic cross-sectional view showing a manufacturing process after forming a resist film mask in a conventional example according to the present invention.
[Explanation of symbols]
Reference Signs List 1 ceramic substrate 2 metal plate 2a etching groove 2b pattern groove 3 resist film (mask)
4 Circuit board

Claims (4)

金属板上にマスクを施して、マスクされていない部分をウェットエッチングにより除去してパターンニングされた回路基板を製造する方法であって、
前記金属板上のマスクされていない部分の中央に溝を予め形成する溝形成工程を有し、
該溝形成工程後に、前記ウェットエッチングを行うことを特徴とする回路基板の製造方法。
A method of manufacturing a patterned circuit board by applying a mask on a metal plate and removing an unmasked portion by wet etching,
A groove forming step of previously forming a groove in the center of the unmasked portion on the metal plate,
The method of manufacturing a circuit board, wherein the wet etching is performed after the groove forming step.
セラミックス基板と該セラミックス基板上にパターンニングされた回路基板とを備え、該回路基板上に半導体素子が搭載されるパワーモジュール用基板の製造方法であって、
前記回路基板を、請求項1に記載の回路基板の製造方法で作製することを特徴としたパワーモジュール用基板の製造方法。
A method for manufacturing a power module substrate comprising a ceramic substrate and a circuit substrate patterned on the ceramic substrate, and a semiconductor element mounted on the circuit substrate,
A method for manufacturing a substrate for a power module, wherein the circuit board is manufactured by the method for manufacturing a circuit board according to claim 1.
請求項1に記載の回路基板の製造方法で作製されたことを特徴とする回路基板。A circuit board manufactured by the method for manufacturing a circuit board according to claim 1. 請求項2に記載のパワーモジュール用基板の製造方法で作製されたことを特徴とするパワーモジュール用基板。A power module substrate manufactured by the method for manufacturing a power module substrate according to claim 2.
JP2003039902A 2003-02-18 2003-02-18 Circuit board manufacturing method and power module board manufacturing method Expired - Lifetime JP4010258B2 (en)

Priority Applications (1)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003039902A JP4010258B2 (en) 2003-02-18 2003-02-18 Circuit board manufacturing method and power module board manufacturing method

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JP2004253463A true JP2004253463A (en) 2004-09-09
JP4010258B2 JP4010258B2 (en) 2007-11-21

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100974654B1 (en) 2007-11-23 2010-08-09 삼성전기주식회사 Method For Manufacturing Printed Circuit Board
JPWO2015182229A1 (en) * 2014-05-27 2017-04-20 株式会社村田製作所 Mother ceramic substrate, ceramic substrate, mother module component, module component, and method of manufacturing mother ceramic substrate
US9961791B2 (en) 2012-06-04 2018-05-01 Hitachi Metals, Ltd. Seal ring and method for manufacturing seal ring

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100974654B1 (en) 2007-11-23 2010-08-09 삼성전기주식회사 Method For Manufacturing Printed Circuit Board
US9961791B2 (en) 2012-06-04 2018-05-01 Hitachi Metals, Ltd. Seal ring and method for manufacturing seal ring
US10188010B2 (en) 2012-06-04 2019-01-22 Hitachi Metals, Ltd. Seal ring and method for manufacturing seal ring
JPWO2015182229A1 (en) * 2014-05-27 2017-04-20 株式会社村田製作所 Mother ceramic substrate, ceramic substrate, mother module component, module component, and method of manufacturing mother ceramic substrate

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