JP2004165325A - Method of manufacturing wiring board - Google Patents

Method of manufacturing wiring board Download PDF

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Publication number
JP2004165325A
JP2004165325A JP2002327817A JP2002327817A JP2004165325A JP 2004165325 A JP2004165325 A JP 2004165325A JP 2002327817 A JP2002327817 A JP 2002327817A JP 2002327817 A JP2002327817 A JP 2002327817A JP 2004165325 A JP2004165325 A JP 2004165325A
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JP
Japan
Prior art keywords
plating layer
layer
solder
copper plating
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002327817A
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Japanese (ja)
Inventor
Osamu Akashi
理 明石
Tatsuumi Sakamoto
達海 坂元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
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Kyocera Corp
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Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2002327817A priority Critical patent/JP2004165325A/en
Publication of JP2004165325A publication Critical patent/JP2004165325A/en
Pending legal-status Critical Current

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board on which the electrode of an electronic component can be connected firmly to a soldering pad. <P>SOLUTION: After an electroless-plated copper layer 3a is formed on the surface of an insulating substrate 1 in a coating state, a first plating resist layer 11 having an opening 11a is formed on the copper layer 3a, and an electroplated copper layer 3b is formed on the portion of the copper layer 3a exposed in the opening 11a. Then, after the resist layer 11 is peeled off, a second plating resist layer 12 having a second opening 12a exposing the central part of the electroplated copper layer 3b is formed on the copper layer 3b, and an electroplated nickel layer 5 is formed on the central part of the electrolated copper layer 3b exposed in the opening 12a. After the second resist layer 12 is peeled off, the soldering pad 3 is formed by etching off the electroless-plated copper layer 3a except the soldering pad forming portion, and the outer peripheral section of the pad 3 is blackened. In addition, a solder-resistant resin layer 4 is formed. Finally, the pad 3 is coated with an electroless-plate gold layer. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、絶縁基板の表面に電子部品の電極が半田を介して接続される半田接合パッドを形成して成る配線基板の製造方法に関するものである。
【0002】
【従来の技術】
従来、半導体集積回路素子等の電子部品を搭載するために用いられる配線基板として、例えばガラス−エポキシ樹脂等の有機材料系の絶縁層と銅箔等の銅から成る配線導体とを交互に複数層積層して成る絶縁基板上に、電子部品の電極が半田を介して電気的に接続される銅めっき層から成る半田接合パッドを形成した配線基板が知られている。この配線基板においては、半田接合パッドに電子部品の電極を半田を介して接続する際に絶縁基板を熱から保護するとともに半田接合パッド同士の電気的な短絡を防止するためにエポキシ樹脂等の耐熱樹脂から成る耐半田樹脂層を絶縁基板上に半田接合パッドの外周部を覆うようにして被着させている。なお、半田接合パッドは、耐半田樹脂層との密着を強固なものとするために、耐半田樹脂層により被覆された外周部表面に黒化処理により黒化膜が形成されており、さらに、その酸化腐食を防止するとともに半田接合パッドと電子部品の電極との半田を介した電気的接続を良好かつ強固なものとする目的で、半田接合パッドの露出する表面には通常、無電解ニッケルめっき層および無電解金めっき層が順次被着されている。
【0003】
このような配線基板は、先ず有機材料系の絶縁層と銅から成る配線導体とを積層した絶縁基板上に直径が250〜600μmの銅めっき層から成る半田接合パッドを形成し、次に絶縁基板上に形成した半田接合パッドの露出表面の全面に黒化処理を施して黒化膜を形成し、次に絶縁基板上および半田接合パッド上に半田接合パッドの外周部を覆うとともに中央部を露出させる耐半田樹脂層を形成した後、半田接合パッドの露出した中央部表面の黒化膜を酸洗浄やマイクロエッチングによる化学研磨にて除去し、最後に黒化膜が除去された半田接合パッドの露出表面に無電解ニッケルめっき層および無電解金めっき層を順次被着させることにより製造されている。なお、無電解ニッケルめっき層上に被着された無電解金めっき層は、電子部品の電極と半田接合パッドとを半田を介して接続する際に半田中に拡散して消滅する。
【0004】
【特許文献1】
特開2001−110939号公報
【0005】
【発明が解決しようとする課題】
しかしながら、近年、環境への配慮から、電子部品の電極と配線基板の半田接合パッドとを接続する半田として鉛を含まない鉛フリー半田が使用されるようになってきている。このような鉛フリー半田は、従来の鉛を含んだ半田よりもその融点が一般的に10〜20℃程度高く、そのためこの鉛フリー半田を使用して電子部品の電極と配線基板の半田接合パッドとを接続する場合、従来よりも10〜20℃程度高い温度で半田を溶融させる必要がある。そして、このように高い温度を配線基板に印加すると、無電解ニッケルめっき層はその結晶が疎であるため半田接合パッド上に被着された無電解ニッケルめっき層と半田との界面に脆弱な金属間化合物が多量に形成され、そのため電子部品の電極を半田接合パッドに接続する半田に熱や外力による応力が印加されると、半田がめっき金属層との間で剥離しやすくなり、その結果、電子部品の電極と半田接合パッドとを半田を介して強固に接続することができなくなってしまうという問題点を有していた。そこで、半田接合パッド上に被着させるめっき金属層を緻密な電解ニッケルめっき層およびその上に被着させた電解金めっき層とすることで半田接合パッドに被着されたニッケルめっき層と半田との間に脆弱な金属間化合物が形成されにくくすることが考えられる。しかしながら、電気的に独立した各半田接合パッドに電解ニッケルめっき層および電解金めっき層を被着させるには、各半田接合パッドに電荷を供給するためのめっき導通用の配線を接続させる必要があり、そのようなめっき導通用の配線により半田接合パッドに不要な静電容量やインダクタンスが形成されてしまい、特に高周波で作動する電子部品を搭載する場合にはそのような不要な静電容量やインダクタンスにより電子部品を正常に作動させることができなくなってしまうという問題点を誘発してしまう。
【0006】
また、従来の配線基板では、黒化処理された半田接合パッドの耐半田樹脂層から露出した中央部の黒化膜を除去する際に、半田接合パッドの中央部に黒化処理の残渣が残りやすく、そのような残渣が残ると、黒化膜が除去された半田接合パッドの中央部とその上の無電解ニッケルめっき層との間に半田接合パッドの中央部に残る黒化処理の残渣に起因して剥離が発生しやすいという問題点を有していた。
【0007】
本発明は、かかる従来の問題点に鑑み完成されたものであり、その目的は、電解ニッケルめっき層および電解金めっき層が被着された半田接合パッドの中央部に黒化処理の残渣を発生させることがないとともに半田接合パッドの表面に電解めっきによる緻密なめっき金属層をめっき導通用の配線を残すことなく良好に被着して、電子部品の電極を半田接合パッドに半田を介して強固に接続することができるとともに電子部品を正常に作動させることが可能な配線基板を提供することにある。
【0008】
【課題を解決するための手段】
本発明の配線基板の製造方法は、内部および/または表面に配線導体を有し、上面に半田接合パッドが形成される絶縁基板を準備し、次にその絶縁基板の上面に無電解銅めっき層を被着させ、次にその無電解銅めっき層上に半田接合パッドが形成される部位の無電解銅めっき層を露出させる第一の開口部を有する第一のめっきレジスト層を被着させ、次に第一のめっきレジスト層の第一の開口部内に露出した無電解銅めっき層の上に電解銅めっき層を被着させ、次に第一のめっきレジスト層を剥離した後、無電解銅めっき層および電解銅めっき層上に半田接合パッドが形成される部位の電解銅めっき層の外周部を覆うとともにその電解銅めっき層の中央部を露出させる第二の開口部を有する第二のめっきレジスト層を被着させ、次に第二のめっきレジスト層の第二の開口部内に露出した電解銅めっき層上に電解ニッケルめっき層を被着させ、次に第二のめっきレジスト層を剥離した後、電解銅めっき層から露出する部位の無電解銅めっき層をエッチング除去して絶縁基板上に無電解銅めっき層とその上の電解銅めっき層とから成り、その上面の中央部に電解ニッケルめっき層が被着された半田接合パッドを形成し、次に半田接合パッドの電解ニッケルめっき層から露出する無電解銅めっき層および電解銅めっき層の表面を黒化処理し、次に絶縁基板の上面に、半田接合パッドの外周部を覆うとともに半田接合パッドの中央部を露出させる耐半田樹脂層を形成し、次に耐半田樹脂層から露出する半田接合パッド上の電解ニッケルめっき層上に無電解金めっき層を被着することを特徴とするものである。
【0009】
本発明の配線基板の製造方法によれば、内部および/または表面に配線導体を有し、上面に半田接合パッドが形成される絶縁基板を準備し、次にその絶縁基板の上面に無電解銅めっき層を被着させ、次にその無電解銅めっき層上に半田接合パッドが形成される部位の無電解銅めっき層を露出させる第一の開口部を有する第一のめっきレジスト層を被着させ、次に第一のめっきレジスト層の第一の開口部内に露出した無電解銅めっき層の上に電解銅めっき層を被着させ、次に第一のめっきレジスト層を剥離した後、無電解銅めっき層および電解銅めっき層上に半田接合パッドが形成される部位の電解銅めっき層の外周部を覆うとともにその電解銅めっき層の中央部を露出させる第二の開口部を有する第二のめっきレジスト層を被着させ、次に第二のめっきレジスト層の第二の開口部内に露出した電解銅めっき層上に電解ニッケルめっき層を被着させ、次に第二のめっきレジスト層を剥離した後、電解銅めっき層から露出する部位の無電解銅めっき層をエッチング除去して絶縁基板上に無電解銅めっき層とその上の電解銅めっき層とから成り、その上面の中央部に電解ニッケルめっき層が被着された半田接合パッドを形成し、次に半田接合パッドの電解ニッケルめっき層から露出する無電解銅めっき層および電解銅めっき層の表面を黒化処理し、次に絶縁基板の上面に、半田接合パッドの外周部を覆うとともに半田接合パッドの中央部を露出させる耐半田樹脂層を形成し、次に耐半田樹脂層から露出する半田接合パッド上の電解ニッケルめっき層上に無電解金めっき層を被着することから、電解ニッケルめっき層および無電解金めっき層が被着された半田接合パッドの中央部に黒化処理の残渣を発生させることがないとともに、半田接合パッドに接続されためっき導通用の配線を残すことなく耐半田樹脂層から露出する表面に緻密な電解ニッケルめっき層および無電解金めっき層を被着させることができる。
【0010】
【発明の実施の形態】
次に本発明の配線基板の製造方法を添付の図面に基づき詳細に説明する。
図1は、本発明の製造方法により製造される配線基板の実施の形態の一例を示す要部断面図であり、図中、1は絶縁基板、2は配線導体、3は半田接合パッド、4は耐半田樹脂層であり、主としてこれらで本発明による配線基板が構成されている。
【0011】
絶縁基板1は、例えばガラス繊維を縦横に編んで形成されたガラスクロスにエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させた絶縁板1a上にエポキシ樹脂や変性ポリフェニレンエーテル樹脂等の熱硬化性樹脂から成る絶縁層1bを積層して成り、その内部や表面には銅箔や銅めっき層等の銅から成る複数の配線導体2が配設されている。
【0012】
また、絶縁基板1の表面には、配線導体2に電気的に接続された銅めっき層から成る複数の半田接合パッド3が形成されており、この半田接合パッド3には図示しない電子部品の電極が半田を介して電気的に接続される。
【0013】
なお、半田接合パッド3の露出する上面には半田接合パッド3の酸化腐蝕を防止するとともに半田接合パッド3と半田との接合を良好とするために電解ニッケルめっき層5と無電解金めっき層6とが順次被着されている。そして半田接合パッド3に半田を溶着させると無電解金めっき層6は半田中に拡散して消滅するとともに電解ニッケルめっき層5と半田とが接合する。このとき、半田接合パッド3の上面に被着された電解ニッケルめっき層5はその結晶が緻密であることから、電解ニッケルめっき層5と半田との間に脆弱な金属間化合物が多量に形成されにくく、そのため電子部品の電極を半田接合パッド3に半田を介して強固に接続することができる。
【0014】
さらに、絶縁基板1および半田接合パッド3上には、半田接合パッド3の外周部を覆うとともに中央部を露出させるエポキシ樹脂等の耐熱樹脂から成る耐半田樹脂層4が被着されている。耐半田樹脂層4は、半田接合パッド3に電子部品の電極を半田を介して接続する際に、その熱から絶縁基板1を保護するとともに半田接合パッド3同士が半田を介して電気的に短絡するのを防止するためのダムとして機能する。
【0015】
また、耐半田樹脂層4で覆われた半田接合パッド3の表面には黒化処理により黒化膜7が形成されており、この黒化膜7により半田接合パッド3と耐半田樹脂層4との密着が強固なものとなっている。
【0016】
なお、ここで黒化処理とは、銅から成る半田接合パッド3の表面をアルカリ性酸化処理液により酸化して亜酸化銅および酸化銅により構成される針状結晶を生成させ、この針状結晶に基づく微細な凹凸を生じさせる表面粗化処理を意味する。
また、処理後に表面が黒くなることからこの表面粗化処理を黒化処理と呼び、表面の黒く変色した層を黒化膜と呼んでいる。
【0017】
次に、上述した配線基板を本発明により製造する方法を図2に基づいて詳細に説明する。図2(a)〜(k)は、本発明の配線基板の製造方法を説明するための各工程毎の要部断面図である。
【0018】
まず、図2(a)に示すように、ガラスクロスにエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させた絶縁板1a上にエポキシ樹脂や変性ポリフェニレンエーテル樹脂等の熱硬化性樹脂から成る絶縁層1bを積層して成るとともに内部および/または表面に銅箔や銅めっき層から成る配線導体2を有する絶縁基板1を準備する。絶縁板1aは、ガラス繊維を縦横に織り込んだガラスクロスにエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させて硬化させることにより形成され、絶縁層1bは、未硬化のエポキシ樹脂や変性ポリフェニレンエーテル樹脂等の熱硬化性樹脂から成る厚みが10〜70μmの樹脂シートを絶縁板1aの上面に貼着するとともにその樹脂シートにレーザ加工により配線導体2を露出させる開口部1cを形成した後、上下から加圧しながら加熱して熱硬化させることにより絶縁板1a上に積層される。また、配線導体2は絶縁板1aの上面に予め銅箔を貼着しておくとともにその銅箔を所定のパターンにエッチング加工することにより形成される。
【0019】
次に図2(b)に示すように、開口部1c内の配線導体2上を含む絶縁基板1の上面の全面に厚みが1〜2μm程度の無電解銅めっき層3aを被着させる。絶縁基板1の上面の全面に無電解銅めっき層3aを被着させるには、まず、絶縁層1bの表面を約50℃の過マンガン酸塩類水溶液等の粗化液に浸漬することにより粗化し、次に、絶縁層1bの表面が粗化された絶縁基板1の上面を約30℃の無電解めっき用のパラジウム触媒水溶液中に浸漬して絶縁層1bの表面および開口部1c内の配線導体2上にパラジウム触媒を付着させ、次にその絶縁基板1の上面を硫酸銅、ロッセル塩、ホルマリン、EDTAナトリウム塩、安定剤等を含有する無電解銅めっき液に浸漬して絶縁層1bの表面および開口部1c内の配線導体2上に1〜2m程度の厚みの無電解銅めっき層3aを析出させる方法が採用される。
【0020】
次に、図2(c)に示すように、絶縁基板1の上面に被着させた無電解銅めっき層3a上に、半田接合パッド3が形成される部位を露出させる第一の開口部11aを有する第一のめっきレジスト層11を被着させる。第一のめっきレジスト層11は、例えば厚みが10〜50μm程度の未硬化の紫外線硬化性樹脂および熱硬化性樹脂を含有する感光性樹脂フィルムを無電解銅めっき層3aが被着された絶縁基板1上に貼着するとともに、これをフォトリソグラフィー技術を採用して露光および現像することにより形成される。
【0021】
次に、図2(d)に示すように、第一のめっきレジスト層11の第一の開口部11aから露出した無電解銅めっき層3a上に電解銅めっき層3bを被着させる。電解銅めっき層3bを被着させるには、硫酸、硫酸銅5水和物、塩素、光沢剤等を含有する電解銅めっき液を用い、無電解銅めっき層3aから数A/dmの電流を印加しながら電解銅めっきを施すことにより、5〜30μm程度の厚みの電解銅めっき層3bを析出させる方法が採用される。
【0022】
次に、図2(e)に示すように、第一のめっきレジスト層11を水酸化ナトリウム水溶液等の剥離液を用いて剥離した後、無電解銅めっき層3aおよび電解銅めっき層3b上に、半田接合パッド3が形成される部位に被着された電解銅めっき層3bの中央部を露出させる第二の開口部12aを有するとともに外周部を覆う第二のめっきレジスト層12を被着させる。第二のめっきレジスト層12は、例えば厚みが10〜50μm程度の未硬化の紫外線硬化性樹脂および熱硬化性樹脂を含有する感光性樹脂フィルムを無電解銅めっき層3aおよび電解銅めっき層3bが被着された絶縁基板1上に貼着するとともに、これをフォトリソグラフィー技術を採用して露光および現像することにより形成される。
【0023】
次に、図2(f)に示すように、第二のめっきレジスト層12の開口部12aから露出した電解銅めっき層3b上に電解ニッケルめっき層5を被着させる。電解ニッケルめっき層5を被着させるには、スルファミン浴やワット浴を用い、無電解銅めっき層3aから数A/dmの電流を印加しながら電解ニッケルめっきを施すことにより1〜5μm程度の厚みの電解ニッケルめっき層5を析出させる方法が採用される。このとき、電解めっきは緻密な結晶のめっき層を形成することができるので、電解ニッケルめっき層5の結晶は緻密なものとなる。
【0024】
次に、図2(g)に示すように、第二のめっきレジスト層を水酸化ナトリウム水溶液等の剥離液を用いて剥離した後、図2(h)に示すように、電解銅めっき層3bから露出する部位の無電解銅めっき層3aを硫酸および過酸化水素水あるいは硫酸銅等の硫酸系水溶液によりエッチング除去することによって、絶縁基板1の上面に無電解銅めっき層3aとその上の電解銅めっき層3bとから成り、その上面の中央部に電解ニッケルめっき層5が被着された半田接合パッド3を形成する。このとき、電解銅めっき層3bから露出する部位の無電解銅めっき層3aは除去されるので、めっき導通用の配線が残ることはなく、したがって半田接合パッド3に不要な静電容量やインダクタンスが形成されることはない。また、電解銅めっき層3bの露出部も多少エッチングされるので電解銅めっき層3bの上面に段差が形成される。
【0025】
次に、図2(i)に示すように、半田接合パッド3を形成した絶縁基板1を水酸化ナトリウム、亜塩素酸ナトリウム、安定剤等から成る黒化処理液に数分間浸漬して半田接合パッド3の電解ニッケルめっき層5から露出する無電解銅めっき層3aおよび電解銅めっき層3bの表面に黒化膜7を形成する。このとき、黒化膜7は電解ニッケルめっき層5から露出する無電解銅めっき層3aおよび電解銅めっき層3bの表面に選択的に形成されるので、電解ニッケルめっき層5が被着された半田接合パッド3の中央部に黒化処理の残渣が発生することはない。
【0026】
次に、図2(j)に示すように、絶縁基板1上に、半田接合パッド3の外周部を覆うとともに中央部を露出させる耐半田樹脂層4を被着形成する。なお、耐半田樹脂層4を被着形成するには、半田接合パッド3が形成された絶縁基板1の上面に例えばアクリル変性エポキシ樹脂等の感光性樹脂と光開始剤等とからなる混合物に30〜70質量%のシリカやタルク等の無機粉末フィラーを含有させた未硬化の耐半田樹脂を、スクリーン印刷やロールコート法により10〜80μm程度の厚みに塗布し、しかる後、半田接合パッド3の中央部を露出させる開口部を有するように露光、現像した後、それを紫外線硬化および熱硬化させる方法が採用される。このとき、半田接合パッド3の外周部には黒化膜7が形成されていることから、耐半田樹脂層4と半田接合パッド3とが強固に密着する。また、半田接合パッド3を構成する電解銅めっき層3bの上面に形成された段差により耐半田樹脂層4の樹脂が半田接合パッド3の中央部に流れ出すことが有効に防止される。
【0027】
そして最後に、図2(k)に示すように、耐半田樹脂層4から露出する半田接合パッド3上の電解ニッケルめっき層5上に無電解金めっき層6を被着させることによって本発明による配線基板が完成する。なお、無電解金めっき層6を被着させるには、シアン化金カリウム、クエン酸カリウム、エチレンジアミンテトラアセティクアシッド等を含有する無電解金めっき液中に浸漬することにより0.1〜1μm程度の厚みの無電解金めっき層6を被着させる方法が採用される。
【0028】
このように、本発明の配線基板の製造方法によれば、電解ニッケルめっき層5および無電解金めっき層6が被着された半田接合パッド3の中央部に黒化処理の残渣を発生させることがないとともに、半田接合パッド3の表面に緻密な結晶の電解ニッケルめっき層5および無電解金めっき層6をめっき導通用の配線を残すことなく良好に被着して、電子部品の電極を半田を介して半田接合パッド3に強固に接続することができるとともに電子部品を正常に作動させることが可能な配線基板を提供することができる。
【0029】
なお、本発明は、上述の実施の形態の一例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば、種々の変更や改良を施すことは何ら差し支えない。
【0030】
【発明の効果】
本発明の配線基板の製造方法によれば、内部および/または表面に配線導体を有し、上面に半田接合パッドが形成される絶縁基板を準備し、次にその絶縁基板の上面に無電解銅めっき層を被着させ、次にその無電解銅めっき層上に半田接合パッドが形成される部位の無電解銅めっき層を露出させる第一の開口部を有する第一のめっきレジスト層を被着させ、次に第一のめっきレジスト層の第一の開口部内に露出した無電解銅めっき層の上に電解銅めっき層を被着させ、次に第一のめっきレジスト層を剥離した後、無電解銅めっき層および電解銅めっき層上に半田接合パッドが形成される部位の電解銅めっき層の外周部を覆うとともにその電解銅めっき層の中央部を露出させる第二の開口部を有する第二のめっきレジスト層を被着させ、次に第二のめっきレジスト層の第二の開口部内に露出した電解銅めっき層上に電解ニッケルめっき層を被着させ、次に第二のめっきレジスト層を剥離した後、電解銅めっき層から露出する部位の無電解銅めっき層をエッチング除去して絶縁基板上に無電解銅めっき層とその上の電解銅めっき層とから成り、その上面の中央部に電解ニッケルめっき層が被着された半田接合パッドを形成し、次に半田接合パッドの電解ニッケルめっき層から露出する無電解銅めっき層および電解銅めっき層の表面を黒化処理し、次に絶縁基板の上面に、半田接合パッドの外周部を覆うとともに半田接合パッドの中央部を露出させる耐半田樹脂層を形成し、次に耐半田樹脂層から露出する半田接合パッド上の電解ニッケルめっき層上に無電解金めっき層を被着することから、電解ニッケルめっき層および無電解金めっき層が被着された半田接合パッドの中央部に黒化処理の残渣を発生させることがないとともに、半田接合パッドに接続されためっき導通用の配線を残すことなく耐半田樹脂層から露出する表面に緻密な電解ニッケルめっき層および無電解金めっき層を被着させることができる。したがって、電子部品の電極を半田接合パッドに半田を介して強固に接続することができるとともに電子部品を正常に作動させることが可能な配線基板を提供することができる。
【図面の簡単な説明】
【図1】本発明により製造される配線基板の実施の形態の一例を示す要部断面図である。
【図2】(a)〜(k)は本発明の配線基板の製造方法を説明するための各工程毎の要部断面図である。
【符号の説明】
1・・・・絶縁基板
2・・・・配線導体
3・・・・半田接合パッド
3a・・・無電解銅めっき層
3b・・・電解銅めっき層
4・・・・耐半田樹脂層
5・・・・電解ニッケルめっき層
6・・・・無電解金めっき層
7・・・・黒化膜
11・・・第一のめっきレジスト層
11a・・第一の開口部
12・・・第二のめっきレジスト層
12a・・第二の開口部
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a wiring board, wherein a solder joint pad to which an electrode of an electronic component is connected via solder is formed on a surface of an insulating substrate.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, as a wiring board used for mounting electronic components such as semiconductor integrated circuit elements, a plurality of layers of an organic material based insulating layer such as glass-epoxy resin and a wiring conductor made of copper such as copper foil are alternately formed. 2. Description of the Related Art There is known a wiring board in which a solder joint pad made of a copper plating layer to which electrodes of an electronic component are electrically connected via solder is formed on a laminated insulating board. This wiring board protects the insulating board from heat when connecting the electrodes of the electronic components to the solder joint pads via solder, and also uses heat resistant epoxy resin or the like to prevent the electrical short circuit between the solder joint pads. A solder-resistant resin layer made of resin is applied on the insulating substrate so as to cover the outer peripheral portion of the solder bonding pad. The solder bonding pad has a blackened film formed by a blackening process on the outer peripheral surface covered with the solder-resistant resin layer in order to strengthen the adhesion with the solder-resistant resin layer. Electroless nickel plating is usually applied to the exposed surface of the solder bonding pad to prevent its oxidative corrosion and to make the electrical connection between the solder bonding pad and the electrode of the electronic component via solder good and strong. A layer and an electroless gold plating layer are sequentially applied.
[0003]
In such a wiring board, first, a solder bonding pad made of a copper plating layer having a diameter of 250 to 600 μm is formed on an insulating board in which an organic material-based insulating layer and a wiring conductor made of copper are laminated, and then the insulating board is formed. The entire surface of the exposed surface of the solder bonding pad formed above is subjected to a blackening process to form a blackened film, and then the outer peripheral portion of the solder bonding pad is exposed on the insulating substrate and the solder bonding pad, and the central portion is exposed. After forming a solder-resistant resin layer to be formed, the blackened film on the exposed central surface of the solder bonding pad is removed by acid cleaning or chemical polishing by micro-etching. It is manufactured by sequentially depositing an electroless nickel plating layer and an electroless gold plating layer on the exposed surface. The electroless gold plating layer applied on the electroless nickel plating layer diffuses into the solder and disappears when the electrode of the electronic component and the solder bonding pad are connected via the solder.
[0004]
[Patent Document 1]
JP-A-2001-110939
[Problems to be solved by the invention]
However, in recent years, lead-free solder that does not contain lead has been used as solder for connecting electrodes of electronic components and solder joint pads of a wiring board in consideration of the environment. Such a lead-free solder generally has a melting point higher by about 10 to 20 ° C. than a conventional lead-containing solder. Therefore, the lead-free solder is used to form a solder joint pad between an electrode of an electronic component and a wiring board. When it is necessary to melt the solder, it is necessary to melt the solder at a temperature about 10 to 20 [deg.] C. higher than in the past. When such a high temperature is applied to the wiring board, the electroless nickel plating layer has a sparse crystal, so that the interface between the electroless nickel plating layer deposited on the solder bonding pad and the solder is weak. A large amount of inter-compounds are formed, and when heat or external stress is applied to the solder connecting the electrodes of the electronic component to the solder joint pads, the solder is easily peeled off from the plated metal layer, and as a result, There has been a problem that the electrodes of the electronic component and the solder bonding pads cannot be firmly connected via the solder. Therefore, the plating metal layer deposited on the solder bonding pad is a dense electrolytic nickel plating layer and the electrolytic gold plating layer deposited thereon, so that the nickel plating layer deposited on the solder bonding pad and the solder It is conceivable that a brittle intermetallic compound is hardly formed during the formation. However, in order to apply the electrolytic nickel plating layer and the electrolytic gold plating layer to each of the electrically independent solder joint pads, it is necessary to connect wiring for plating conduction for supplying electric charge to each solder joint pad. Unnecessary capacitances and inductances are formed on solder joint pads by such wiring for plating conduction, especially when mounting electronic components that operate at high frequencies. This causes a problem that the electronic component cannot be normally operated.
[0006]
In addition, in the conventional wiring board, when the blackened film at the central portion exposed from the solder-resistant resin layer of the blackened solder joint pad is removed, a residue of the blackening process remains at the central portion of the solder joint pad. If such a residue remains, the blackening treatment residue remaining in the center of the solder bonding pad between the center of the solder bonding pad from which the blackened film has been removed and the electroless nickel plating layer thereon This causes a problem that peeling is likely to occur.
[0007]
The present invention has been completed in view of such a conventional problem, and an object thereof is to generate a residue of a blackening treatment at a central portion of a solder bonding pad to which an electrolytic nickel plating layer and an electrolytic gold plating layer are applied. The electrode of the electronic component is firmly adhered to the solder joint pad via solder, without the need to leave a fine plated metal layer by electrolytic plating on the surface of the solder joint pad without leaving the wiring for plating conduction. It is an object of the present invention to provide a wiring board which can be connected to the electronic component and can normally operate the electronic component.
[0008]
[Means for Solving the Problems]
According to the method for manufacturing a wiring board of the present invention, an insulating substrate having a wiring conductor inside and / or on a surface and a solder bonding pad formed on an upper surface is prepared, and then an electroless copper plating layer is formed on the upper surface of the insulating substrate. Is deposited, and then a first plating resist layer having a first opening exposing the electroless copper plating layer at a portion where a solder bonding pad is formed on the electroless copper plating layer is deposited, Next, an electrolytic copper plating layer is deposited on the electroless copper plating layer exposed in the first opening of the first plating resist layer, and then the first plating resist layer is peeled off. A second plating having a second opening that covers an outer peripheral portion of the electrolytic copper plating layer at a portion where the solder bonding pad is formed on the plating layer and the electrolytic copper plating layer and exposes a central portion of the electrolytic copper plating layer A resist layer is applied, then a second resist An electrolytic nickel plating layer is applied on the electrolytic copper plating layer exposed in the second opening of the resist layer, and after the second plating resist layer is peeled off, there is no portion exposed from the electrolytic copper plating layer. The electrolytic copper plating layer is removed by etching to form a solder bonding pad consisting of an electroless copper plating layer and an electrolytic copper plating layer on the insulating substrate, and an electrolytic nickel plating layer applied to the center of the upper surface. Then, the surface of the electroless copper plating layer and the electrolytic copper plating layer exposed from the electrolytic nickel plating layer of the solder bonding pad is blackened, and then the outer peripheral portion of the solder bonding pad is covered on the upper surface of the insulating substrate. Forming a solder-resistant resin layer that exposes the center of the solder-bonding pad, and then depositing an electroless gold plating layer on the electrolytic nickel-plating layer on the solder-bonding pad that is exposed from the solder-resistant resin layer. Is shall.
[0009]
According to the method for manufacturing a wiring board of the present invention, an insulating substrate having a wiring conductor inside and / or on a surface and a solder bonding pad formed on an upper surface is prepared, and then an electroless copper is formed on the upper surface of the insulating substrate. Depositing a plating layer, and then depositing a first plating resist layer having a first opening exposing the electroless copper plating layer on the electroless copper plating layer where a solder bonding pad is to be formed; And then depositing an electrolytic copper plating layer on the electroless copper plating layer exposed in the first opening of the first plating resist layer, and then peeling off the first plating resist layer. A second opening that covers an outer peripheral portion of the electrolytic copper plating layer at a portion where the solder bonding pad is formed on the electrolytic copper plating layer and the electrolytic copper plating layer, and has a second opening that exposes a central portion of the electrolytic copper plating layer; A plating resist layer of An electrolytic nickel plating layer is applied on the electrolytic copper plating layer exposed in the second opening of the plating resist layer, and after the second plating resist layer is peeled off, a portion exposed from the electrolytic copper plating layer is removed. The electroless copper plating layer is removed by etching to form a solder joint pad consisting of an electroless copper plating layer on the insulating substrate and an electrolytic copper plating layer thereon, and an electrolytic nickel plating layer applied to the center of the upper surface. Forming, then blackening the surface of the electroless copper plating layer and the electrolytic copper plating layer exposed from the electrolytic nickel plating layer of the solder bonding pad, and then covering the outer peripheral portion of the solder bonding pad on the upper surface of the insulating substrate And forming a solder-resistant resin layer that exposes the center of the solder joint pad, and then applying an electroless gold plating layer on the electrolytic nickel plating layer on the solder joint pad exposed from the solder joint pad. The blackening treatment residue is not generated at the center of the solder bonding pad to which the electrolytic nickel plating layer and the electroless gold plating layer are applied, and the wiring for plating conduction connected to the solder bonding pad is left. The dense electrolytic nickel plating layer and the electroless gold plating layer can be adhered to the surface exposed from the solder-resistant resin layer without any problem.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, a method for manufacturing a wiring board according to the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view of a principal part showing an example of an embodiment of a wiring board manufactured by the manufacturing method of the present invention. In the drawing, 1 is an insulating substrate, 2 is a wiring conductor, 3 is a solder bonding pad, Denotes a solder-resistant resin layer, and these mainly constitute a wiring board according to the present invention.
[0011]
The insulating substrate 1 is made of, for example, an epoxy resin or a modified polyphenylene ether resin on an insulating plate 1a in which a glass cloth formed by weaving glass fibers vertically and horizontally is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. A plurality of wiring conductors 2 made of copper, such as a copper foil and a copper plating layer, are arranged inside and on the surface of the insulating layer 1b made of a thermosetting resin.
[0012]
On the surface of the insulating substrate 1, a plurality of solder bonding pads 3 made of a copper plating layer electrically connected to the wiring conductor 2 are formed. Are electrically connected via solder.
[0013]
The exposed upper surface of the solder bonding pad 3 is provided with an electrolytic nickel plating layer 5 and an electroless gold plating layer 6 to prevent oxidation corrosion of the solder bonding pad 3 and to improve the bonding between the solder bonding pad 3 and the solder. Are sequentially applied. When the solder is welded to the solder bonding pad 3, the electroless gold plating layer 6 diffuses into the solder and disappears, and the electrolytic nickel plating layer 5 and the solder are joined. At this time, since the crystal of the electrolytic nickel plating layer 5 deposited on the upper surface of the solder bonding pad 3 is dense, a large amount of brittle intermetallic compound is formed between the electrolytic nickel plating layer 5 and the solder. Therefore, the electrodes of the electronic component can be firmly connected to the solder bonding pads 3 via solder.
[0014]
Further, a solder-resistant resin layer 4 made of a heat-resistant resin such as an epoxy resin, which covers an outer peripheral portion of the solder bonding pad 3 and exposes a central portion thereof, is attached on the insulating substrate 1 and the solder bonding pad 3. The solder-resistant resin layer 4 protects the insulating substrate 1 from heat when an electrode of an electronic component is connected to the solder bonding pad 3 via solder and electrically short-circuits the solder bonding pads 3 via solder. It acts as a dam to prevent you from doing so.
[0015]
A blackened film 7 is formed on the surface of the solder bonding pad 3 covered with the solder-resistant resin layer 4 by a blackening process. Has a strong adhesion.
[0016]
Here, the blackening treatment means that the surface of the solder bonding pad 3 made of copper is oxidized with an alkaline oxidizing solution to generate needle-like crystals made of cuprous oxide and copper oxide, and this needle-like crystal is Surface roughening treatment to generate fine irregularities based on the surface roughness.
Further, since the surface becomes black after the treatment, this surface roughening treatment is called a blackening treatment, and the layer whose surface has changed to black is called a blackening film.
[0017]
Next, a method for manufacturing the above-described wiring board according to the present invention will be described in detail with reference to FIG. 2A to 2K are main-portion cross-sectional views of each step for explaining the method of manufacturing a wiring board according to the present invention.
[0018]
First, as shown in FIG. 2A, a thermosetting resin such as an epoxy resin or a modified polyphenylene ether resin is formed on an insulating plate 1a in which a glass cloth is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. An insulating substrate 1 prepared by laminating an insulating layer 1b made of and having a wiring conductor 2 made of a copper foil or a copper plating layer inside and / or on the surface is prepared. The insulating plate 1a is formed by impregnating a glass cloth woven with glass fibers vertically and horizontally with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin and curing the same. The insulating layer 1b is formed of an uncured epoxy resin or an uncured epoxy resin. A resin sheet made of a thermosetting resin such as a modified polyphenylene ether resin and having a thickness of 10 to 70 μm was attached to the upper surface of the insulating plate 1a, and an opening 1c for exposing the wiring conductor 2 was formed on the resin sheet by laser processing. Thereafter, the laminate is laminated on the insulating plate 1a by being heated and thermally cured while applying pressure from above and below. The wiring conductor 2 is formed by attaching a copper foil on the upper surface of the insulating plate 1a in advance and etching the copper foil into a predetermined pattern.
[0019]
Next, as shown in FIG. 2B, an electroless copper plating layer 3a having a thickness of about 1 to 2 μm is applied to the entire upper surface of the insulating substrate 1 including the wiring conductor 2 in the opening 1c. In order to apply the electroless copper plating layer 3a over the entire upper surface of the insulating substrate 1, first, the surface of the insulating layer 1b is roughened by immersing the surface of the insulating layer 1b in a roughening solution such as an aqueous solution of permanganate at about 50 ° C. Next, the upper surface of the insulating substrate 1 having the roughened surface of the insulating layer 1b is immersed in an aqueous solution of palladium catalyst for electroless plating at about 30 ° C. to form a wiring conductor on the surface of the insulating layer 1b and in the opening 1c. Then, the upper surface of the insulating substrate 1 is immersed in an electroless copper plating solution containing copper sulfate, rossel salt, formalin, sodium EDTA, a stabilizer, etc., and the surface of the insulating layer 1b is immersed. A method of depositing an electroless copper plating layer 3a having a thickness of about 1 to 2 m on the wiring conductor 2 in the opening 1c is employed.
[0020]
Next, as shown in FIG. 2C, a first opening 11a for exposing a portion where the solder bonding pad 3 is to be formed is formed on the electroless copper plating layer 3a attached to the upper surface of the insulating substrate 1. Is deposited on the first plating resist layer 11. The first plating resist layer 11 is, for example, an insulating substrate on which an electroless copper plating layer 3a is coated with a photosensitive resin film containing an uncured ultraviolet curable resin and a thermosetting resin having a thickness of about 10 to 50 μm. 1 and is formed by exposing and developing this by employing photolithography technology.
[0021]
Next, as shown in FIG. 2D, an electrolytic copper plating layer 3b is applied on the electroless copper plating layer 3a exposed from the first opening 11a of the first plating resist layer 11. To apply the electrolytic copper plating layer 3b, an electrolytic copper plating solution containing sulfuric acid, copper sulfate pentahydrate, chlorine, brightener, etc. is used, and a current of several A / dm 2 is supplied from the electroless copper plating layer 3a. Is applied to apply electrolytic copper plating to deposit an electrolytic copper plating layer 3b having a thickness of about 5 to 30 μm.
[0022]
Next, as shown in FIG. 2E, after the first plating resist layer 11 is peeled off using a peeling solution such as an aqueous sodium hydroxide solution, the first plating resist layer 11 is placed on the electroless copper plating layer 3a and the electrolytic copper plating layer 3b. And a second plating resist layer 12 having a second opening 12a for exposing a central portion of the electrolytic copper plating layer 3b applied to a portion where the solder bonding pad 3 is formed and covering the outer peripheral portion. . The second plating resist layer 12 is made of, for example, a photosensitive resin film containing an uncured UV-curable resin and a thermosetting resin having a thickness of about 10 to 50 μm by using an electroless copper plating layer 3a and an electrolytic copper plating layer 3b. It is formed by adhering onto the attached insulating substrate 1 and exposing and developing it using photolithography technology.
[0023]
Next, as shown in FIG. 2F, the electrolytic nickel plating layer 5 is applied on the electrolytic copper plating layer 3b exposed from the opening 12a of the second plating resist layer 12. In order to deposit the electrolytic nickel plating layer 5, a sulfamin bath or a watt bath is used, and while applying a current of several A / dm 2 from the electroless copper plating layer 3 a, electrolytic nickel plating is performed to about 1 to 5 μm. A method of depositing a thick electrolytic nickel plating layer 5 is employed. At this time, since the electrolytic plating can form a dense crystal plating layer, the crystals of the electrolytic nickel plating layer 5 become dense.
[0024]
Next, as shown in FIG. 2 (g), after the second plating resist layer is stripped using a stripping solution such as an aqueous solution of sodium hydroxide, the electrolytic copper plating layer 3b is stripped as shown in FIG. 2 (h). The electroless copper plating layer 3a on the upper surface of the insulating substrate 1 and the electrolytic solution thereover are removed by etching away the electroless copper plating layer 3a in a portion exposed from A solder joint pad 3 composed of a copper plating layer 3b and having an electrolytic nickel plating layer 5 applied to the center of the upper surface thereof is formed. At this time, the portion of the electroless copper plating layer 3a exposed from the electrolytic copper plating layer 3b is removed, so that no wiring for plating conduction remains, and therefore, unnecessary capacitance and inductance are unnecessary on the solder joint pad 3. It is not formed. Also, the exposed portion of the electrolytic copper plating layer 3b is slightly etched, so that a step is formed on the upper surface of the electrolytic copper plating layer 3b.
[0025]
Next, as shown in FIG. 2 (i), the insulating substrate 1 on which the solder bonding pads 3 are formed is immersed for several minutes in a blackening treatment solution comprising sodium hydroxide, sodium chlorite, a stabilizer and the like to perform solder bonding. A blackening film 7 is formed on the surfaces of the electroless copper plating layer 3a and the electrolytic copper plating layer 3b exposed from the electrolytic nickel plating layer 5 of the pad 3. At this time, since the blackening film 7 is selectively formed on the surfaces of the electroless copper plating layer 3a and the electrolytic copper plating layer 3b exposed from the electrolytic nickel plating layer 5, the solder on which the electrolytic nickel plating layer 5 is adhered is formed. No residue of the blackening process is generated at the center of the bonding pad 3.
[0026]
Next, as shown in FIG. 2 (j), a solder-resistant resin layer 4 is formed on the insulating substrate 1 so as to cover the outer peripheral portion of the solder bonding pad 3 and expose the central portion. In order to form the solder-resistant resin layer 4 on the insulating substrate 1 on which the solder bonding pads 3 are formed, for example, a mixture of a photosensitive resin such as an acrylic-modified epoxy resin and a photoinitiator is applied to the upper surface of the insulating substrate 1. An uncured solder-resistant resin containing an inorganic powder filler such as silica or talc of about 70% by mass is applied to a thickness of about 10 to 80 μm by screen printing or a roll coating method. After exposing and developing so as to have an opening for exposing the central portion, a method of ultraviolet curing and thermal curing is adopted. At this time, since the blackened film 7 is formed on the outer peripheral portion of the solder bonding pad 3, the solder-resistant resin layer 4 and the solder bonding pad 3 are firmly adhered. Also, the step formed on the upper surface of the electrolytic copper plating layer 3b constituting the solder bonding pad 3 effectively prevents the resin of the solder resistant resin layer 4 from flowing to the center of the solder bonding pad 3.
[0027]
Finally, as shown in FIG. 2 (k), an electroless gold plating layer 6 is applied on the electrolytic nickel plating layer 5 on the solder bonding pad 3 exposed from the solder-resistant resin layer 4 according to the present invention. The wiring board is completed. In order to deposit the electroless gold plating layer 6, the thickness is about 0.1 to 1 μm by dipping in an electroless gold plating solution containing potassium potassium cyanide, potassium citrate, ethylenediaminetetraacetate, and the like. A method of applying an electroless gold plating layer 6 having a thickness of 3 mm is adopted.
[0028]
As described above, according to the method for manufacturing a wiring board of the present invention, the blackening residue is generated at the center of the solder bonding pad 3 to which the electrolytic nickel plating layer 5 and the electroless gold plating layer 6 are applied. In addition, the electrode of the electronic component is soldered by densely depositing the electrolytic nickel plating layer 5 and the electroless gold plating layer 6 of the dense crystal on the surface of the solder bonding pad 3 without leaving the wiring for plating conduction. Thus, it is possible to provide a wiring board that can be firmly connected to the solder bonding pad 3 via the semiconductor device and that can normally operate the electronic component.
[0029]
It should be noted that the present invention is not limited to the above-described embodiment, and various changes and improvements may be made without departing from the scope of the present invention.
[0030]
【The invention's effect】
According to the method for manufacturing a wiring board of the present invention, an insulating substrate having a wiring conductor inside and / or on a surface and a solder bonding pad formed on an upper surface is prepared, and then an electroless copper is formed on the upper surface of the insulating substrate. Depositing a plating layer, and then depositing a first plating resist layer having a first opening exposing the electroless copper plating layer on the electroless copper plating layer where a solder bonding pad is to be formed; And then depositing an electrolytic copper plating layer on the electroless copper plating layer exposed in the first opening of the first plating resist layer, and then peeling off the first plating resist layer. A second opening that covers an outer peripheral portion of the electrolytic copper plating layer at a portion where the solder bonding pad is formed on the electrolytic copper plating layer and the electrolytic copper plating layer, and has a second opening that exposes a central portion of the electrolytic copper plating layer; A plating resist layer of An electrolytic nickel plating layer is applied on the electrolytic copper plating layer exposed in the second opening of the plating resist layer, and after the second plating resist layer is peeled off, a portion exposed from the electrolytic copper plating layer is removed. The electroless copper plating layer is removed by etching to form a solder joint pad consisting of an electroless copper plating layer on the insulating substrate and an electrolytic copper plating layer thereon, and an electrolytic nickel plating layer applied to the center of the upper surface. Forming, then blackening the surface of the electroless copper plating layer and the electrolytic copper plating layer exposed from the electrolytic nickel plating layer of the solder bonding pad, and then covering the outer peripheral portion of the solder bonding pad on the upper surface of the insulating substrate And forming a solder-resistant resin layer that exposes the center of the solder joint pad, and then applying an electroless gold plating layer on the electrolytic nickel plating layer on the solder joint pad exposed from the solder joint pad. The blackening treatment residue is not generated at the center of the solder bonding pad to which the electrolytic nickel plating layer and the electroless gold plating layer are applied, and the wiring for plating conduction connected to the solder bonding pad is left. The dense electrolytic nickel plating layer and the electroless gold plating layer can be adhered to the surface exposed from the solder-resistant resin layer without any problem. Therefore, it is possible to provide a wiring board that can firmly connect the electrodes of the electronic component to the solder joint pads via the solder and can normally operate the electronic component.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a principal part showing an example of an embodiment of a wiring board manufactured according to the present invention.
FIGS. 2 (a) to 2 (k) are cross-sectional views of a principal part in each step for explaining a method of manufacturing a wiring board according to the present invention.
[Explanation of symbols]
1 ... Insulating substrate 2 ... Wiring conductor 3 ... Soldering joint pad 3a ... Electroless copper plating layer 3b ... Electrolytic copper plating layer 4 ... Solder resistant resin layer 5 ... ... Electrolytic nickel plating layer 6 ... Electroless gold plating layer 7 ... Blackening film 11 ... First plating resist layer 11a ... First opening 12 ... Second Plating resist layer 12a—second opening

Claims (1)

内部および/または表面に配線導体を有し、上面に半田接合パッドが形成される絶縁基板を準備する工程と、該絶縁基板の上面に無電解銅めっき層を被着させる工程と、該無電解銅めっき層上に前記半田接合パッドが形成される部位の前記無電解銅めっき層を露出させる第一の開口部を有する第一のめっきレジスト層を被着させる工程と、前記第一の開口部内に露出した前記無電解銅めっき層の上に電解銅めっき層を被着させる工程と、前記第一のめっきレジスト層を剥離した後、前記無電解銅めっき層および電解銅めっき層上に前記半田接合パッドが形成される部位の前記電解銅めっき層の外周部を覆うとともに該電解銅めっき層の中央部を露出させる第二の開口部を有する第二のめっきレジスト層を被着させる工程と、前記第二の開口部内に露出した前記電解銅めっき層上に電解ニッケルめっき層を被着させる工程と、前記第二のめっきレジスト層を剥離した後、前記電解銅めっき層から露出する部位の前記無電解銅めっき層をエッチング除去し、前記絶縁基板上に無電解銅めっき層とその上の電解銅めっき層とから成り、その上面の中央部に電解ニッケルめっき層が被着された半田接合パッドを形成する工程と、前記半田接合パッドの前記電解ニッケルめっき層から露出する前記無電解銅めっき層および電解銅めっき層の表面を黒化処理する工程と、前記絶縁基板の上面に、前記半田接合パッドの外周部を覆うとともに該半田接合パッドの中央部を露出させる耐半田樹脂層を形成する工程と、該耐半田樹脂層から露出する前記半田接合パッド上の電解ニッケルめっき層上に無電解金めっき層を被着する工程とを順次行なうことを特徴とする配線基板の製造方法。A step of preparing an insulating substrate having a wiring conductor inside and / or on a surface and having a solder bonding pad formed on the upper surface, a step of applying an electroless copper plating layer on the upper surface of the insulating substrate, Applying a first plating resist layer having a first opening exposing the electroless copper plating layer at a portion where the solder bonding pad is formed on the copper plating layer; and Applying an electrolytic copper plating layer on the exposed electroless copper plating layer, and peeling the first plating resist layer, and then applying the solder on the electroless copper plating layer and the electrolytic copper plating layer. A step of covering a peripheral portion of the electrolytic copper plating layer at a portion where a bonding pad is formed and applying a second plating resist layer having a second opening exposing a central portion of the electrolytic copper plating layer, The second opening A step of applying an electrolytic nickel plating layer on the electrolytic copper plating layer exposed to Forming a solder bonding pad comprising an electroless copper plating layer on the insulating substrate and an electrolytic copper plating layer thereon, and an electrolytic nickel plating layer applied to a central portion of the upper surface thereof, Blackening the surfaces of the electroless copper plating layer and the electrolytic copper plating layer exposed from the electrolytic nickel plating layer of the solder bonding pad, and covering an outer peripheral portion of the solder bonding pad on the upper surface of the insulating substrate Forming a solder-resisting resin layer that exposes the central portion of the solder-bonding pad, and forming a solder-resisting resin layer on the electrolytic nickel plating layer on the solder-bonding pad that is exposed from the solder-resistant resin layer. Method for manufacturing a wiring substrate, characterized by performing Kaikin plating layer sequentially and a step of depositing.
JP2002327817A 2002-11-12 2002-11-12 Method of manufacturing wiring board Pending JP2004165325A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014143361A (en) * 2013-01-25 2014-08-07 Kyocera Corp Ceramic wiring board
JP5795415B1 (en) * 2014-08-29 2015-10-14 新光電気工業株式会社 Wiring board and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014143361A (en) * 2013-01-25 2014-08-07 Kyocera Corp Ceramic wiring board
JP5795415B1 (en) * 2014-08-29 2015-10-14 新光電気工業株式会社 Wiring board and manufacturing method thereof

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