JP2004040056A - Wiring-pattern structure, and bump forming method - Google Patents

Wiring-pattern structure, and bump forming method Download PDF

Info

Publication number
JP2004040056A
JP2004040056A JP2002198891A JP2002198891A JP2004040056A JP 2004040056 A JP2004040056 A JP 2004040056A JP 2002198891 A JP2002198891 A JP 2002198891A JP 2002198891 A JP2002198891 A JP 2002198891A JP 2004040056 A JP2004040056 A JP 2004040056A
Authority
JP
Japan
Prior art keywords
pattern line
pattern
bump
receiving pad
extending direction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002198891A
Other languages
Japanese (ja)
Inventor
Hidekazu Hirakawa
平川　英一
Satoshi Miyazawa
宮沢　智
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2002198891A priority Critical patent/JP2004040056A/en
Priority to AU2003281445A priority patent/AU2003281445A1/en
Priority to PCT/JP2003/008492 priority patent/WO2004006637A1/en
Priority to TW092118597A priority patent/TW200406901A/en
Publication of JP2004040056A publication Critical patent/JP2004040056A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0613—Square or rectangular array
    • H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected
    • H01L2224/06136—Covering only the central area of the surface to be connected, i.e. central arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09281—Layout details of a single conductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring-pattern structure and a bump forming method whereby in height variations of the conductive bumps can be prevented while making wiring patterns further fine. <P>SOLUTION: A first bump receiving pad having a bent structure is formed out of first and second members 102, 103. The nearly equal cylindrical portions are removed from a resist film 130 which are formed on the top surfaces of the first bump receiving pad and a second bump receiving pad. At this time, since the surface areas of first and second exposed portions 104, 114 are equal to each other, no variation occurs in conductive bumps which are formed respectively on the first and second exposed portions 104, 114. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、基材上に形成される配線パターンの構造及び当該配線パターンに導電性バンプを形成するバンプの形成方法に関する。
【０００２】
【従来の技術】
近年、携帯電話機やノートブック型パーソナルコンピュータに代表されるように、電子機器の小型化、高速化が要求されている。このため、半導体デバイスの高集積化、高速化が必要となり、更には、半導体デバイスを搭載するプリント配線板についても、配線パターンの微細化が必要となっている。
【０００３】
図１は、従来の配線パターンの構造の一例を示す平面図である。同図に示す配線パターンは、第１のパターン線５０１、第１のバンプ受けパッド５０２、第２のパターン線５１１、第２のバンプ受けパッド５１２、第３のパターン線５２１を有する構造である。
【０００４】
第２のパターン線５１１は、直線状に延在する。第２のバンプ受けパッド５１２は、第２のパターン線５１１の先端に接続され、当該第２のパターン線５１１の延在方向と同一の方向に延在する。
【０００５】
第１のパターン線５０１は、第２のパターン線５１１と平行に延在するとともに、端部が第２のパターン線５１１の側に曲折し、第２のパターン線５１１の延在方向の延長線上まで延在する。第１のバンプ受けパッド５０２は、第１のパターン線５０１の先端に接続され、第２のバンプ受けパッド５１２とほぼ同一直線上に延在する。
【０００６】
第３のパターン線５２１は、第１のバンプ受けパッド５０２の延在方向の延長線上に、第１のバンプ受けパッド５０２及び第２のバンプ受けパッド５１２の延在方向に垂直に延在する。
【０００７】
第１のバンプ受けパッド５０２及び第２のバンプ受けパッド５１２には、以下の手順により、半田バンプ等の導電性バンプが形成される。まず、第１のパターン線５０１、第１のバンプ受けパッド５０２、第２のパターン線５１１、第２のバンプ受けパッド５１２、第３のパターン線５２１の形成面にレジスト膜５３０が形成される。
【０００８】
次に、第１のバンプ受けパッド５０２及び第２のバンプ受けパッド５１２の中央部分の上面に形成されているレジスト膜５３０がほぼ円筒状に除去される。これにより、孔５３１が形成されて第１のバンプ受けパッド５０２の一部５０３が露出するとともに、孔５３２が形成されて第２のバンプ受けパッド５１２の一部５１３が露出する。以下、第１のバンプ受けパッド５０２の一部５０３を第１の露出部５０３と称し、第２のバンプ受けパッド５１２の一部５１３を第２の露出部５１３と称する。レジスト膜５３０を除去する際は、孔５３１及び孔５３２の半径を同一にし、第１の露出部５０３及び第２の露出部５１３の表面積が同一となるようにする。
【０００９】
次に、レジスト膜５３０の上面に半田ペースト等の導電性ペースト（図示せず）が塗布される。この導電性ペーストは、レジスト膜５３０に形成された孔５３１及び孔５３２に流入する。その後、孔５３１及び孔５３２に流入した導電性ペーストにより、第１の露出部５０３及び第２の露出部５１３上に導電性バンプ（図示せず）が形成される。上述したように、第１の露出部５０３及び第２の露出部５１３の表面積は同一であるため、これらの上に形成される導電性バンプの高さは、ばらつきが生じない。
【００１０】
【発明が解決しようとする課題】
しかしながら、上述したように、第１のバンプ受けパッド５０２と第２のバンプ受けパッド５１２とが同一直線上に延在する構造では、これら第１のバンプ受けパッド５０２と第２のバンプ受けパッド５１２とが接触しない構造とすると、第１の露出部５０３上及び第２の露出部５１３上に形成される導電性バンプの間隔が広くなる。また、第１のバンプ受けパッド５０２の延在方向と第３のパターン線５２１の延在方向とが垂直であるため、これら第１のバンプ受けパッド５０２と第３のパターン線５２１とが接触しない構造とすると、第１の露出部５０３上に形成される導電性バンプと第３のパターン線５２１の間隔が広くなる。このため、配線パターンの微細化の妨げとなっていた。
【００１１】
このような問題の対策として、第１のバンプ受けパッド５０２を小さくし、これに伴って孔５３１の半径を小さくすることが考えられる。しかし、この方法では、第１の露出部５０３の表面積が第２の露出部５１３の表面積より小さくなる。このため、これら第１の露出部５０３上及び第２の露出部５１３上に形成される導電性バンプの高さにばらつきが生じてしまう。
【００１２】
本発明は、上記問題点を解決するものであり、その目的は、配線パターンの更なる微細化を図りつつ、導電性バンプの高さにばらつきが生じることを防止することが可能な配線パターンの構造及びバンプの形成方法を提供することにある。
【００１３】
【課題を解決するための手段】
上記の目的を達成するため、本発明の配線パターンの構造は、請求項１に記載されるように、平行して延在する第１及び第２のパターン線と、前記第１のパターン線に接続されるバンプ受けパッドとを有する配線パターンの構造において、前記バンプ受けパッドは、前記第１のパターン線に接続し、前記第２のパターン線の側へ曲折して延在する第１の部分と、前記第１の部分に接続し、前記第２のパターン線の延長線上の位置において該第２のパターン線の側へ曲折し、該第２のパターン線に対して垂直に延在する第２の部分とを備えることを特徴とする。
【００１４】
また、本発明の配線パターンの構造は、請求項２に記載されるように、請求項１に記載の配線パターンの構造において、前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であることを特徴とする。
【００１５】
また、本発明の配線パターンの構造は、請求項３に記載されるように、請求項１又は２に記載の配線パターンの構造において、前記第１の部分と前記第２の部分との接続位置に形成される導電性バンプを備えることを特徴とする。
【００１６】
また、本発明の配線パターンの構造は、請求項４に記載されるように、平行して延在する第１及び第２のパターン線と、前記第１のパターン線に接続される第１のバンプ受けパッドと、前記第２のパターン線に接続される第２のバンプ受けパッドとを有する配線パターンの構造において、前記第１のバンプ受けパッドは、前記第１のパターン線の中途部に接続し、前記第２のパターン線の側へ曲折して延在する第１の部分と、前記第１の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第１のパターン線に対して平行に延在する第２の部分とを備え、前記第２のバンプ受けパッドは、前記第２のパターン線の中途部に接続し、前記第１のパターン線の側へ曲折して延在する第３の部分と、前記第３の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第２のパターン線に対して平行に延在する第４の部分とを備えることを特徴とする。
【００１７】
また、本発明の配線パターンの構造は、請求項５に記載されるように、請求項４に記載の配線パターンの構造において、前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であり、前記第２のパターン線の延在方向と前記第３の部分の延在方向とのなす角度と、前記第３の部分の延在方向と前記第４の部分の延在方向とのなす角度とが４５°であることを特徴とする。
【００１８】
また、本発明の配線パターンの構造は、請求項６に記載されるように、請求項４又は５に記載の配線パターンの構造において、前記第１の部分と前記第２の部分との接続位置に形成される第１の導電性バンプと、前記第３の部分と前記第４の部分との接続位置に形成される第２の導電性バンプとを備えることを特徴とする。
【００１９】
また、本発明のバンプの形成方法は、請求項７に記載されるように、平行して延在する第１及び第２のパターン線を形成する手順と、前記第１のパターン線に接続され、前記第２のパターン線の側へ曲折して延在する第１の部分と、前記第１の部分に接続し、前記第２のパターン線の延長線上の位置において該第２のパターン線の側へ曲折し、該第２のパターン線に対して垂直に延在する第２の部分とを備えるバンプ受けパッドを形成する手順と、前記第１及び第２のパターン線と前記バンプ受けパッドの形成面にレジスト膜を形成する手順と、前記第１の部分と前記第２の部分の接続位置の上面のレジスト膜を、前記第１の部分と前記第２の部分の接続位置を中心としてほぼ円筒状に除去する手順と、露出した前記第１の部分と前記第２の部分の接続位置に導電性バンプを形成する手順とを備えることを特徴とする。
【００２０】
また、本発明のバンプの形成方法は、請求項８に記載されるように、請求項７に記載のバンプの形成方法において、前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であることを特徴とする。
【００２１】
また、本発明のバンプの形成方法は、請求項９に記載されるように、平行して延在する第１及び第２のパターン線を形成する手順と、前記第１のパターン線の中途部に接続し、前記第２のパターン線の側へ曲折して延在する第１の部分と、前記第１の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第１のパターン線に対して平行に延在する第２の部分とを備える第１のバンプ受けパッドを形成する手順と、前記第２のパターン線の中途部に接続し、前記第１のパターン線の側へ曲折して延在する第３の部分と、前記第３の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第２のパターン線に対して平行に延在する第４の部分とを備える第２のバンプ受けパッドを形成する手順と、前記第１及び第２のパターン線と前記第１及び第２のバンプ受けパッドの形成面にレジスト膜を形成する手順と、前記第１の部分と前記第２の部分の接続位置の上面のレジスト膜を、前記第１の部分と前記第２の部分の接続位置を中心としてほぼ円筒状に除去する手順と、前記第３の部分と前記第４の部分の接続位置の上面のレジスト膜を、前記第３の部分と前記第４の部分の接続位置を中心としてほぼ円筒状に除去する手順と、露出した前記第１の部分と前記第２の部分の接続位置に導電性バンプを形成する手順と、露出した前記第３の部分と前記第４の部分の接続位置に導電性バンプを形成する手順とを備えることを特徴とする。
【００２２】
また、本発明のバンプの形成方法は、請求項１０に記載されるように、請求項９に記載のバンプの形成方法において、前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であり、前記第２のパターン線の延在方向と前記第３の部分の延在方向とのなす角度と、前記第３の部分の延在方向と前記第４の部分の延在方向とのなす角度とが４５°であることを特徴とする。
【００２３】
本発明によれば、曲折した構造のバンプ受けパッドを用いることにより、従来より導電性バンプ同士の間隔や導電性バンプとパターン線との間隔を狭めた場合でも、バンプ受けパッド同士の接触や導電性パッドとパターン線との接触を避けることができ、配線パターンの更なる微細化が可能となる。また、パターン線及びバンプ受けパッドの形成面にレジスト膜を形成するとともに、各バンプ受けパッドの上面のレジスト膜を同一のほぼ円筒状に除去した場合に、各バンプ受けパッドの露出面の面積を同一にすることができる。このため、バンプ受けパッド上に形成される導電性バンプの高さがばらつくことを防止することができる。
【００２４】
【発明の実施の形態】
以下、本発明の実施の形態として、第１及び第２実施例を図面に基づいて説明する。
【００２５】
まず、第１実施例について説明する。図２は、第１実施例における配線パターンの構造の一例を示す平面図である。一方、図３は、図２におけるＡ−Ｂ線の断面図である。これら図２及び図３に示す配線パターンは、第１のパターン線１０１、第１の部材（第１のパッド部）１０２及び第２の部材（第２のパッド部）１０３によって構成される第１のバンプ受けパッド、第２のパターン線１１１、第２のバンプ受けパッド１１２、第３のパターン線１２１を有する構造である。
【００２６】
これら第１のパターン線１０１、第１の部材１０２及び第２の部材１０３によって構成される第１のバンプ受けパッド、第２のパターン線１１１、第２のバンプ受けパッド１１２、第３のパターン線１２１は、基材１４０の上面に形成される。形成方法としてはサブトラクティブ法、セミアディティブ法、フルアディティブ法等が採用される。サブトラクティブ法は、基材上に感光性エッチングレジスト膜あるいは金属レジスト膜を形成し、エッチング法により、配線パターン以外の部分の導体を除去する方法である。セミアディティブ法は、基材上に無電解銅メッキを施した後、メッキレジストにより配線パターンを形成する部位を露出させ、露出した無電解銅メッキ膜を電極とし、配線パターンを形成する部分のみに電解メッキを成長させる方法である。フルアディティブ法は、メッキレジストを露光現像することにより、配線パターンを形成する部分のみを開口し、開口した部分のみに無電解メッキを成長させる方法である。
【００２７】
第２のパターン線１１１は、直線状に延在する。第２のバンプ受けパッド１１２は、第２のパターン線１１１の先端に接続され、当該第２のパターン線１１１の延在方向と同一の方向に延在する。この第２のバンプ受けパッド１１２は、例えば長手方向が１７５μｍ、幅が５０±１０μｍである。
【００２８】
第１のパターン線１０１は、第２のパターン線１１１と平行に延在する。第１のパターン線１０１と第２のパターン線１０２の間隔は、例えば５５μｍである。第１のバンプ受けパッドを構成する第１の部材１０２は、第１のパターン線１０１の先端に接続され、第２のパターン線１１１の側へ曲折し、第１のパターン線１０１の延在方向と４５°の角度をなす方向に延在する。第１のバンプ受けパッドを構成する第２の部材１０３は、第１の部材１０２の先端に接続され、第２のパターン線１１１の側へ曲折し、第１の部材１０２の延在方向と４５°の角度をなす方向に延在する。従って、第２の部材１０２は、第２のパターン線１１１の延在方向に対して垂直に延在する。これら第１の部材１０２及び第２の部材１０３は、例えば幅が第２のバンプ受けパッド１１２と同様、５０±１０μｍである。また、第２の部材１０３と第３のパターン線１２１との間隔は、例えば３０μｍである。
【００２９】
基材１４０における、第１のパターン線１０１、第１の部材１０２及び第２の部材１０３によって構成される第１のバンプ受けパッド、第２のパターン線１１１、第２のバンプ受けパッド１１２、第３のパターン線１２１が形成された面には、レジスト膜１３０が形成される。
【００３０】
その後、このレジスト膜１３０を露光現像することにより、第１の部材１０２と第２の部材１０３の接続位置の上面のレジスト膜１３０が当該第１の部材１０２と第２の部材１０３の接続位置を中心としてほぼ円筒状に除去される。これにより、孔１３１が形成され、第１のバンプ受けパッドの一部１０４が露出する。
同様に、レジスト膜１３０を露光現像することにより、第２のバンプ受けパッド１１２の上面のレジスト膜１３０がほぼ円筒状に除去される。これにより、孔１３２が形成され、第２のバンプ受けパッドの一部１１４が露出する。以下、第１のバンプ受けパッドの一部１０４を第１の露出部１０４と称し、第２のバンプ受けパッド１１２の一部１１４を第２の露出部１１４と称する。なお、レジスト膜１３０を除去する際は、孔１３１及び孔１３２の半径を同一にする。孔１３１及び孔１３２の半径は、例えば下部が１０５μｍ、上部が１１５±１２μｍであり、孔１３１の中心と孔１３２の中心との距離は、１９０μｍである。このとき、第１の露出部１０４及び第２の露出部１１４の表面積は同一になる。
【００３１】
また、第１のバンプ受けパッドの先端部分及び第２のバンプ受けパッド１１２の先端部分を露出させないのは、これら先端部分をレジスト膜１３０で押圧することにより、第１のバンプ受けパッド及び第２のバンプ受けパッド１１２が上方に跳ね上がることを防止するためである。
【００３２】
次に、レジスト膜１３０の上面に半田ペースト等の導電性ペースト（図示せず）が塗布される。この導電性ペーストは、レジスト膜１３０に形成された孔１３１及び孔１３２に流入する。その後、レジスト膜１３０を剥離することにより、孔１３１及び孔１３２に流入した導電性ペーストによって、図４に示すように、第１の露出部１０４上に導電性バンプ１５１が形成され、第２の露出部１１４上に導電性バンプ１５２が形成される。または、第１の露出部１０４及び第２の露出部に導電性ボールを搭載した後、当該導電性ボールをリフローすることにより、第１の露出部１０４上に導電性バンプ１５１が形成され、第２の露出部１１４上に導電性バンプ１５２が形成される。
【００３３】
このように、第１の部材１０２及び第２の部材１０３により、曲折した構造の第１のバンプ受けパッドを構成することにより、導電性バンプ１５１と導電性バンプ１５２の間隔や導電性バンプ１５１と第３のパターン線１２１との間隔を狭めた場合でも、バンプ受けパッド同士の接触やバンプ受けパッドとパターン線との接触を避けることができ、配線パターンの更なる微細化が可能となる。また、曲折した構造の第１のバンプ受けパッドを用い、第１及び第２のバンプ受けパッドの上面のレジスト膜１３０を同一のほぼ円筒状に除去した場合であっても、第１の露出部１０４及び第２の露出部１１４の表面積は同一である。このため、導電性バンプ１５１及び導電性バンプ１５２の高さにばらつきが生じることはない。
【００３４】
特に、第１のバンプ受けパッドを構成する第１の部材１０２を第１のパターン線１０１の延在方向と４５°の角度をなす方向に延在させるとともに、第２の部材１０３を第１の部材１０２の延在方向と４５°の角度をなす方向に延在させることにより、第１のパターン線１０１の延在方向と、当該延在方向と垂直の方向の双方について、最適な微細化を図ることができる。
【００３５】
次に、第２実施例について説明する。図５は、第２実施例における配線パターンの構造の一例を示す平面図である。一方、図６は、図５におけるＡ−Ｂ線の断面図である。これら図５及び図６に示す配線パターンは、第１のパターン線２０１、第１の部材（第１のパッド部）２０３及び第２の部材（第２のパッド部）２０４によって構成される第１のバンプ受けパッド、第２のパターン線２０２、第３の部材（第３のパッド部）２０６及び第４の部材（第４のパッド部）２０７によって構成される第２のバンプ受けパッドを有する構造である。
【００３６】
これら第１のパターン線２０１、第１の部材２０３及び第２の部材２０４によって構成される第１のバンプ受けパッド、第２のパターン線２０２、第３の部材２０６及び第２の部材２０７によって構成される第２のバンプ受けパッドは、基材２４０の上面に形成される。形成方法としては第１実施例と同様、サブトラクティブ法、セミアディティブ法、フルアディティブ法等が採用される。
【００３７】
第１のパターン線２０１及び第２のパターン線２０２は、直線状に平行に延在する。第１のバンプ受けパッドを構成する第１の部材２０３は、第１のパターン線２０１の中途部に接続され、第２のパターン線２０２の側へ曲折し、第１のパターン線２０１の延在方向と４５°の角度をなす方向に延在する。第１のバンプ受けパッドを構成する第２の部材２０４は、第１の部材２０３の先端に接続され、第１のパターン線２０１と第２のパターン線２０２との間の中央の位置において曲折し、第１の部材２０３の延在方向と４５°の角度をなす方向に延在する。
従って、第２の部材２０４は、第１のパターン線２０１の延在方向に対して平行に延在する。
【００３８】
同様に、第２のバンプ受けパッドを構成する第３の部材２０６は、第２のパターン線２０２の中途部に接続され、第１のパターン線２０１の側へ曲折し、第２のパターン線２０２の延在方向と４５°の角度をなす方向に延在する。第２のバンプ受けパッドを構成する第４の部材２０７は、第３の部材２０６の先端に接続され、第１のパターン線２０１と第２のパターン線２０２との間の中央の位置において曲折し、第３の部材２０６の延在方向と４５°の角度をなす方向に延在する。従って、第４の部材２０７は、第２のパターン線２０２の延在方向に対して平行に延在する。
【００３９】
第１の部材２０３、第２の部材２０４、第３の部材２０６及び第４の部材２０７は、例えば幅が５０±１０μｍである。
【００４０】
基材２４０における、第１のパターン線２０１、第１の部材２０３及び第２の部材２０４によって構成される第１のバンプ受けパッド、第２のパターン線２０２、第３の部材２０６及び第２の部材２０７によって構成される第２のバンプ受けパッドが形成された面には、レジスト膜２３０が形成される。
【００４１】
その後、このレジスト膜２３０を露光現像することにより、第１の部材２０３と第２の部材２０４の接続位置の上面のレジスト膜２３０が当該第１の部材２０３と第２の部材２０４の接続位置を中心としてほぼ円筒状に除去される。これにより、孔２３１が形成され、第１のバンプ受けパッドの一部２０５が露出する。
同様に、レジスト膜２３０を露光現像することにより、第２のバンプ受けパッドの上面のレジスト膜２３０がほぼ円筒状に除去される。これにより、孔２３２が形成され、第２のバンプ受けパッドの一部２０８が露出する。以下、第１のバンプ受けパッドの一部２０５を第１の露出部２０５と称し、第２のバンプ受けパッドの一部２０８を第２の露出部２０８と称する。なお、レジスト膜２３０を除去する際は、第１実施例と同様、孔２３１及び孔２３２の半径を同一にする。孔２３１及び孔２３２の半径は、例えば下部が１０５μｍ、上部が１１５±１２μｍであり、孔２３１の中心と孔２３２の中心との距離は、１９０μｍである。このとき、第１の露出部２０５及び第２の露出部２０８の表面積は同一になる。
【００４２】
次に、レジスト膜２３０の上面に半田ペースト等の導電性ペースト（図示せず）が塗布される。この導電性ペーストは、レジスト膜２３０に形成された孔２３１及び孔２３２に流入する。その後、レジスト膜２３０を剥離することにより、孔２３１及び孔２３２に流入した導電性ペーストにより、図７に示すように、第１の露出部２０５上に導電性バンプ２５１が形成され、第２の露出部２０８上に導電性バンプ２５２が形成される。
【００４３】
このように、第１の部材２０３及び第２の部材２０４により、曲折した構造の第１のバンプ受けパッドを構成し、第３の部材２０６及び第４の部材２０７により、曲折した構造の第２のバンプ受けパッドを構成することにより、導電性バンプ２５１と導電性バンプ２５２との間隔や、第１のパターン線２０１と第２のパターン線２０２との間隔を狭めた場合でも、バンプ受けパッド同士の接触やバンプ受けパッドとパターン線との接触を避けることができ、配線パターンの更なる微細化が可能となる。また、曲折した構造の第１及び第２のバンプ受けパッドを用い、これら第１及び第２のバンプ受けパッドの上面のレジスト膜２３０を同一のほぼ円筒状に除去した場合であっても、第１の露出部２０５及び第２の露出部２０８の表面積は同一である。このため、導電性バンプ２５１及び導電性バンプ２５２の高さにばらつきが生じることはない。
【００４４】
特に、第１のバンプ受けパッドを構成する第１の部材２０３を第１のパターン線２０１の延在方向と４５°の角度をなす方向に延在させるとともに、第２の部材２０４を第１の部材２０３の延在方向と４５°の角度をなす方向に延在させること、及び、第２のバンプ受けパッドを構成する第３の部材２０６を第２のパターン線２０２の延在方向と４５°の角度をなす方向に延在させるとともに、第４の部材２０７を第１の部材２０６の延在方向と４５°の角度をなす方向に延在させることにより、第１のパターン線２０１及び第２のパターン線２０２の延在方向と、当該延在方向と垂直の方向の双方について、最適な微細化を図ることができる。
【００４５】
【発明の効果】
上述の如く、本発明によれば、曲折した構造のバンプ受けパッドを用いることにより、従来より導電性バンプ同士の間隔や導電性バンプとパターン線との間隔を狭めた場合でも、バンプ受けパッド同士の接触や導電性パッドとパターン線との接触を避けることができ、配線パターンの更なる微細化が可能となる。また、パターン線及びバンプ受けパッドの形成面にレジスト膜を形成するとともに、各バンプ受けパッドの上面のレジスト膜を同一のほぼ円筒状に除去した場合に、各バンプ受けパッドの露出面の面積を同一にすることができる。このため、バンプ受けパッド上に形成される導電性バンプの高さがばらつくことを防止することができる。
【図面の簡単な説明】
【図１】従来の従来の配線パターンの構造の一例を示す平面図である。
【図２】第１実施例における配線パターンの構造の一例を示す平面図である。
【図３】第１実施例における配線パターンの構造の一例を示す断面図である。
【図４】第１実施例における導電性バンプ形成後の配線パターンの構造の一例を示す断面図である。
【図５】第２実施例における配線パターンの構造の一例を示す平面図である。
【図６】第２実施例における配線パターンの構造の一例を示す断面図である。
【図７】第２実施例における導電性バンプ形成後の配線パターンの構造の一例を示す断面図である。
【符号の説明】
１０１、２０１　第１のパターン線
１０２、２０３　第１の部材
１０３、２０４　第２の部材
１０４、２０５　第１の露出面
１１１、２０２　第２のパターン線
１１２　第２のバンプ受けパッド
１１４、２０８　第２の露出面
１２１　第３のパターン線
１３０、２３０　レジスト膜
１３１、１３２、２３１、２３２　孔
１４０、２４０　基材
１５１、１５２、２５１、２５２　導電性バンプ
２０６　第３の部材
２０７　第４の部材[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a structure of a wiring pattern formed on a base material and a method for forming a conductive bump on the wiring pattern.
[0002]
[Prior art]
In recent years, as typified by mobile phones and notebook personal computers, there has been a demand for smaller and faster electronic devices. For this reason, high integration and high speed of the semiconductor device are required, and further, a printed wiring board on which the semiconductor device is mounted also needs a fine wiring pattern.
[0003]
FIG. 1 is a plan view showing an example of the structure of a conventional wiring pattern. The wiring pattern shown in the drawing has a structure including a first pattern line 501, a first bump receiving pad 502, a second pattern line 511, a second bump receiving pad 512, and a third pattern line 521.
[0004]
The second pattern line 511 extends linearly. The second bump receiving pad 512 is connected to the tip of the second pattern line 511, and extends in the same direction as the direction in which the second pattern line 511 extends.
[0005]
The first pattern line 501 extends in parallel with the second pattern line 511, and has an end bent toward the second pattern line 511, on an extension line in the extending direction of the second pattern line 511. Extend to. The first bump receiving pad 502 is connected to the tip of the first pattern line 501 and extends substantially on the same straight line as the second bump receiving pad 512.
[0006]
The third pattern line 521 extends perpendicularly to the extending direction of the first bump receiving pad 502 and the second bump receiving pad 512 on an extension of the extending direction of the first bump receiving pad 502.
[0007]
A conductive bump such as a solder bump is formed on the first bump receiving pad 502 and the second bump receiving pad 512 by the following procedure. First, a resist film 530 is formed on the formation surface of the first pattern line 501, the first bump receiving pad 502, the second pattern line 511, the second bump receiving pad 512, and the third pattern line 521.
[0008]
Next, the resist film 530 formed on the upper surface of the central portion of the first bump receiving pad 502 and the second bump receiving pad 512 is removed in a substantially cylindrical shape. As a result, a hole 531 is formed to expose a part 503 of the first bump receiving pad 502, and a hole 532 is formed to expose a part 513 of the second bump receiving pad 512. Hereinafter, a portion 503 of the first bump receiving pad 502 is referred to as a first exposed portion 503, and a portion 513 of the second bump receiving pad 512 is referred to as a second exposed portion 513. When removing the resist film 530, the radii of the holes 531 and 532 are made to be the same, and the first exposed portion 503 and the second exposed portion 513 are made to have the same surface area.
[0009]
Next, a conductive paste (not shown) such as a solder paste is applied on the upper surface of the resist film 530. This conductive paste flows into holes 531 and holes 532 formed in resist film 530. Then, a conductive bump (not shown) is formed on the first exposed portion 503 and the second exposed portion 513 by the conductive paste flowing into the holes 531 and 532. As described above, since the surface areas of the first exposed portion 503 and the second exposed portion 513 are the same, the height of the conductive bump formed thereon does not vary.
[0010]
[Problems to be solved by the invention]
However, as described above, in a structure in which the first bump receiving pad 502 and the second bump receiving pad 512 extend on the same straight line, the first bump receiving pad 502 and the second bump receiving pad 512 Are not in contact with each other, the distance between the conductive bumps formed on the first exposed portion 503 and the second exposed portion 513 increases. Further, since the extending direction of the first bump receiving pad 502 and the extending direction of the third pattern line 521 are perpendicular to each other, the first bump receiving pad 502 does not contact the third pattern line 521. With this structure, the distance between the conductive bump formed on the first exposed portion 503 and the third pattern line 521 is increased. This has hindered miniaturization of the wiring pattern.
[0011]
As a countermeasure against such a problem, it is conceivable to reduce the size of the first bump receiving pad 502 and thereby reduce the radius of the hole 531. However, in this method, the surface area of the first exposed portion 503 is smaller than the surface area of the second exposed portion 513. Therefore, the height of the conductive bumps formed on the first exposed portion 503 and the second exposed portion 513 varies.
[0012]
The present invention has been made to solve the above problems, and an object of the present invention is to provide a wiring pattern capable of preventing a variation in the height of conductive bumps while further miniaturizing the wiring pattern. It is to provide a structure and a method of forming a bump.
[0013]
[Means for Solving the Problems]
In order to achieve the above object, the structure of the wiring pattern according to the present invention includes a first and a second pattern line extending in parallel with the first pattern line, as described in claim 1. In a wiring pattern structure having a bump receiving pad to be connected, the bump receiving pad is connected to the first pattern line, and the first portion extends to bend toward the second pattern line. Connecting to the first portion, bending at a position on an extension of the second pattern line toward the second pattern line, and extending perpendicularly to the second pattern line. 2 is provided.
[0014]
According to a second aspect of the present invention, in the wiring pattern structure according to the first aspect, the extending direction of the first pattern line and the extending direction of the first portion are different from each other. An angle formed by the extending direction and an angle formed by the extending direction of the first portion and the extending direction of the second portion are 45 °.
[0015]
According to a third aspect of the present invention, in the wiring pattern structure according to the first or second aspect, a connection position between the first portion and the second portion is provided. A conductive bump formed on the substrate.
[0016]
According to a fourth aspect of the present invention, there is provided a wiring pattern having first and second pattern lines extending in parallel and a first pattern line connected to the first pattern line. In a wiring pattern structure having a bump receiving pad and a second bump receiving pad connected to the second pattern line, the first bump receiving pad is connected to an intermediate portion of the first pattern line. A first portion bent and extended to the side of the second pattern line, and a first portion connected to the first portion and having a center between the first pattern line and the second pattern line. A second portion bent at a position and extending in parallel with the first pattern line, wherein the second bump receiving pad is connected to an intermediate portion of the second pattern line, A third portion bent and extended to the side of the first pattern line; A fourth portion connected to the third pattern line, bent at a central position between the first pattern line and the second pattern line, and extending in parallel with the second pattern line. It is characterized by having.
[0017]
According to a fifth aspect of the present invention, in the wiring pattern structure according to the fourth aspect, the extending direction of the first pattern line and the first portion are different from each other. An angle between the extending direction of the first pattern portion and an extending direction of the first portion and the extending direction of the second portion is 45 °. An angle between the third portion and the extension direction of the third portion and an angle between the extension direction of the third portion and the extension direction of the fourth portion are 45 °.
[0018]
According to a sixth aspect of the present invention, in the wiring pattern structure according to the fourth or fifth aspect, a connection position between the first portion and the second portion is provided. And a second conductive bump formed at a connection position between the third portion and the fourth portion.
[0019]
According to a seventh aspect of the present invention, there is provided a method of forming a bump, comprising the steps of forming first and second pattern lines extending in parallel, and connecting to the first pattern line. A first portion bent and extended to the side of the second pattern line; and a second portion connected to the first portion and extending at a position on an extension of the second pattern line. Forming a bump receiving pad having a second portion bent to the side and extending perpendicular to the second pattern line; and forming the bump receiving pad with the first and second pattern lines and the bump receiving pad. A step of forming a resist film on the formation surface, and a step of forming a resist film on an upper surface at a connection position between the first portion and the second portion with respect to the connection position between the first portion and the second portion. Removing the first portion and the second portion in a cylindrical shape; Characterized in that it comprises a partial connection position and a procedure for forming a conductive bump.
[0020]
According to a bump forming method of the present invention, as set forth in claim 8, in the bump forming method of claim 7, the extending direction of the first pattern line and the direction of the first portion are different. An angle formed by the extending direction and an angle formed by the extending direction of the first portion and the extending direction of the second portion are 45 °.
[0021]
Further, according to the bump forming method of the present invention, a step of forming the first and second pattern lines extending in parallel, and an intermediate portion of the first pattern line are provided. And a first portion extending to bend to the side of the second pattern line, and a first portion connected to the first portion and between the first pattern line and the second pattern line. Forming a first bump receiving pad including a second portion bent at a center position and extending in parallel with the first pattern line; A third portion connected and bent to the side of the first pattern line, and a center between the first pattern line and the second pattern line connected to the third portion; And a fourth portion extending in parallel with the second pattern line at a position Forming a resist film on a surface on which the first and second pattern lines and the first and second bump receiving pads are formed; and forming the first portion and the second Removing the resist film on the upper surface at the connection position of the portion in a substantially cylindrical shape around the connection position of the first portion and the second portion; and removing the resist film on the third portion and the fourth portion. Removing the resist film on the upper surface at the connection position into a substantially cylindrical shape around the connection position between the third portion and the fourth portion, and connecting the exposed first portion and the second portion; A step of forming a conductive bump at a position; and a step of forming a conductive bump at a connection position between the exposed third portion and the fourth portion.
[0022]
According to a bump forming method of the present invention, as set forth in claim 10, in the bump forming method of claim 9, the extending direction of the first pattern line and the first portion are different from each other. An angle between the extending direction of the first pattern portion and an extending direction of the first portion and the extending direction of the second portion is 45 °. An angle between the third portion and the extension direction of the third portion and an angle between the extension direction of the third portion and the extension direction of the fourth portion are 45 °.
[0023]
According to the present invention, by using a bump receiving pad having a bent structure, even if the distance between the conductive bumps or the distance between the conductive bumps and the pattern lines is narrower than before, the contact between the bump receiving pads and the conductive property can be improved. The contact between the conductive pad and the pattern line can be avoided, and the wiring pattern can be further miniaturized. When a resist film is formed on the surface on which the pattern lines and the bump receiving pads are formed and the resist film on the upper surface of each bump receiving pad is removed in the same substantially cylindrical shape, the area of the exposed surface of each bump receiving pad is reduced Can be identical. Therefore, it is possible to prevent the height of the conductive bump formed on the bump receiving pad from varying.
[0024]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, first and second examples will be described as embodiments of the present invention with reference to the drawings.
[0025]
First, a first embodiment will be described. FIG. 2 is a plan view showing an example of the structure of the wiring pattern in the first embodiment. FIG. 3 is a sectional view taken along line AB in FIG. The wiring patterns shown in FIGS. 2 and 3 include a first pattern line 101, a first member (first pad portion) 102, and a second member (second pad portion) 103. , A second pattern line 111, a second bump line 112, and a third pattern line 121.
[0026]
A first bump receiving pad, a second pattern line 111, a second bump receiving pad 112, and a third pattern line constituted by the first pattern line 101, the first member 102, and the second member 103. 121 is formed on the upper surface of the base material 140. As a forming method, a subtractive method, a semi-additive method, a full-additive method, or the like is employed. The subtractive method is a method in which a photosensitive etching resist film or a metal resist film is formed on a base material, and a conductor other than a wiring pattern is removed by an etching method. In the semi-additive method, after applying electroless copper plating on the base material, the part where the wiring pattern is formed is exposed by plating resist, the exposed electroless copper plating film is used as an electrode, and only the part where the wiring pattern is formed This is a method of growing electrolytic plating. The full additive method is a method in which a plating resist is exposed and developed to open only a portion where a wiring pattern is to be formed, and grow electroless plating only in the opened portion.
[0027]
The second pattern line 111 extends linearly. The second bump receiving pad 112 is connected to the tip of the second pattern line 111 and extends in the same direction as the direction in which the second pattern line 111 extends. The second bump receiving pad 112 has, for example, a length of 175 μm and a width of 50 ± 10 μm in the longitudinal direction.
[0028]
The first pattern line 101 extends in parallel with the second pattern line 111. The interval between the first pattern line 101 and the second pattern line 102 is, for example, 55 μm. The first member 102 constituting the first bump receiving pad is connected to the tip of the first pattern line 101, bends toward the second pattern line 111, and extends in the direction in which the first pattern line 101 extends. And a direction extending at an angle of 45 °. The second member 103 constituting the first bump receiving pad is connected to the tip of the first member 102, bends toward the second pattern line 111, and extends in the direction in which the first member 102 extends. Extend in a direction at an angle of °. Therefore, the second member 102 extends perpendicularly to the direction in which the second pattern line 111 extends. Each of the first member 102 and the second member 103 has a width of, for example, 50 ± 10 μm like the second bump receiving pad 112. The distance between the second member 103 and the third pattern line 121 is, for example, 30 μm.
[0029]
On the base material 140, a first bump receiving pad, a second pattern line 111, a second bump receiving pad 112, a first bump receiving pad constituted by the first pattern line 101, the first member 102, and the second member 103. A resist film 130 is formed on the surface on which the third pattern lines 121 are formed.
[0030]
After that, the resist film 130 is exposed and developed so that the resist film 130 on the upper surface of the connection position between the first member 102 and the second member 103 changes the connection position between the first member 102 and the second member 103. It is almost cylindrically removed as the center. As a result, a hole 131 is formed, and a part 104 of the first bump receiving pad is exposed.
Similarly, by exposing and developing the resist film 130, the resist film 130 on the upper surface of the second bump receiving pad 112 is substantially cylindrically removed. As a result, a hole 132 is formed, and a part 114 of the second bump receiving pad is exposed. Hereinafter, a part 104 of the first bump receiving pad is referred to as a first exposed part 104, and a part 114 of the second bump receiving pad 112 is referred to as a second exposed part 114. When removing the resist film 130, the holes 131 and 132 have the same radius. The radius of the holes 131 and 132 is, for example, 105 μm at the bottom and 115 ± 12 μm at the top, and the distance between the center of the hole 131 and the center of the hole 132 is 190 μm. At this time, the first exposed portion 104 and the second exposed portion 114 have the same surface area.
[0031]
The tip of the first bump receiving pad and the tip of the second bump receiving pad 112 are not exposed by pressing the tip with the resist film 130 so that the first bump receiving pad and the second bump receiving pad 112 are not exposed. In order to prevent the bump receiving pad 112 from jumping upward.
[0032]
Next, a conductive paste (not shown) such as a solder paste is applied to the upper surface of the resist film 130. This conductive paste flows into holes 131 and 132 formed in resist film 130. Thereafter, by peeling the resist film 130, the conductive bump 151 is formed on the first exposed portion 104 by the conductive paste flowing into the holes 131 and 132, as shown in FIG. A conductive bump 152 is formed on exposed portion 114. Alternatively, a conductive bump 151 is formed on the first exposed portion 104 by mounting a conductive ball on the first exposed portion 104 and the second exposed portion, and then reflowing the conductive ball. The conductive bump 152 is formed on the second exposed portion 114.
[0033]
As described above, the first member 102 and the second member 103 constitute the first bump receiving pad having a bent structure, so that the distance between the conductive bumps 151 and the conductive bumps 151 and the distance between the conductive bumps 151 can be reduced. Even when the interval between the third pattern lines 121 is reduced, contact between the bump receiving pads and contact between the bump receiving pads and the pattern lines can be avoided, and the wiring pattern can be further miniaturized. Further, even when the first bump receiving pad having a bent structure is used and the resist film 130 on the upper surfaces of the first and second bump receiving pads is removed in the same substantially cylindrical shape, the first exposed portion is formed. The surface areas of 104 and the second exposed portion 114 are the same. Therefore, there is no variation in the height of the conductive bumps 151 and 152.
[0034]
In particular, the first member 102 forming the first bump receiving pad is extended in a direction at an angle of 45 ° to the extending direction of the first pattern line 101, and the second member 103 is By extending the member at an angle of 45 ° with the direction in which the member 102 extends, optimum miniaturization can be achieved in both the direction in which the first pattern line 101 extends and the direction perpendicular to the direction in which the first pattern line 101 extends. Can be planned.
[0035]
Next, a second embodiment will be described. FIG. 5 is a plan view showing an example of the structure of the wiring pattern in the second embodiment. FIG. 6 is a sectional view taken along line AB in FIG. The wiring pattern shown in FIGS. 5 and 6 includes a first pattern line 201, a first member (first pad portion) 203, and a second member (second pad portion) 204. Having a second bump receiving pad composed of a second bump receiving pad, a second pattern line 202, a third member (third pad portion) 206, and a fourth member (fourth pad portion) 207 It is.
[0036]
The first pattern line 201, the first bump receiving pad constituted by the first member 203 and the second member 204, the second pattern line 202, the third member 206 and the second member 207 are constituted. The second bump receiving pad to be formed is formed on the upper surface of the base 240. As in the first embodiment, a subtractive method, a semi-additive method, a full-additive method and the like are employed as the forming method.
[0037]
The first pattern line 201 and the second pattern line 202 extend in a straight line in parallel. The first member 203 constituting the first bump receiving pad is connected to an intermediate portion of the first pattern line 201, bends toward the second pattern line 202, and extends the first pattern line 201. Extend in a direction at an angle of 45 ° with the direction. The second member 204 constituting the first bump receiving pad is connected to the tip of the first member 203, and is bent at a central position between the first pattern line 201 and the second pattern line 202. , Extend in a direction at an angle of 45 ° with the direction in which the first member 203 extends.
Therefore, the second member 204 extends in parallel to the extending direction of the first pattern line 201.
[0038]
Similarly, the third member 206 constituting the second bump receiving pad is connected to the middle part of the second pattern line 202, bends toward the first pattern line 201, and Extend in a direction that forms an angle of 45 ° with the extending direction of. The fourth member 207 constituting the second bump receiving pad is connected to the tip of the third member 206, and is bent at a central position between the first pattern line 201 and the second pattern line 202. , Extend in a direction at an angle of 45 ° with the extending direction of the third member 206. Therefore, the fourth member 207 extends in parallel with the extending direction of the second pattern line 202.
[0039]
The first member 203, the second member 204, the third member 206, and the fourth member 207 have a width of, for example, 50 ± 10 μm.
[0040]
A first bump receiving pad, a second pattern line 202, a third member 206, and a second bump line constituted by a first pattern line 201, a first member 203 and a second member 204 on a base 240. On the surface on which the second bump receiving pad constituted by the member 207 is formed, a resist film 230 is formed.
[0041]
Thereafter, by exposing and developing the resist film 230, the resist film 230 on the upper surface of the connection position between the first member 203 and the second member 204 is connected to the connection position between the first member 203 and the second member 204. It is almost cylindrically removed as the center. As a result, a hole 231 is formed, and a part 205 of the first bump receiving pad is exposed.
Similarly, by exposing and developing the resist film 230, the resist film 230 on the upper surface of the second bump receiving pad is removed in a substantially cylindrical shape. As a result, a hole 232 is formed, and a part 208 of the second bump receiving pad is exposed. Hereinafter, a portion 205 of the first bump receiving pad is referred to as a first exposed portion 205, and a portion 208 of the second bump receiving pad is referred to as a second exposed portion 208. When the resist film 230 is removed, the radius of the hole 231 and the radius of the hole 232 are made the same as in the first embodiment. The radius of the hole 231 and the hole 232 is, for example, 105 μm at the lower portion and 115 ± 12 μm at the upper portion, and the distance between the center of the hole 231 and the center of the hole 232 is 190 μm. At this time, the first exposed portion 205 and the second exposed portion 208 have the same surface area.
[0042]
Next, a conductive paste (not shown) such as a solder paste is applied on the upper surface of the resist film 230. This conductive paste flows into the holes 231 and 232 formed in the resist film 230. After that, by peeling the resist film 230, a conductive bump 251 is formed on the first exposed portion 205 by the conductive paste flowing into the holes 231 and 232, as shown in FIG. A conductive bump 252 is formed on exposed portion 208.
[0043]
As described above, the first member 203 and the second member 204 constitute the first bump receiving pad having a bent structure, and the third member 206 and the fourth member 207 constitute the second bump receiving pad. Even if the distance between the conductive bump 251 and the conductive bump 252 or the distance between the first pattern line 201 and the second pattern line 202 is reduced, the bump receiving pads Contact and contact between the bump receiving pad and the pattern line can be avoided, and the wiring pattern can be further miniaturized. Further, even if the first and second bump receiving pads having a bent structure are used and the resist film 230 on the upper surfaces of the first and second bump receiving pads is removed in the same substantially cylindrical shape, The surface areas of the first exposed portion 205 and the second exposed portion 208 are the same. Therefore, the height of the conductive bumps 251 and the conductive bumps 252 does not vary.
[0044]
In particular, the first member 203 constituting the first bump receiving pad is extended in a direction at an angle of 45 ° to the extending direction of the first pattern line 201, and the second member 204 is extended to the first member. Extending in a direction at an angle of 45 ° to the direction in which the member 203 extends, and setting the third member 206 constituting the second bump receiving pad to 45 ° in the direction in which the second pattern line 202 extends. , And the fourth member 207 extends in a direction at an angle of 45 ° with the extending direction of the first member 206, so that the first pattern line 201 and the second In both the extending direction of the pattern line 202 and the direction perpendicular to the extending direction, optimal miniaturization can be achieved.
[0045]
【The invention's effect】
As described above, according to the present invention, by using a bump receiving pad having a bent structure, even if the distance between the conductive bumps or the distance between the conductive bumps and the pattern lines is narrower than in the past, the bump receiving pads can be connected to each other. Contact and the contact between the conductive pad and the pattern line can be avoided, and the wiring pattern can be further miniaturized. When a resist film is formed on the surface on which the pattern lines and the bump receiving pads are formed, and the resist film on the upper surface of each bump receiving pad is removed in the same substantially cylindrical shape, the area of the exposed surface of each bump receiving pad is reduced. Can be identical. Therefore, it is possible to prevent the height of the conductive bump formed on the bump receiving pad from varying.
[Brief description of the drawings]
FIG. 1 is a plan view showing an example of the structure of a conventional wiring pattern.
FIG. 2 is a plan view illustrating an example of a wiring pattern structure according to the first embodiment.
FIG. 3 is a cross-sectional view illustrating an example of a wiring pattern structure according to the first embodiment.
FIG. 4 is a cross-sectional view illustrating an example of a structure of a wiring pattern after a conductive bump is formed in the first embodiment.
FIG. 5 is a plan view illustrating an example of a wiring pattern structure according to a second embodiment.
FIG. 6 is a cross-sectional view illustrating an example of a structure of a wiring pattern according to a second embodiment.
FIG. 7 is a cross-sectional view illustrating an example of a structure of a wiring pattern after a conductive bump is formed in a second embodiment.
[Explanation of symbols]
101, 201 first pattern line
102, 203 First member
103, 204 Second member
104, 205 First exposed surface
111, 202 Second pattern line
112 second bump receiving pad
114, 208 Second exposed surface
121 third pattern line
130, 230 resist film
131, 132, 231, 232 holes
140, 240 substrate
151, 152, 251, 252 conductive bump
206 Third member
207 Fourth member

Claims (10)

平行して延在する第１及び第２のパターン線と、前記第１のパターン線に接続されるバンプ受けパッドとを有する配線パターンの構造において、
前記バンプ受けパッドは、
前記第１のパターン線に接続し、前記第２のパターン線の側へ曲折して延在する第１の部分と、
前記第１の部分に接続し、前記第２のパターン線の延長線上の位置において該第２のパターン線の側へ曲折し、該第２のパターン線に対して垂直に延在する第２の部分と、
を備えることを特徴とする配線パターンの構造。In a structure of a wiring pattern having first and second pattern lines extending in parallel and a bump receiving pad connected to the first pattern line,
The bump receiving pad,
A first portion connected to the first pattern line and bent to extend toward the second pattern line;
A second portion connected to the first portion, bent at a position on an extension of the second pattern line toward the second pattern line, and extends perpendicularly to the second pattern line; Part and
A wiring pattern structure comprising: 請求項１に記載の配線パターンの構造において、
前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であることを特徴とする配線パターンの構造。The structure of the wiring pattern according to claim 1,
The angle between the extending direction of the first pattern line and the extending direction of the first portion, and the angle between the extending direction of the first portion and the extending direction of the second portion. Is 45 °. 請求項１又は２に記載の配線パターンの構造において、
前記第１の部分と前記第２の部分との接続位置に形成される導電性バンプを備えることを特徴とする配線パターンの構造。The structure of the wiring pattern according to claim 1, wherein
A structure of a wiring pattern, comprising: a conductive bump formed at a connection position between the first portion and the second portion. 平行して延在する第１及び第２のパターン線と、前記第１のパターン線に接続される第１のバンプ受けパッドと、前記第２のパターン線に接続される第２のバンプ受けパッドとを有する配線パターンの構造において、
前記第１のバンプ受けパッドは、
前記第１のパターン線の中途部に接続し、前記第２のパターン線の側へ曲折して延在する第１の部分と、
前記第１の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第１のパターン線に対して平行に延在する第２の部分と、
を備え、
前記第２のバンプ受けパッドは、
前記第２のパターン線の中途部に接続し、前記第１のパターン線の側へ曲折して延在する第３の部分と、
前記第３の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第２のパターン線に対して平行に延在する第４の部分と、
を備えることを特徴とする配線パターンの構造。First and second pattern lines extending in parallel, a first bump receiving pad connected to the first pattern line, and a second bump receiving pad connected to the second pattern line In the structure of the wiring pattern having
The first bump receiving pad includes:
A first portion connected to an intermediate portion of the first pattern line and bent to extend toward the second pattern line;
A second portion connected to the first portion, bent at a central position between the first pattern line and the second pattern line, and extending in parallel to the first pattern line; When,
With
The second bump receiving pad includes:
A third portion connected to an intermediate portion of the second pattern line and bent to extend toward the first pattern line;
A fourth portion connected to the third portion, bent at a central position between the first pattern line and the second pattern line, and extending in parallel to the second pattern line; When,
A wiring pattern structure comprising: 請求項４に記載の配線パターンの構造において、
前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であり、前記第２のパターン線の延在方向と前記第３の部分の延在方向とのなす角度と、前記第３の部分の延在方向と前記第４の部分の延在方向とのなす角度とが４５°であることを特徴とする配線パターンの構造。The wiring pattern structure according to claim 4,
The angle between the extending direction of the first pattern line and the extending direction of the first portion, and the angle between the extending direction of the first portion and the extending direction of the second portion. Is 45 °, an angle between the extending direction of the second pattern line and the extending direction of the third portion, the extending direction of the third portion, and the extension of the fourth portion. A structure of a wiring pattern, wherein an angle between the wiring pattern and the direction is 45 °. 請求項４又は５に記載の配線パターンの構造において、
前記第１の部分と前記第２の部分との接続位置に形成される第１の導電性バンプと、
前記第３の部分と前記第４の部分との接続位置に形成される第２の導電性バンプと、
を備えることを特徴とする配線パターンの構造。The structure of the wiring pattern according to claim 4 or 5,
A first conductive bump formed at a connection position between the first portion and the second portion;
A second conductive bump formed at a connection position between the third portion and the fourth portion;
A wiring pattern structure comprising: 平行して延在する第１及び第２のパターン線を形成する手順と、
前記第１のパターン線に接続され、前記第２のパターン線の側へ曲折して延在する第１の部分と、前記第１の部分に接続し、前記第２のパターン線の延長線上の位置において該第２のパターン線の側へ曲折し、該第２のパターン線に対して垂直に延在する第２の部分とを備えるバンプ受けパッドを形成する手順と、
前記第１及び第２のパターン線と前記バンプ受けパッドの形成面にレジスト膜を形成する手順と、
前記第１の部分と前記第２の部分の接続位置の上面のレジスト膜を、前記第１の部分と前記第２の部分の接続位置を中心としてほぼ円筒状に除去する手順と、露出した前記第１の部分と前記第２の部分の接続位置に導電性バンプを形成する手順と、
を備えることを特徴とするバンプの形成方法。Forming first and second pattern lines extending in parallel;
A first portion connected to the first pattern line and bent to the side of the second pattern line, and a first portion connected to the first portion and extending on an extension of the second pattern line; Forming a bump receiving pad having a second portion bent at a position to the side of the second pattern line and extending perpendicular to the second pattern line;
Forming a resist film on a surface on which the first and second pattern lines and the bump receiving pad are formed;
Removing the resist film on the upper surface at the connection position between the first portion and the second portion in a substantially cylindrical shape around the connection position between the first portion and the second portion; Forming a conductive bump at a connection position between the first part and the second part;
A method for forming a bump, comprising: 請求項７に記載のバンプの形成方法において、
前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であることを特徴とするバンプの形成方法。The method for forming a bump according to claim 7,
The angle between the extending direction of the first pattern line and the extending direction of the first portion, and the angle between the extending direction of the first portion and the extending direction of the second portion. Is 45 °. 平行して延在する第１及び第２のパターン線を形成する手順と、
前記第１のパターン線の中途部に接続し、前記第２のパターン線の側へ曲折して延在する第１の部分と、前記第１の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第１のパターン線に対して平行に延在する第２の部分とを備える第１のバンプ受けパッドを形成する手順と、
前記第２のパターン線の中途部に接続し、前記第１のパターン線の側へ曲折して延在する第３の部分と、前記第３の部分に接続し、前記第１のパターン線と第２のパターン線との間の中央の位置において曲折し、該第２のパターン線に対して平行に延在する第４の部分とを備える第２のバンプ受けパッドを形成する手順と、
前記第１及び第２のパターン線と前記第１及び第２のバンプ受けパッドの形成面にレジスト膜を形成する手順と、
前記第１の部分と前記第２の部分の接続位置の上面のレジスト膜を、前記第１の部分と前記第２の部分の接続位置を中心としてほぼ円筒状に除去する手順と、前記第３の部分と前記第４の部分の接続位置の上面のレジスト膜を、前記第３の部分と前記第４の部分の接続位置を中心としてほぼ円筒状に除去する手順と、露出した前記第１の部分と前記第２の部分の接続位置に導電性バンプを形成する手順と、
露出した前記第３の部分と前記第４の部分の接続位置に導電性バンプを形成する手順と、
を備えることを特徴とするバンプの形成方法。Forming first and second pattern lines extending in parallel;
A first portion connected to an intermediate portion of the first pattern line and bent to extend toward the second pattern line; and a first portion connected to the first portion and connected to the first pattern line. Forming a first bump receiving pad having a second portion bent at a central position between the second pattern line and the second portion extending in parallel with the first pattern line;
A third portion connected to an intermediate portion of the second pattern line and bent to extend toward the first pattern line; and a third portion connected to the third portion and connected to the first pattern line. Forming a second bump receiving pad including a fourth portion bent at a central position between the second pattern line and a fourth portion extending in parallel with the second pattern line;
Forming a resist film on a surface on which the first and second pattern lines and the first and second bump receiving pads are formed;
Removing the resist film on the upper surface of the connection position between the first portion and the second portion in a substantially cylindrical shape around the connection position between the first portion and the second portion; Removing the resist film on the upper surface at the connection position between the third portion and the fourth portion in a substantially cylindrical shape around the connection position between the third portion and the fourth portion; Forming a conductive bump at a connection position between the portion and the second portion;
Forming a conductive bump at a connection position between the exposed third portion and the fourth portion;
A method for forming a bump, comprising: 請求項９に記載のバンプの形成方法において、
前記第１のパターン線の延在方向と前記第１の部分の延在方向とのなす角度と、前記第１の部分の延在方向と前記第２の部分の延在方向とのなす角度とが４５°であり、前記第２のパターン線の延在方向と前記第３の部分の延在方向とのなす角度と、前記第３の部分の延在方向と前記第４の部分の延在方向とのなす角度とが４５°であることを特徴とするバンプの形成方法。The method for forming a bump according to claim 9,
The angle between the extending direction of the first pattern line and the extending direction of the first portion, and the angle between the extending direction of the first portion and the extending direction of the second portion. Is 45 °, an angle between the extending direction of the second pattern line and the extending direction of the third portion, the extending direction of the third portion, and the extension of the fourth portion. A method for forming a bump, wherein an angle between the direction and the direction is 45 °.
JP2002198891A 2002-07-08 2002-07-08 Wiring-pattern structure, and bump forming method Pending JP2004040056A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002198891A JP2004040056A (en) 2002-07-08 2002-07-08 Wiring-pattern structure, and bump forming method
AU2003281445A AU2003281445A1 (en) 2002-07-08 2003-07-03 Wiring pattern structure and method for forming bump
PCT/JP2003/008492 WO2004006637A1 (en) 2002-07-08 2003-07-03 Wiring pattern structure and method for forming bump
TW092118597A TW200406901A (en) 2002-07-08 2003-07-08 Layout pattern structure and forming method of bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002198891A JP2004040056A (en) 2002-07-08 2002-07-08 Wiring-pattern structure, and bump forming method

Publications (1)

Publication Number Publication Date
JP2004040056A true JP2004040056A (en) 2004-02-05

Family

ID=30112437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002198891A Pending JP2004040056A (en) 2002-07-08 2002-07-08 Wiring-pattern structure, and bump forming method

Country Status (4)

Country Link
JP (1) JP2004040056A (en)
AU (1) AU2003281445A1 (en)
TW (1) TW200406901A (en)
WO (1) WO2004006637A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008227050A (en) * 2007-03-12 2008-09-25 Fujitsu Ltd Wiring substrate and electronic component mounting structure
US8222749B2 (en) 2007-10-22 2012-07-17 Shinko Electric Industries Co., Ltd. Wiring substrate and semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4305427B2 (en) * 2005-08-02 2009-07-29 東京エレクトロン株式会社 Film forming method, film forming apparatus, and storage medium

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145361U (en) * 1986-03-06 1987-09-12
JPH1126919A (en) * 1997-06-30 1999-01-29 Fuji Photo Film Co Ltd Printed wiring board
JPH11191672A (en) * 1997-12-25 1999-07-13 Victor Co Of Japan Ltd Printed wiring board
JP2000031630A (en) * 1998-07-15 2000-01-28 Kokusai Electric Co Ltd Connecting structure of semiconductor integrated circuit element to wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008227050A (en) * 2007-03-12 2008-09-25 Fujitsu Ltd Wiring substrate and electronic component mounting structure
US8125789B2 (en) 2007-03-12 2012-02-28 Fujitsu Semiconductor Limited Wiring substrate and electronic device
US8222749B2 (en) 2007-10-22 2012-07-17 Shinko Electric Industries Co., Ltd. Wiring substrate and semiconductor device

Also Published As

Publication number Publication date
TW200406901A (en) 2004-05-01
AU2003281445A1 (en) 2004-01-23
WO2004006637A1 (en) 2004-01-15

Similar Documents

Publication Publication Date Title
US7323405B2 (en) Fine pitch low cost flip chip substrate
EP1827067B1 (en) Method of forming a circuit substrate
US9111818B2 (en) Packaging substrate
US20060219567A1 (en) Fabrication method of conductive bump structures of circuit board
US20030068877A1 (en) Circuit boards containing vias and methods for producing same
US7419897B2 (en) Method of fabricating circuit board having different electrical connection structures
US20060049516A1 (en) Nickel/gold pad structure of semiconductor package and fabrication method thereof
US20080265411A1 (en) Structure of packaging substrate and method for making the same
KR20080072542A (en) Semiconductor package substrate
KR20110064471A (en) Package substrate and fabricating method of the same
US20050245059A1 (en) Method for making an interconnect pad
JP2001156203A (en) Printed wiring board for mounting semiconductor chip
EP1850381A2 (en) Mounting substrate
JP2014504034A (en) Electronic device tape with enhanced lead cracks
JP2004040056A (en) Wiring-pattern structure, and bump forming method
US20030129541A1 (en) Redistribution process
JP3800298B2 (en) Bump forming method and semiconductor device manufacturing method
JP2004079666A (en) Printed circuit board, method for manufacturing printed circuit board, and method for mounting electronic component
JP2007109884A (en) Mounting substrate and semiconductor device
US7335591B2 (en) Method for forming three-dimensional structures on a substrate
JP2003258147A (en) Wiring board and its manufacturing method, and electronic component, and electronic apparatus
KR100986294B1 (en) Manufacturing method for printed circuit board
JP2004273884A (en) Method of manufacturing wiring board and wiring board
KR100608360B1 (en) method of forming a solder structure in a semiconductor device
KR101060791B1 (en) Solder bump manufacturing method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050512

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20071009

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20080318