JP2003282944A - Visible light emitting device - Google Patents

Visible light emitting device

Info

Publication number
JP2003282944A
JP2003282944A JP2002087054A JP2002087054A JP2003282944A JP 2003282944 A JP2003282944 A JP 2003282944A JP 2002087054 A JP2002087054 A JP 2002087054A JP 2002087054 A JP2002087054 A JP 2002087054A JP 2003282944 A JP2003282944 A JP 2003282944A
Authority
JP
Japan
Prior art keywords
light emitting
visible light
emitting device
layer
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002087054A
Other languages
Japanese (ja)
Inventor
Junya Ishizaki
順也 石崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to JP2002087054A priority Critical patent/JP2003282944A/en
Priority to PCT/JP2003/003703 priority patent/WO2003081685A1/en
Publication of JP2003282944A publication Critical patent/JP2003282944A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H01L33/501—Wavelength conversion elements characterised by the materials, e.g. binder
    • H01L33/502—Wavelength conversion materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H01L33/507—Wavelength conversion elements the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body

Abstract

<P>PROBLEM TO BE SOLVED: To provide a visible light emitting device that uses a semiconductor light emitting element as an ultraviolet light source to generate highly bright good-quality white light. <P>SOLUTION: The visible light emitting device 1 has a semiconductor ultraviolet light emitting element 2 with a luminous layer part comprised of Mg<SB>a</SB>Zn<SB>1-a</SB>O (where 0≤a≤1) or Al<SB>b</SB>In<SB>c</SB>Ga<SB>1-b-c</SB>N (where 0≤b≤1, 0≤c≤1, 0≤b+c≤1), and a visible light emitting film 10 that is comprised of a mixed sputter film of SiO<SB>2</SB>and Si and emits visible light while irradiated by ultraviolet light from the semiconductor ultraviolet light emitting element 2. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、半導体発光素子を
用いた可視光発光装置に関する。TECHNICAL FIELD The present invention relates to a visible light emitting device using a semiconductor light emitting element.

【０００２】[0002]

【従来の技術】一般照明用等に使用される白色光発光装
置としては、従来、蛍光ランプが使用されてきたが、可
視光発光装置としては、従来、蛍光ランプが一般的に広
く使用されている。しかし蛍光ランプには以下のような
欠点がある。 ・陰極放電を利用して紫外線を発生させるため、電極の
蒸発消耗により比較的早期に寿命がつきやすい。 ・高電圧を必要とする上、消費電力も大きい。 ・安定器やスタータなどの余分な周辺回路が必要であ
る。 ・ランプ廃棄に伴い、紫外線放射源としてガラス管内に
封入された水銀が放出されるため、環境保護上の観点に
おいても今後は敬遠されてゆくことが予想される。2. Description of the Related Art Conventionally, a fluorescent lamp has been used as a white light emitting device used for general lighting, but a fluorescent lamp has been generally widely used as a visible light emitting device. There is. However, the fluorescent lamp has the following drawbacks.・ Because ultraviolet rays are generated by using cathode discharge, it is easy to reach a relatively short life due to evaporation and consumption of electrodes.・ High voltage is required and power consumption is high.・ Excessive peripheral circuits such as ballast and starter are required.・ When the lamp is discarded, mercury enclosed in the glass tube is emitted as an ultraviolet radiation source, and it is expected that it will be shunned in the future from the viewpoint of environmental protection.

【０００３】そこで、陰極放電の代わりに、ＡｌＧａＮ
などのワイドギャップ形化合物半導体で構成された半導
体発光素子を紫外線源として用いる発光装置が、例えば
特開平１１−１６８２６２号公報に提案されている。蛍
光体材料としては公知のものが使用され、例えばハロリ
ン酸カルシウム（３Ｃａ３（ＰＯ４）２・ＣａＦＣｌ／
Ｓｂ，Ｍｎ）を採用する場合は、ＦとＣｌ，ＳｂとＭｎ
のそれぞれの量を調整することにより、種々の色温度の
白色光を得ることができる。他方、ワイドギャップ形化
合物半導体を用いた光輝度の青色発光素子も実現してお
り、これを、周知の赤色ないし緑色の高輝度発光素子と
組み合わせることにより白色光を合成する方式の発光装
置も検討されている。Therefore, instead of the cathode discharge, AlGaN is used.
A light emitting device using a semiconductor light emitting element composed of a wide gap type compound semiconductor as an ultraviolet ray source is proposed in, for example, Japanese Patent Application Laid-Open No. 11-168262. Known phosphor materials are used, for example, calcium halophosphate (3Ca 3 (PO 4 ) 2 · CaFCl /
(Sb, Mn), F and Cl, Sb and Mn
It is possible to obtain white light with various color temperatures by adjusting the respective amounts. On the other hand, we have also realized a light emitting blue light emitting device using a wide gap type compound semiconductor, and we are also considering a light emitting device that combines white light by combining this with a well-known red or green high brightness light emitting device. Has been done.

【０００４】[0004]

【発明が解決しようとする課題】半導体発光素子を紫外
線源として用いる発光装置では、発光素子から発せられ
る紫外線の波長帯が、陰極放電等で得られる紫外線より
も狭く、また、中心波長も一定の範囲でばらつきやす
い。従って、周知の蛍光ランプ用の蛍光体を使用した場
合、半導体発光素子からの紫外線の波長がばらつくと、
３原色の発光バランスが崩れ、良好な白色光が得られな
くなってしまう問題がある。他方、赤、緑及び青の発光
素子を組み合わせて白色光を得る方法は、３種類の素子
が必要となるため、周辺回路も含めてコストアップを招
きやすい問題がある。In a light emitting device using a semiconductor light emitting element as an ultraviolet ray source, the wavelength band of ultraviolet rays emitted from the light emitting element is narrower than that obtained by cathode discharge and the central wavelength is constant. Easy to vary in range. Therefore, when the well-known fluorescent lamp phosphor is used, if the wavelength of the ultraviolet rays from the semiconductor light emitting element varies,
There is a problem that the emission balance of the three primary colors is lost and good white light cannot be obtained. On the other hand, the method of obtaining white light by combining the red, green, and blue light emitting elements requires three types of elements, and thus has a problem that the cost including peripheral circuits is likely to increase.

【０００５】本発明の課題は、半導体発光素子を紫外線
源として用いつつ、良好な白色光を高輝度にて得ること
ができる可視光発光装置を提供することにある。An object of the present invention is to provide a visible light emitting device which can obtain good white light with high brightness while using a semiconductor light emitting element as an ultraviolet ray source.

【０００６】[0006]

【課題を解決するための手段及び作用・効果】上記の課
題を解決するために、本発明の可視光発光装置の第一
は、ＭｇａＺｎ １−ａＯ（ただし、０≦ａ≦１）又はＡ
ｌｂＩｎｃＧａ１−ｂ−ｃＮ（ただし、０≦ｂ≦１、０
≦ｃ≦１、０≦ｂ＋ｃ≦１）からなる発光層部を有した
半導体紫外線発光素子と、ＳｉＯ２とＳｉとの混合スパ
ッタ膜からなり、半導体紫外線発光素子からの紫外線照
射を受けて可視光を発光する可視光発光膜と、を有する
ことを特徴とする。[Means and Actions / Effects for Solving Problems] Above section
In order to solve the problem, the first of the visible light emitting device of the present invention
Is MgaZn 1-aO (however, 0 ≦ a ≦ 1) or A
lbIncGa1-bcN (however, 0 ≦ b ≦ 1, 0
≦ c ≦ 1, 0 ≦ b + c ≦ 1)
Semiconductor ultraviolet light emitting device and SiOTwoAnd Si mixed spa
UV light from the semiconductor UV light emitting device.
And a visible light emitting film that emits visible light when exposed to light.
It is characterized by

【０００７】ＭｇａＺｎ１−ａＯとＡｌｂＩｎｃＧａ
１−ｂ−ｃＮとはいずれもワイドギャップ型化合物半導
体として知られ、例えば前記発光層部を、各々上記化合
物半導体からなるｎ型クラッド層、活性層及びｐ型クラ
ッド層が、この順序にて積層されたダブルへテロ構造を
有するものとして形成することにより、良好な紫外線発
光素子として機能する。そして、本発明においては、該
紫外線発光素子からの紫外線照射を受けて可視光を発光
する可視光発光膜として、ＳｉＯ２とＳｉとの混合スパ
ッタ膜からなるものを使用する。この可視光発光膜は、
紫外線照射によるフォトルミネッセンス効果に基づいて
発光するものである。そして、ＳｉＯ２とＳｉとの混合
スパッタ膜からなる可視光発光膜を用いることにより、
紫外線発光素子からの紫外線の波長が多少ばらついて
も、色バランスの崩れにくい良好な白色光を得ることが
できる。また、１種類の紫外線発光素子により白色光が
得られるので、赤、緑及び青の発光素子を組み合わせて
白色光を得る方法などと比較して、安価に発光装置を構
成できる。[0007] Mg a Zn 1-a O and Al b In c Ga
1-b-c N is known as a wide-gap type compound semiconductor, and for example, the light emitting layer portion is composed of an n-type clad layer, an active layer and a p-type clad layer, each of which is composed of the compound semiconductor in this order. When it is formed as a laminated double hetero structure, it functions as a good ultraviolet light emitting device. Further, in the present invention, a visible light emitting film which emits visible light upon being irradiated with ultraviolet rays from the ultraviolet light emitting element is formed of a mixed sputtered film of SiO 2 and Si. This visible light emitting film is
It emits light based on the photoluminescence effect of ultraviolet irradiation. Then, by using a visible light emitting film made of a mixed sputtered film of SiO 2 and Si,
Even if the wavelength of the ultraviolet light from the ultraviolet light emitting element varies to some extent, it is possible to obtain good white light in which the color balance is not easily lost. Further, since white light can be obtained by one kind of ultraviolet light emitting element, the light emitting device can be constructed at a lower cost than a method of obtaining white light by combining red, green and blue light emitting elements.

【０００８】また、本発明においては、紫外線源として
半導体発光素子を用いるので経時的な劣化が小さく長寿
命であり、また、基本的に発光素子への通電回路さえあ
れば連続発光可能であるから回路構成も簡略化できる。
さらに、高電圧を必要とせず、抵抗損失も小さいので消
費電力が少なくて済む。また、水銀などの環境保護上望
ましくない物質が使用されないので、エコロジカルにク
リーンな発光装置が実現できる。本発明の可視光発光装
置によると、紫外線源として半導体発光素子を用いるの
で経時的な劣化が小さく長寿命であり、また、基本的に
発光素子への通電回路さえあれば連続発光可能であるか
ら回路構成も簡略化できる。さらに、高電圧を必要とせ
ず、抵抗損失も小さいので消費電力が少なくて済む。ま
た、水銀などの環境保護上望ましくない物質が使用され
ないので、エコロジカルにクリーンな発光装置が実現で
きる。そして、半導体紫外線発光素子としてＭｇａＺｎ
１ −ａＯあるいはＡｌｂＩｎｃＧａ１−ｂ−ｃＮを使用
するので安価であり、また、紫外線発光効率も高いの
で、より省エネルギーを図ることができる。Further, in the present invention, since the semiconductor light emitting element is used as the ultraviolet ray source, the deterioration over time is small and the service life is long, and basically, continuous light emission is possible only by providing an energizing circuit to the light emitting element. The circuit configuration can also be simplified.
Further, since high voltage is not required and resistance loss is small, power consumption can be reduced. In addition, since an undesirable substance such as mercury in terms of environmental protection is not used, an ecologically clean light emitting device can be realized. According to the visible light emitting device of the present invention, since a semiconductor light emitting element is used as an ultraviolet ray source, deterioration over time is small and the life is long, and basically, continuous light emission is possible as long as there is an energizing circuit to the light emitting element. The circuit configuration can also be simplified. Further, since high voltage is not required and resistance loss is small, power consumption can be reduced. In addition, since an undesirable substance such as mercury in terms of environmental protection is not used, an ecologically clean light emitting device can be realized. And, as a semiconductor ultraviolet light emitting device, Mg a Zn
1 because it uses -a O or Al b In c Ga 1-b -c N is inexpensive and, since high ultraviolet emission efficiency, it is possible to more energy saving.

【０００９】紫外線発光素子の発光層部は、ｎ型クラッ
ド層と活性層、あるいは活性層とｐ型クラッド層との少
なくともいずれかの側に、活性層から流出する向きへの
キャリア（電子及び／又は正孔）移動に対して障害とな
りうるバンド端不連続構造を有するダブルへテロ構造と
して形成される。このようなダブルへテロ構造が形成さ
れるのであれば、ｎ型クラッド層、活性層及びｐ型クラ
ッド層の１又は２のものをＭｇａＺｎ１−ａＯにて形成
し、残りをＡｌｂＩｎｃＧａ１−ｂ−ｃＮにて形成する
ことも可能である。The light emitting layer portion of the ultraviolet light emitting device is provided on at least one side of the n-type clad layer and the active layer or the active layer and the p-type clad layer with carriers (electrons and / Alternatively, it is formed as a double hetero structure having a band edge discontinuity structure that can hinder the transfer of holes. If such a double hetero structure is formed, one or two of the n-type clad layer, the active layer and the p-type clad layer is formed of Mg a Zn 1-a O, and the rest is formed of Al b. it is also possible to form at in c Ga 1-b-c N.

【００１０】本発明においては使用する混合スパッタ膜
からなる可視光発光膜は、例えば、スパッタリングに使
用するターゲットとして、ターゲット全面積に占めるＳ
ｉターゲット部分の面積率が５％以上２５％以下であ
り、残部がＳｉＯ２ターゲット部分とされたものを用い
て、ＳｉとＳｉＯ２とを同時に高周波スパッタリングす
ることにより形成することができる。Ｓｉターゲット部
分の面積率に応じて、得られる可視光発光膜中のＳｉと
ＳｉＯ２との混在比率が変化する。ターゲット全面積に
占めるＳｉターゲット部分の面積率が５％未満になって
も、２５％を超えても、いずれの場合においても、可視
光発光膜の可視光発光強度が低下するか、あるいは光に
着色が生じ、良好な白色光を得ることができなくなる。
同様の観点から、得られる可視光発光膜中のＳｉとＳｉ
Ｏ２の存在比率は、５％以上２５％以下となっているこ
とが望ましい。Ｓｉ及びＳｉＯ２の存在比率は、各相の
粒子がある程度大きい場合（たとえば５０ｎｍ以上）
は、走査型電子顕微鏡（Scanning Electron Microscop
e：ＳＥＭ）あるいはそれに組み込んだ電子線プローブ
微小分析装置（Electron Probe Micro Analyzer：ＥＰ
ＭＡ）を用いて測定することができる。また、Ｘ線光電
子分光（X-ray Photoelectron Spectroscopy：ＸＰＳ）
により得られる光電子スペクトルにおいて、化学シフト
により区別されるＳｉとＳｉ４＋（ＳｉＯ２内でのＳｉ
の価数である）とのピーク面積比（あるいは高さ比）に
基づき、Ｓｉ及びＳｉＯ２の存在比率を知ることもでき
る。The visible light emitting film made of the mixed sputtered film used in the present invention is, for example, as a target used for sputtering, S occupying the entire target area.
The i target portion having an area ratio of 5% or more and 25% or less and the remainder being the SiO 2 target portion can be formed by simultaneously high-frequency sputtering Si and SiO 2 . The mixing ratio of Si and SiO 2 in the obtained visible light emitting film changes depending on the area ratio of the Si target portion. In either case, if the area ratio of the Si target portion to the total area of the target is less than 5% or more than 25%, the visible light emission intensity of the visible light emitting film is reduced, or Coloring occurs, and it becomes impossible to obtain good white light.
From the same viewpoint, Si and Si in the obtained visible light emitting film
The abundance ratio of O 2 is preferably 5% or more and 25% or less. The abundance ratio of Si and SiO 2 is when the particles of each phase are large to some extent (for example, 50 nm or more).
Is the Scanning Electron Microscop
e: SEM) or an electron probe micro analyzer (EP) incorporated therein
MA). In addition, X-ray Photoelectron Spectroscopy (XPS)
In the photoelectron spectrum obtained by Si and Si 4+ (Si in SiO 2
It is also possible to know the abundance ratios of Si and SiO 2 based on the peak area ratio (or the height ratio) with the valence number of.

【００１１】次に、本発明の可視光発光装置は、Ｍｇａ
Ｚｎ１−ａＯ（ただし、０≦ａ≦１）又はＡｌｂＩｎｃ
Ｇａ１−ｂ−ｃＮ（ただし、０≦ｂ≦１、０≦ｃ≦１、
０≦ｂ＋ｃ≦１）からなる発光層部を有した半導体紫外
線発光素子と、ＳｉＯ２相とＳｉ相との膜面内における
平均形成間隔が紫外線波長以下となるように、ＳｉＯ ２
相中にＳｉ相が分散形成された構造を有し、半導体紫外
線発光素子からの紫外線照射を受けて可視光を発光する
可視光発光膜と、を有するものとして構成することもで
きる。ここで、「紫外線波長以下」とは、近紫外線より
波長が短いこと（例えば４００ｎｍ以下）を意味する。
ＳｉＯ２相とＳｉ相との膜面内における平均形成間隔と
は、可視光発光膜の表面にてＳＥＭあるいはそれに組み
込んだＥＰＭＡによりＳｉＯ２相とＳｉ相との各領域を
識別できる画像が得られた場合、図３に示すように、該
画像上に任意の方向に多数の直線を引き、該直線を切り
取る各相領域の長さｄ１，‥，ｄｎの平均値ｄＡ（＝
（ｄ１＋‥＋ｄｎ）／ｎ）にて表すものとする。また、
この平均形成間隔は、良好な白色光を発生させる観点か
ら、１ｎｍ以上は確保されていることが望ましい。な
お、このような可視光発光膜は、前述した高周波スパッ
タリング以外の方法（例えばＣＶＤ法など）で形成して
もよい。Next, the visible light emitting device of the present invention isa
Zn1-aO (however, 0 ≦ a ≦ 1) or AlbInc
Ga1-bcN (however, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1,
Semiconductor ultraviolet having a light emitting layer portion of 0 ≦ b + c ≦ 1)
Linear light emitting device and SiOTwoPhase and Si phase in the film plane
SiO so that the average formation interval is less than the ultraviolet wavelength. Two
It has a structure in which the Si phase is dispersed and formed in the phase
It emits visible light when it receives UV irradiation from a linear light emitting element.
And a visible light emitting film.
Wear. Here, "below the ultraviolet wavelength" means that
This means that the wavelength is short (for example, 400 nm or less).
SiOTwoAverage spacing in the film plane between the Si phase and the Si phase
On the surface of the visible light emitting film,
Due to the embedded EPMA, SiOTwoPhase and Si phase
When an identifiable image is obtained, as shown in FIG.
Draw many straight lines in any direction on the image and cut the straight lines.
Average value d of lengths d1, ..., Dn of each phase region to be takenA(=
It is represented by (d1 + ... + dn) / n). Also,
Is this average formation interval from the viewpoint of generating good white light?
It is desirable that 1 nm or more is secured. Na
In addition, such a visible light emitting film is used for the high frequency spatter described above.
Formed by a method other than tarring (eg, CVD method)
Good.

【００１２】ＳｉＯ２相とＳｉ相との平均形成間隔が紫
外線波長以下となるように、Ｓｉ相がＳｉＯ２相中に一
様に分散形成されていると、次のような機構により白色
光が発生するものと推測される。可視光発光膜内の任意
の方向には、図４に示すように、バンドギャップエネル
ギーがＥｇ１のＳｉ相領域と、同じくＥｇ２（＞Ｅｇ
１）のＳｉＯ２相領域とが交互に形成される（Ｅｃは伝
導帯底、Ｅｖは価電子帯頂を表す）。Ｓｉ相領域はＳｉ
Ｏ２相との間のバンド端不連続量が大きいため、電子に
対するポテンシャル井戸として振舞うと考えられる。Ｓ
ｉ相はＳｉＯ２相中に一様に分散形成されているので、
こうしたポテンシャル井戸的な構造は可視光発光膜内に
て３次元的に生じており、電子に対する閉じ込め効果が
高められる。When the Si phase is uniformly dispersed and formed in the SiO 2 phase so that the average formation interval between the SiO 2 phase and the Si phase is equal to or less than the ultraviolet wavelength, white light is generated by the following mechanism. It is supposed to occur. As shown in FIG. 4, in an arbitrary direction in the visible light emitting film, a Si phase region having a band gap energy of Eg1 and an Eg2 (> Eg)
The SiO 2 phase regions of 1) are alternately formed (Ec represents a conduction band bottom and Ev represents a valence band top). Si phase region is Si
Since the amount of band edge discontinuity with the O 2 phase is large, it is considered to behave as a potential well for electrons. S
Since the i phase is uniformly dispersed and formed in the SiO 2 phase,
Such a potential well structure is three-dimensionally generated in the visible light emitting film, and the effect of confining electrons is enhanced.

【００１３】そして、相の平均形成間隔が例えば電子の
ド・ブロイ波長程度かそれ以下（例えば１ｎｍ以上１５
ｎｍ以下）に小さくなると、上記の３次元的なポテンシ
ャル井戸は量子箱構造に近くなり、電子に対する非常に
強い閉じ込め効果を生ずるとともに、量子井戸特有のサ
ブバンド構造を形成する。Ｓｉは間接遷移型の半導体で
あり、発光材料としては従来あまり期待されていなかっ
た。しかし、ＳｉＯ２中への分散により上記のような量
子箱的な構造が生ずると、上記のようなサブバンドを経
由した直接遷移的なバンド間遷移が新たに可能となり、
フォトルミネッセンス効果による可視光発光が可能にな
るものと考えられる。また、電子の運動が井戸により束
縛され、波数ベクトル−運動量空間における電子の運動
量分布に拡がりが生じることも、直接遷移成分の増加ひ
いては発光効率の向上に寄与するものと考えられる。そ
して、Ｓｉ相の大きさと、これを隔てるＳｉＯ２相の間
隔が一定の範囲にて分布していることから、形成される
サブバンドの準位も種々のものが生じ、その準位に応じ
て種々の異なるエネルギーすなわち波長の可視光が励起
され、白色光を得られるようになるものと考えられる。The average phase formation interval is, for example, about the de Broglie wavelength of electrons or less (for example, 1 nm or more and 15 nm or more).
When it is smaller than (nm), the above-mentioned three-dimensional potential well becomes close to a quantum box structure, a very strong confinement effect for electrons is generated, and a subband structure peculiar to a quantum well is formed. Si is an indirect transition type semiconductor and has not been so much expected as a light emitting material. However, when the quantum box-like structure as described above occurs due to the dispersion in SiO 2 , direct transition between bands as described above via subbands is newly possible,
It is considered that visible light can be emitted due to the photoluminescence effect. Further, it is considered that the movement of electrons is restricted by the well and the momentum distribution of electrons in the wave number vector-momentum space is broadened, which contributes to the increase of direct transition components and thus to the improvement of light emission efficiency. Since the size of the Si phase and the spacing between the SiO 2 phases that separate the Si phase are distributed in a certain range, various levels of the formed subbands occur, and depending on the level, It is considered that various different energies, that is, wavelengths of visible light are excited to obtain white light.

【００１４】一方、相の平均形成間隔が電子のド・ブロ
イ波長より長い場合（例えば１５０ｎｍ以上）でも、ポ
テンシャル井戸部分への電子の束縛効果は高められるか
ら、可視光発光を行なう観点において好都合であること
に変わりはない。この場合、ＳｉＯ２相部分の平均形成
間隔をｄ１、Ｓｉ相部分の平均形成間隔をｄ２、可視光
に対するＳｉＯ２の屈折率をｎ１（約１．５）、Ｓｉの
屈折率をｎ２（約３．５）としたとき、ＳｉＯ２相部分
の光学的長さｄ１・ｎ１とＳｉ相部分の光学的長さｄ２
・ｎ２との和の平均値が、紫外線波長（２００〜４００
ｎｍ）の１／２程度、すなわち、１００〜２００ｎｍ程
度になっていれば、屈折率の周期的変化によりフォトニ
ックバンドギャップと称される構造が３次元的に生じ、
発光素子から入射した紫外線の可視光発光膜内への閉じ
込め効果が高められる。従って、ポテンシャル井戸部分
への電子の束縛効果とも相俟って、紫外線による電子の
励起が促進され、高輝度の可視光発光を実現できる。ま
た、フォトニックバンドギャップ形成により紫外線が可
視光発光膜内に閉じ込められるので、紫外線エネルギー
が可視光エネルギーに効率よく変換され、ひいては可視
光発光の内部量子効率向上にも寄与する。On the other hand, even when the average formation interval of phases is longer than the de Broglie wavelength of electrons (for example, 150 nm or more), the effect of binding electrons to the potential well portion is enhanced, which is convenient from the viewpoint of emitting visible light. There is no change. In this case, the average formation interval of the SiO 2 phase portion is d1, the average formation interval of the Si phase portion is d2, the refractive index of SiO 2 with respect to visible light is n1 (about 1.5), and the refractive index of Si is n2 (about 3). .5), the optical length d1 · n1 of the SiO 2 phase portion and the optical length d2 of the Si phase portion
-The average value of the sum with n2 is the ultraviolet wavelength (200-400
nm), that is, about 100 to 200 nm, a structure called a photonic band gap is three-dimensionally generated due to a periodic change in the refractive index.
The effect of confining the ultraviolet rays incident from the light emitting element in the visible light emitting film is enhanced. Therefore, in combination with the effect of binding electrons to the potential well portion, the excitation of electrons by ultraviolet rays is promoted, and high-luminance visible light emission can be realized. Further, since the ultraviolet light is confined in the visible light emitting film due to the formation of the photonic band gap, the ultraviolet energy is efficiently converted into the visible light energy, which contributes to the improvement of the internal quantum efficiency of the visible light emission.

【００１５】なお、この場合は、白色光発光が可能とな
る要因として、以下のように推測することができる。小
さなＳｉ相粒子は、ＳｉＯ２部分との界面の影響を受け
る部分が多くなり、ひいてはバンド構造もバルクのＳｉ
とは異なったものとなることが予想される。スパッタリ
ング等により形成されるＳｉ相粒子の寸法は一定範囲の
分布を持ち、粒子寸法によって界面効果の影響を受ける
部分も異なる。従って、界面効果によるＳｉ相粒子のバ
ンド構造変化の度合いが粒子寸法によって異なり、紫外
線により励起されるフォトルミネッセンス発光の波長に
分布を生じ、白色発光が可能になるものと考えられる。In this case, it can be estimated as follows as a factor that enables white light emission. The small Si phase particles have many portions affected by the interface with the SiO 2 portion, and thus the band structure also has bulk Si.
Is expected to be different from. The size of Si phase particles formed by sputtering or the like has a certain range of distribution, and the part affected by the interfacial effect also differs depending on the particle size. Therefore, it is considered that the degree of change in the band structure of the Si phase particles due to the interface effect varies depending on the particle size, and the wavelength of the photoluminescence light emission excited by the ultraviolet light is distributed, thereby enabling white light emission.

【００１６】なお、フォトニックバンドギャップ効果
は、ＳｉＯ２相部分の光学的長さｄ１・ｎ１とＳｉ相部
分の光学的長さｄ２・ｎ２とが等しくなるときに最も顕
著となる。この長さをＬ０とすれば、ＳｉＯ２相部分と
Ｓｉ相部分との実長さの比は、（Ｌ０／ｎ１）：（Ｌ０
／ｎ２）＝０．６７：０．２９となり、面積比はその平
方比、すなわち０．４５：０．０８程度とすることが適
当と思われる。この比から計算されるＳｉ相部分の面積
率（可視光発光膜内における体積率を反映する）は約１
５％である。The photonic bandgap effect becomes most remarkable when the optical length d1 · n1 of the SiO 2 phase portion is equal to the optical length d2 · n2 of the Si phase portion. If this length is L0, the ratio of the actual lengths of the SiO 2 phase portion and the Si phase portion is (L0 / n1) :( L0
/N2)=0.67:0.29, and it is considered appropriate to set the area ratio to the square ratio, that is, about 0.45: 0.08. The area ratio of the Si phase portion calculated from this ratio (reflecting the volume ratio in the visible light emitting film) is about 1
5%.

【００１７】そして、可視光発光膜のＳｉ相部分の面積
率（体積率）は、ここでも５％以上２５％以下とするこ
とが望ましく、これをスパッタリングにて形成する場合
は、ターゲット全面積に占めるＳｉターゲット部分の面
積率を、５％以上２５％以下とする。面積率が２５％を
超えるかあるいは５％未満になると、フォトニックバン
ドギャップ効果ひいては紫外線閉じ込め効果が損なわ
れ、十分な発光強度が得られなくなる。The area ratio (volume ratio) of the Si phase portion of the visible light emitting film is also preferably 5% or more and 25% or less, and when this is formed by sputtering, the total area of the target is reduced. The area ratio of the occupied Si target portion is 5% or more and 25% or less. If the area ratio exceeds 25% or less than 5%, the photonic bandgap effect and thus the ultraviolet trapping effect are impaired, and sufficient emission intensity cannot be obtained.

【００１８】可視光発光膜のＳｉ相部分及びＳｉＯ２相
部分の形成間隔は、例えば成膜時の基板温度により調整
することができる。また、成膜後に可視光発光膜に熱処
理を行って、上記の形成間隔を調整することも可能であ
る。The formation interval of the Si phase portion and the SiO 2 phase portion of the visible light emitting film can be adjusted, for example, by the substrate temperature during film formation. Further, the visible light emitting film may be heat-treated after the film formation to adjust the above-mentioned formation interval.

【００１９】なお、Ｓｉ相及びＳｉＯ２相の同定に前述
のＳＥＭやＥＰＭＡを用いる場合は、Ｓｉ相及びＳｉＯ
２相の領域を、導電率の差による二次電子線像のコント
ラストの相違、あるいは酸素濃度分布等により識別が可
能である。しかし、各相の寸法が３００ｎｍ以下程度に
なると、分解能の問題もあり、明確な識別が不能になる
こともある。しかしながら、ＸＰＳ分析によれば、Ｓｉ
とＳｉ４＋との両ピークが同時に観察されるか否かによ
り、Ｓｉ相及びＳｉＯ２相の存在は確認できる。たとえ
ば、ＳＥＭやＥＰＭＡでの両相の識別が不能であって、
かつ、ＸＰＳにより両相の存在が裏付けられた場合は、
平均形成間隔が３００ｎｍ以下にてＳｉ相及びＳｉＯ２
相が混在しているものと推定することができる。When the above SEM or EPMA is used for identifying the Si phase and the SiO 2 phase, the Si phase and the SiO 2 are used.
The two- phase regions can be identified by the difference in the contrast of the secondary electron beam image due to the difference in conductivity, the oxygen concentration distribution, or the like. However, if the dimension of each phase is about 300 nm or less, there is a problem of resolution, and clear identification may not be possible. However, according to XPS analysis, Si
The existence of the Si phase and the SiO 2 phase can be confirmed by whether or not both peaks of Si 4+ and Si 4+ are simultaneously observed. For example, it is impossible to identify both phases by SEM or EPMA,
And if the existence of both phases is confirmed by XPS,
When the average formation interval is 300 nm or less, Si phase and SiO 2
It can be estimated that the phases are mixed.

【００２０】可視光発光膜は、導体紫外線発光素子の少
なくとも一方の主表面に、素子上発光膜として形成する
ことができる。素子の主表面に上記の可視光発光膜を形
成することにより、可視光発光膜への紫外線照射効率が
増し、より高輝度の可視光発光が可能となる。The visible light emitting film can be formed as an on-device light emitting film on at least one main surface of the conductor ultraviolet light emitting device. By forming the visible light emitting film on the main surface of the device, the efficiency of irradiation of the visible light emitting film with ultraviolet rays is increased, and it is possible to emit visible light with higher brightness.

【００２１】[0021]

【発明の実施の形態】以下、本発明の実施の形態を、図
面を用いて説明する。図１は、本発明に係る可視光発光
装置の一例を模式的に示すものである。該可視光発光装
置１は半導体紫外線発光素子２を有し、その発光層部８
は、単結晶基板３上にヘテロエピタキシャル成長された
ものである。発光層部８の単結晶基板に接している主表
面を第二主表面Ｐ２とし、これと反対側の主表面を第一
主表面Ｐ１として、第一主表面Ｐ１の一部領域を覆うよ
うに発光層部８に導通する電極９が形成されている。そ
して、第一主表面Ｐ１の電極９以外の領域が可視光発光
膜である素子上発光膜１０にて覆われている。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 schematically shows an example of a visible light emitting device according to the present invention. The visible light emitting device 1 has a semiconductor ultraviolet light emitting element 2 and a light emitting layer portion 8 thereof.
Are grown by heteroepitaxial growth on the single crystal substrate 3. The main surface of the light emitting layer portion 8 which is in contact with the single crystal substrate is the second main surface P2, and the main surface on the opposite side is the first main surface P1 so as to cover a part of the first main surface P1. An electrode 9 that is electrically connected to the light emitting layer portion 8 is formed. Then, the area other than the electrode 9 on the first main surface P1 is covered with the on-element light emitting film 10 which is a visible light emitting film.

【００２２】発光層部８は、ｎ型クラッド層５、活性層
６及びｐ型クラッド層７がこの順序にて積層された発光
層部を有している。また、単結晶基板３はサファイア基
板である。そして、各層５〜７はいずれもＭｇａＺｎ
１−ａＯ（０≦ａ≦１：以下、ＭｇＺｎＯとも記す：た
だし、混晶比ａの範囲からも明らかなように、ＭｇＺｎ
Ｏと記していても、これはＭｇＯ及びＺｎＯの各単体酸
化物の概念を含むものである）として形成されている。
ｐ型クラッド層７には、ｐ型ドーパントとして、例えば
Ｎ、Ｇａ、Ａｌ、Ｉｎ、Ｌｉの一種又は２種以上が微量
含有されている。また、ｐ型キャリア濃度は前述の通り
１×１０１６個／ｃｍ３以上８×１０１８個／ｃｍ３以
下、例えば１０１７個／ｃｍ３〜１０１８／ｃｍ３程度
の範囲で調整される。The light emitting layer section 8 has a light emitting layer section in which an n-type clad layer 5, an active layer 6 and a p-type clad layer 7 are laminated in this order. The single crystal substrate 3 is a sapphire substrate. Each of the layers 5 to 7 is Mg a Zn.
1-a O (0≤a≤1: hereinafter, also referred to as MgZnO: However, as is clear from the range of the mixed crystal ratio a, MgZnO
Although described as O, it includes the concept of MgO and ZnO simple substance oxides).
The p-type cladding layer 7 contains a trace amount of one or more of N, Ga, Al, In, and Li as a p-type dopant. Further, the p-type carrier concentration is adjusted in the range of 1 × 10 16 pieces / cm 3 or more and 8 × 10 18 pieces / cm 3 or less, for example, 10 17 pieces / cm 3 to 10 18 / cm 3 as described above.

【００２３】活性層６は、要求される発光波長に応じて
適宜のバンドギャップを有するものが使用される。例え
ば、可視光発光に使用するものは、波長４００ｎｍ〜５
７０ｎｍにて発光可能なバンドギャップエネルギーＥｇ
（３．１０ｅＶ〜２．１８ｅＶ程度）を有するものを選
択する。これは、紫から緑色までをカバーする発光波長
帯であるが、特に青色発光に使用する場合は、波長４５
０ｎｍ〜５００ｎｍにて発光可能なバンドギャップエネ
ルギーＥｇ（２．７６ｅＶ〜２．４８ｅＶ程度）を有す
るものを選択する。また、紫外線発光に使用するもの
は、波長２８０ｎｍ〜４００ｎｍにて発光可能なバンド
ギャップエネルギーＥｇ（４．４３ｅＶ〜３．１０ｅＶ
程度）を有するものを選択する。As the active layer 6, a layer having an appropriate band gap according to the required emission wavelength is used. For example, the one used for visible light emission has a wavelength of 400 nm to 5 nm.
Bandgap energy Eg capable of emitting light at 70 nm
Those having (about 3.10 eV to 2.18 eV) are selected. This is the emission wavelength band that covers from purple to green, but especially when used for blue emission, the wavelength of 45
A material having a bandgap energy Eg (about 2.76 eV to 2.48 eV) capable of emitting light at 0 nm to 500 nm is selected. Further, the one used for ultraviolet light emission is a band gap energy Eg (4.43 eV to 3.10 eV) capable of emitting light at a wavelength of 280 nm to 400 nm.
Select the one that has

【００２４】例えば活性層６は、ｐ型ＭｇｘＺｎ１−ｘ
Ｏ型酸化物層との間にタイプIのバンドラインナップを
形成する半導体により形成することができる。このよう
な活性層６は、例えばＭｇｙＺｎ１−ｙＯ型酸化物層
（ただし、０≦ｙ≦１、ｘ＞ｙ：以下、ＭｇＺｎＯ活性
層ともいう）として形成することができる。「活性層と
ｐ型ＭｇＺｎＯクラッド層との間にタイプIのバンドラ
インナップが形成される」とは、ｐ型クラッド層７の伝
導帯底及び価電子帯上端の各エネルギーレベルＥｃｐ，
Ｅｖｐと、活性層の伝導帯底及び価電子帯上端の各エネ
ルギーレベルＥｃｉ，Ｅｖｉとの間に次のような大小関
係が成立している接合構造をいう： Ｅｃｉ≦Ｅｃｐ ‥‥(1) Ｅｖｉ＞Ｅｖｐ ‥‥(2)For example, the active layer 6 is formed of p-type Mg x Zn 1-x.
It can be formed of a semiconductor that forms a type I band lineup with the O-type oxide layer. Such an active layer 6 can be formed, for example, as an Mg y Zn 1-y O type oxide layer (where 0 ≦ y ≦ 1 and x> y: hereinafter also referred to as MgZnO active layer). “A type I band lineup is formed between the active layer and the p-type MgZnO cladding layer” means that each energy level Ecp of the conduction band bottom and the valence band top of the p-type cladding layer 7 is
A junction structure in which the following magnitude relationship is established between Evp and each energy level Eci, Evi at the conduction band bottom and valence band top of the active layer: Eci ≦ Ecp (1) Evi > Evp ..... (2)

【００２５】該構造では、活性層６からｎ型クラッド層
５への正孔の順拡散と、ｐ型クラッド層７への電子（ｎ
型キャリア）の順拡散のいずれに関してもポテンシャル
障壁が生ずる。そして、活性層６とｎ型クラッド層５と
の間に、同様のタイプI型バンドラインナップが形成さ
れるようｎ型クラッド層５の材質選択を行なえば、活性
層の位置には、伝導帯底及び価電子帯上端の両方に井戸
状のポテンシャル障壁が形成され、電子と正孔との双方
に対して閉じ込め効果が高められる。その結果、キャリ
ア再結合促進ひいては発光効率向上が一層顕著となる。In this structure, forward diffusion of holes from the active layer 6 to the n-type cladding layer 5 and electrons (n
A potential barrier is generated in any of the forward diffusion of (type carriers). Then, if the material of the n-type cladding layer 5 is selected so that a similar type I band lineup is formed between the active layer 6 and the n-type cladding layer 5, the conduction band bottom is located at the position of the active layer. A well-like potential barrier is formed at both the top of the valence band and the valence band, and the confinement effect is enhanced for both electrons and holes. As a result, the promotion of carrier recombination, and thus the improvement in luminous efficiency, becomes more remarkable.

【００２６】活性層６において、混晶比ｙの値は、バン
ドギャップエネルギーＥｇを決める因子ともなる。例え
ば、波長２８０ｎｍ〜４００ｎｍの紫外線発光を行なわ
せる場合は０≦ｙ≦０．５の範囲にて選択する。また、
形成されるポテンシャル障壁の高さは、０．１ｅＶ〜
０．３ｅＶ程度が適当である。この値は、ｐ型クラッド
層７をなすＭｇｘＺｎ１−ｘＯ、活性層６をなすＭｇｙ
Ｚｎ１−ｙＯ及びｎ型クラッド層５をなすＭｇｚＺｎ
１−ｚＯ層３４の各混晶比ｘ、ｙ、ｚの数値の選択によ
り決定できる。In the active layer 6, the value of the mixed crystal ratio y is also a factor that determines the band gap energy Eg. For example, when ultraviolet light emission with a wavelength of 280 nm to 400 nm is performed, the range of 0 ≦ y ≦ 0.5 is selected. Also,
The height of the potential barrier formed is from 0.1 eV to
About 0.3 eV is suitable. This value is Mg x Zn 1-x O forming the p-type cladding layer 7 and Mg y forming the active layer 6.
Zn 1-y O and Mg z Zn forming the n-type cladding layer 5
It can be determined by selecting the numerical values of the respective mixed crystal ratios x, y, z of the 1-z O layer 34.

【００２７】次に、素子上発光膜（可視光発光膜）１０
は、ＳｉとＳｉＯ２との混合スパッタ膜として構成さ
れ、図３に示すように、ＳｉＯ２相とＳｉ相との膜面内
における平均形成間隔が紫外線波長以下（１ｎｎ以上４
００ｎｍ以下、望ましくは１．５ｎｍ以上２００ｎｍ以
下）となるように、ＳｉＯ２相中にＳｉ相が散点状に分
散形成された構造を有すると推定されるものである。そ
して、紫外線発光素子２からの紫外線照射を受けること
により、フォトルミネッセンス効果に基づき白色光を発
光する。その詳細については、「課題を解決する手段及
び作用・効果」の欄にて詳しく説明したのでここでは繰
り返さない。Next, the light emitting film on the device (visible light emitting film) 10
Is formed as a mixed sputtered film of Si and SiO 2, and as shown in FIG. 3, the average formation interval of the SiO 2 phase and the Si phase in the film plane is not more than the ultraviolet wavelength (1 nn or more and 4
It is presumed to have a structure in which the Si phase is dispersedly formed in the SiO 2 phase so as to have a thickness of 00 nm or less, preferably 1.5 nm or more and 200 nm or less. Then, by receiving the ultraviolet irradiation from the ultraviolet light emitting element 2, white light is emitted based on the photoluminescence effect. The details have been described in the section “Means and Actions / Effects for Solving Problems” and will not be repeated here.

【００２８】本実施形態においては、絶縁性基板（サフ
ァイア基板）３が用いられていることを考慮して、光取
出面側に通電用の電極を集めた構造を採用している。具
体的には、ｐ型クラッド層７とｎ型クラッド層５との第
一主表面Ｐ１側に位置するものを第一クラッド層（ｐ型
クラッド層である）７とし、第二主表面Ｐ２側に位置す
るものを第二クラッド層（ｎ型クラッド層である）５と
して、第一主表面Ｐ１に、第一クラッド層７に導通する
第一電極９が形成されている。また、第一主表面Ｐ１に
は、第一クラッド層７と活性層６との一部を切り欠く形
で、第二クラッド層５の露出領域が形成され、該露出領
域にて第二クラッド層５に導通する第二電極１１が形成
されている。第一電極９と第二電極１１は、いずれもＡ
ｕを主体とするオーミック電極である。In the present embodiment, considering that the insulating substrate (sapphire substrate) 3 is used, a structure in which electrodes for energization are collected on the light extraction surface side is adopted. Specifically, the one located on the first main surface P1 side of the p-type clad layer 7 and the n-type clad layer 5 is the first clad layer (which is the p-type clad layer) 7, and the second main surface P2 side. The first electrode 9 that is electrically connected to the first cladding layer 7 is formed on the first main surface P1 with the second cladding layer (which is the n-type cladding layer) 5 located at the position # 1. Further, an exposed region of the second cladding layer 5 is formed on the first main surface P1 by cutting out a part of the first cladding layer 7 and the active layer 6, and the second cladding layer is formed in the exposed region. The second electrode 11 that is electrically connected to the electrode 5 is formed. Both the first electrode 9 and the second electrode 11 are A
It is an ohmic electrode mainly composed of u.

【００２９】なお、本実施形態においては、透明な基板
３の裏面側に、発光層部８からの紫外線を光取出面とな
る第一主表面Ｐ１側へ反射するＡｌあるいはＡｕ等から
なる金属反射膜４が設けられ、素子上発光膜１０への紫
外線の照射効率、ひいては可視光への変換効率を高める
工夫がなされている。そして、その金属反射膜４におい
て接着層１９により、金属ケーシング１３の底面に接着
されている。そして、第一電極９はボンディングワイヤ
１７を介して第一端子１５に接続され、第二電極１１は
ボンディングワイヤ１８を介して、第二端子１６が導通
する導電性ケーシング１３に接続されている。In the present embodiment, on the back surface side of the transparent substrate 3, metal reflection made of Al, Au or the like which reflects the ultraviolet rays from the light emitting layer portion 8 to the first main surface P1 side which is the light extraction surface. The film 4 is provided, and the device is designed to enhance the irradiation efficiency of the ultraviolet rays to the light emitting film 10 on the element, and thus the conversion efficiency to visible light. Then, the metal reflection film 4 is adhered to the bottom surface of the metal casing 13 by the adhesive layer 19. The first electrode 9 is connected to the first terminal 15 via the bonding wire 17, and the second electrode 11 is connected to the conductive casing 13 to which the second terminal 16 is conducted, via the bonding wire 18.

【００３０】また、図１の可視光発光装置１において
は、半導体紫外線発光素子２とは別に設けられた基体１
３上にも、素子上発光膜１０と同様の可視光発光膜から
なる素子外発光膜１４が形成されている。素子外発光膜
１４は半導体紫外線発光素子２からの紫外線が照射さ
れ、白色光を発光する。該素子外発光膜１４は、半導体
紫外線発光素子２からの紫外線照射を受けるとともに、
該照射により生じた可視光を、素子上発光膜１０からの
可視光に重畳させて放出する。これにより、半導体紫外
線発光素子２からの紫外線の可視光への変換効率が一層
向上し、より発光強度を高めることができる。ただし、
この素子外発光膜１４は省略することも可能である。In the visible light emitting device 1 shown in FIG. 1, the substrate 1 provided separately from the semiconductor ultraviolet light emitting element 2 is used.
An external light emitting film 14 made of a visible light emitting film similar to the on-device light emitting film 10 is also formed on 3. The external light emitting film 14 is irradiated with the ultraviolet rays from the semiconductor ultraviolet light emitting element 2 and emits white light. The extra-element light emitting film 14 receives ultraviolet irradiation from the semiconductor ultraviolet light emitting element 2 and
The visible light generated by the irradiation is superimposed on the visible light from the light emitting film on the device 10 and emitted. Thereby, the conversion efficiency of the ultraviolet rays from the semiconductor ultraviolet light emitting element 2 into visible light is further improved, and the emission intensity can be further increased. However,
The light emitting film 14 outside the element can be omitted.

【００３１】本実施形態では、基体１３が前述の金属ケ
ーシング１３であり、半導体紫外線発光素子２の第一主
表面Ｐ１の法線ＮＬを軸線として、これを取り囲む放射
壁部１３ａを形成している。この放射壁部１３ａは、素
子上発光膜１０からの可視光放射を許容する開口１３ｑ
を有する。そして、上記法線ＮＬと垂直な投影面ＰＰへ
の投影において、放射壁部１３ａの内面は開口１３ｑの
内側に位置するように、傾斜（あるいは湾曲でもよい）
形態に形成されている。この放射壁部１３ａの内面に素
子外発光膜１４が形成されており、半導体紫外線発光素
子２から法線ＮＬに関して側方に漏れ出す紫外線を効率
的に受光して可視光に変換し、素子上発光膜１０からの
可視光に重畳して放出する効果が高められている。In the present embodiment, the base body 13 is the metal casing 13 described above, and the radiation line 13a surrounding the normal line NL of the first main surface P1 of the semiconductor ultraviolet light emitting element 2 is formed as an axis. . The radiation wall portion 13a has an opening 13q for allowing visible light radiation from the light emitting film 10 on the device.
Have. Then, in the projection onto the projection plane PP perpendicular to the normal line NL, the inner surface of the radiation wall portion 13a is inclined (or curved) so as to be located inside the opening 13q.
It is formed into a shape. An external light-emitting film 14 is formed on the inner surface of the radiation wall portion 13a, and ultraviolet rays leaking laterally from the semiconductor ultraviolet light-emitting element 2 with respect to the normal line NL are efficiently received and converted into visible light. The effect of emitting the visible light from the light emitting film 10 in superimposition is enhanced.

【００３２】なお、本実施形態では、素子外発光膜１４
の下地面をなす基体１３ａの表面が、素子上発光膜１０
からの可視光の反射面とされている。具体的には、Ａｌ
やＣｕからなる金属ケーシング１３の放射壁部１３ａが
基体であり、素子外発光膜１４の形成面となるその内面
も、金属製の光反射面となっている。このようにする
と、素子上発光膜１０から側方に漏れ出す可視光を法線
ＮＬ方向に反射させて、該方向への可視光放射強度を高
めることができる。In this embodiment, the light emitting film 14 outside the device is used.
The surface of the base body 13a that forms the lower ground of
It is a reflective surface of visible light from. Specifically, Al
The radiation wall portion 13a of the metal casing 13 made of Cu or Cu is a base body, and its inner surface, which is the surface on which the external light emitting film 14 is formed, is also a light reflecting surface made of metal. By doing so, visible light leaking laterally from the light emitting film on the element 10 can be reflected in the direction of the normal line NL, and the intensity of visible light emission in that direction can be increased.

【００３３】以下、上記発光素子の製造工程の一例を説
明する。まず、基板３（図１）上にＺｎＯからなる図示
しないバッファ層をエピタキシャル成長させる。次い
で、前述のｎ型クラッド層５、活性層６及びｐ型クラッ
ド層７をこの順序にてエピタキシャル成長させ、発光層
８を得る（５〜７は成長順序を逆転させてもよい）。こ
れら各層のエピタキシャル成長は、周知のＭＯＶＰＥ法
もしくはＭＢＥ法にて成長させることができる。An example of the manufacturing process of the light emitting device will be described below. First, a buffer layer (not shown) made of ZnO is epitaxially grown on the substrate 3 (FIG. 1). Next, the n-type cladding layer 5, the active layer 6, and the p-type cladding layer 7 described above are epitaxially grown in this order to obtain the light emitting layer 8 (the growth order of 5 to 7 may be reversed). The epitaxial growth of each of these layers can be performed by the well-known MOVPE method or MBE method.

【００３４】次に、発光層８をなすｐ型クラッド層７及
び活性層６の一部を切り欠いて、ｎ型クラッド層５の露
出領域を第一主表面Ｐ１側に形成し、この露出領域の表
面に第二電極１１を、また、ｐ型クラッド層７の表面に
第一電極９を、それぞれＡｕ等を蒸着することにより形
成する。なお、発光層８と第一電極９との間にＩＴＯ等
からなる透光性の電流拡散層を形成してもよい。Next, a part of the p-type cladding layer 7 and the active layer 6 forming the light emitting layer 8 is cut out to form an exposed region of the n-type cladding layer 5 on the first main surface P1 side. The second electrode 11 is formed on the surface of, and the first electrode 9 is formed on the surface of the p-type clad layer 7 by depositing Au or the like, respectively. A light-transmitting current diffusion layer made of ITO or the like may be formed between the light emitting layer 8 and the first electrode 9.

【００３５】そして、発光層８の第一主表面Ｐ１に、第
一電極９及び第二電極１１は覆い、残余の領域は覆わな
いようなマスクを被せ、図１２に模式的に示す周知の高
周波スパッタリング装置を用いて、可視光発光膜（素子
上発光膜１０）を、ＳｉとＳｉＯ２との混合スパッタ膜
として形成する。形成厚さは例えば１００ｎｍ〜５００
０ｎｍ程度とするのがよい。スパッタリングに使用する
ターゲットは、図１３に示すように、ターゲット全面積
に占めるＳｉターゲット部分の面積率が５％以上２５％
以下であり、残部がＳｉＯ２ターゲット部分とされた、
いわば複合ターゲットを用い、ＳｉとＳｉＯ２とを同時
に高周波スパッタリングするようにする。なお、可視光
発光膜形成時の基板温度はヒータにより調整可能である
が、本実施形態では基板の加熱を行なわずに成膜を行
い、また、成膜後の熱処理等も行っていない。Then, the first main surface P1 of the light emitting layer 8 is covered with a mask which covers the first electrode 9 and the second electrode 11 and does not cover the remaining region, and the well-known high frequency wave schematically shown in FIG. The visible light emitting film (light emitting film on element 10) is formed as a mixed sputtered film of Si and SiO 2 using a sputtering device. The formed thickness is, for example, 100 nm to 500
It is preferable that the thickness is about 0 nm. As shown in FIG. 13, the target used for the sputtering has an area ratio of the Si target portion in the entire target area of 5% or more and 25% or more.
Below, the remainder was the SiO 2 target portion,
In other words, a composite target is used, and Si and SiO 2 are simultaneously subjected to high frequency sputtering. The substrate temperature during the formation of the visible light emitting film can be adjusted by a heater, but in the present embodiment, the film formation is performed without heating the substrate, and the heat treatment after the film formation is not performed.

【００３６】図１３においては、Ｓｉターゲット部分を
なすセグメントとＳｉＯ２ターゲット部分をなすセグメ
ントとを組み合わせて、全体として１枚の複合ターゲッ
トを形成している。この場合、各セグメントの面積調整
により、Ｓｉターゲット部分の面積率を所望の値に設定
できる。なお、図１３左においてはターゲット全体を放
射状に区切る形で、また、図１３右においては同心円状
に区切る形でセグメントに分割しているが、セグメント
への分割形態はこれに限られるものではない。また、Ｓ
ｉＯ２ターゲット上に、これよりも小面積のＳｉターゲ
ットを載置して、ＳｉＯ２ターゲットの表面の一部をＳ
ｉターゲットにて覆い、載置するＳｉターゲットの面積
や数によりＳｉターゲット部分の面積率を調整してもよ
い。In FIG. 13, the segment forming the Si target portion and the segment forming the SiO 2 target portion are combined to form one composite target as a whole. In this case, the area ratio of the Si target portion can be set to a desired value by adjusting the area of each segment. In addition, in the left part of FIG. 13, the entire target is radially divided, and in the right part of FIG. 13, the target is divided into concentric segments, but the division into segments is not limited to this. . Also, S
A Si target having a smaller area than this is placed on the iO 2 target, and a part of the surface of the SiO 2 target is subjected to S
The area ratio of the Si target portion may be adjusted according to the area and number of Si targets to be covered with the i target.

【００３７】以上のようにして得られた素子上発光膜１
０を有する紫外線発光素子２を、図１に示すように金属
ケーシング１３（図１２と同様の装置を用いた高周波ス
パッタリングにより、素子外発光膜１４が既に形成され
ている）を含む周辺アセンブリに組み付け、さらにボン
ディングワイヤ１７，１８を取り付ければ、図１に示す
可視光発光装置１が得られる（この後、周知の樹脂モー
ルドを行なってもよい）。The on-device light emitting film 1 obtained as described above.
Assembling the ultraviolet light emitting element 2 having 0 into a peripheral assembly including a metal casing 13 (external light emitting film 14 has already been formed by high frequency sputtering using an apparatus similar to FIG. 12) as shown in FIG. Further, if the bonding wires 17 and 18 are further attached, the visible light emitting device 1 shown in FIG. 1 is obtained (after that, known resin molding may be performed).

【００３８】なお、ＭｇａＺｎ１−ａＯに代えて、Ａｌ
ｂＩｎｃＧａ１−ｂ−ｃＮ（ただし、０≦ｂ≦１、０≦
ｃ≦１、０≦ｂ＋ｃ≦１）を用いることもできる。すな
わち、ｎ型クラッド層５、活性層６及びｐ型クラッド層
７を、各々混晶比ｂ，ｃを調整したＡｌｂＩｎｃＧａ
１−ｂ−ｃＮにて構成する。なお、各層の混晶比ｂ，ｃ
は、ＭｇａＺｎ１−ａＯを用いる場合と同様の思想にて
決定することができる。Instead of Mg a Zn 1-a O, Al
b In c Ga 1-b- c N ( However, 0 ≦ b ≦ 1,0 ≦
It is also possible to use c ≦ 1, 0 ≦ b + c ≦ 1). That is, the n-type clad layer 5, the active layer 6, and the p-type clad layer 7 are formed of Al b In c Ga in which the mixed crystal ratios b and c are adjusted.
1-b-c N. The mixed crystal ratios b and c of each layer
Can be determined by the same idea as in the case of using Mg a Zn 1-a O.

【００３９】以下、本発明の可視光発光装置の変形例に
ついて説明する。図２の可視光発光装置１も、ｎ型クラ
ッド層５、活性層６及びｐ型クラッド層７がこの順序に
て積層された発光層部８を有する。ｐ型クラッド層７と
ｎ型クラッド層５との第一主表面Ｐ１側に位置するもの
を第一クラッド層７とし、第二主表面Ｐ２側に位置する
ものを第二クラッド層５として、発光層部８の第一主表
面Ｐ１に第一クラッド層７に導通する第一電極９が形成
されている。また、単結晶基板がＺｎＯあるいはＳｉＣ
からなる導電性基板２３とされ、導電性基板２３の発光
層８が形成されているのと反対側の主表面に、該導電性
基板２３を介して第二クラッド層５に導通する第二電極
４が形成されてなる。第二電極４は、Ａｇペースト等の
導電性ペースト層２５を介して、金属ケーシング１３の
底面に接続されている。このようにすると、光取出面側
となる第一主表面Ｐ１上に第二電極４の形成スペースを
確保しなくてもよく、その分、紫外線の発光主体となる
活性層６の面積も増えるので、可視光の発光強度をより
高めることができる。なお、図２において、図１と共通
の部分には同一の符号を付与し、詳細な説明を省略し
た。Modifications of the visible light emitting device of the present invention will be described below. The visible light emitting device 1 of FIG. 2 also has a light emitting layer portion 8 in which an n-type cladding layer 5, an active layer 6, and a p-type cladding layer 7 are laminated in this order. The p-type clad layer 7 and the n-type clad layer 5 located on the first main surface P1 side are the first clad layer 7, and the one located on the second main surface P2 side are the second clad layer 5, which emit light. A first electrode 9 that is electrically connected to the first cladding layer 7 is formed on the first main surface P1 of the layer portion 8. In addition, the single crystal substrate is ZnO or SiC
And a second electrode electrically connected to the second cladding layer 5 through the conductive substrate 23 on the main surface of the conductive substrate 23 on the side opposite to where the light emitting layer 8 is formed. 4 are formed. The second electrode 4 is connected to the bottom surface of the metal casing 13 via a conductive paste layer 25 such as Ag paste. By doing so, it is not necessary to secure a space for forming the second electrode 4 on the first main surface P1 that is the light extraction surface side, and the area of the active layer 6 that mainly emits ultraviolet rays increases accordingly. The emission intensity of visible light can be further increased. In FIG. 2, the same parts as those in FIG. 1 are assigned the same reference numerals and detailed explanations thereof are omitted.

【００４０】次に、図５に示すように、半導体紫外線発
光素子（以下、単に発光素子ともいう）２０１からの紫
外線を、基体２０９（ここでは、透明基板としている：
以下、透明基板２０９ともいう）上に形成された素子外
発光層をなす可視光発光膜２１０のみに照射するように
構成することもできる。装置の発光部分の形状は、基体
２０９の形状に応じて自由に選択することができ、種々
の目的に応じて装置外観形態を柔軟に設計できる利点が
ある。例えば、図６の発光装置２５０では、基体２０９
及び可視光発光膜２１０がいずれも平面的に形成されて
いる。これは、省スペース化に大きく寄与する。例え
ば、基体２０９を薄板状に形成し、これに可視光発光膜
２１０を形成する形とすれば、発光層部が本来非常に薄
くできるため、図８に示すように極薄型（例えば厚さｔ
ｄが１０ｍｍ以下あるいは５ｍｍ以下のようなもの；場
合によっては１ｍｍ程度まで薄型化することも可能であ
る）で光輝度の発光装置２５１を実現することが可能で
ある。また、用途に応じて、図９に示すように、曲面状
の基体２０９を用いることもできる。Next, as shown in FIG. 5, ultraviolet rays from a semiconductor ultraviolet light emitting element (hereinafter, also simply referred to as a light emitting element) 201 are used as a base 209 (here, a transparent substrate:
In the following, it may be configured such that only the visible light emitting film 210 forming the extra-element light emitting layer formed on the transparent substrate 209) is irradiated. The shape of the light emitting portion of the device can be freely selected according to the shape of the base 209, and there is an advantage that the appearance form of the device can be flexibly designed according to various purposes. For example, in the light emitting device 250 of FIG.
The visible light emitting film 210 and the visible light emitting film 210 are both formed flat. This greatly contributes to space saving. For example, if the base 209 is formed in a thin plate shape and the visible light emitting film 210 is formed on the base 209, the light emitting layer portion can be made extremely thin, and as shown in FIG.
It is possible to realize the light emitting device 251 having a light brightness with d of 10 mm or less or 5 mm or less; it is possible to reduce the thickness to about 1 mm in some cases. A curved base 209 may be used as shown in FIG. 9 depending on the application.

【００４１】図６、図８及び図９に示す発光装置２５
０、２５１及び２５２は、個々の構成要素は形状の違い
を除いて共通しているので、以下、より詳しい構造に付
き、図６の発光装置２５０で代表させて説明する。ま
ず、発光素子２０１は複数個設けられ、各発光素子２０
１からの紫外線により、対応する可視光発光膜２１０を
発光させるようにしている。このようにすることで、装
置の発光面積を容易に大型化できる利点がある。この本
発光装置２５０は、複数の発光素子２０１により、対応
する可視光発光膜を同時発光させる照明装置として構成
されており、大面積で薄型かつ長寿命の照明装置が実現
されている。The light emitting device 25 shown in FIGS. 6, 8 and 9.
0, 251, and 252 have the same individual constituent elements except for the difference in shape. Therefore, a detailed structure will be described below by using the light emitting device 250 of FIG. 6 as a representative. First, a plurality of light emitting elements 201 are provided, and each light emitting element 20
The corresponding visible light emitting film 210 is made to emit light by the ultraviolet light from 1. By doing so, there is an advantage that the light emitting area of the device can be easily increased. The main light emitting device 250 is configured as a lighting device that simultaneously emits light from corresponding visible light emitting films by a plurality of light emitting elements 201, and realizes a large area, thin, and long-life lighting device.

【００４２】なお、可視光発光膜２１０は、複数の発光
素子２０１に対応する部分２１０ａが、横方向に連なっ
て一体に形成されているが、このようにすれば可視光発
光膜部分２１０ａを単一の可視光発光膜２１０として一
括形成できるので製造が容易である。この場合、可視光
発光膜部分２１０ａを発光素子２０１により覆われる部
分と考えたとき、発光素子２０１と可視光発光膜部分２
１０ａとの距離関係により、発光素子２０１からの紫外
線が外方に広がって可視光発光膜部分２１０ａの外側に
漏れ出し、結果的に可視光発光膜部分２１０ａよりも広
い領域で発光を生じさせることも可能である。従って、
可視光発光膜２１０と発光素子２０１との距離を適当に
調整することによって、隣接する発光素子２０１，２０
１間に多少の隙間ができていても、個々の発光素子２０
１，２０１からの紫外線による可視光発光膜２１０の可
視光発光領域が互いに接続され、可視光発光膜２１０の
全面に渡ってムラの少ない均一な発光を生じさせること
ができるようになる。In the visible light emitting film 210, the portions 210a corresponding to the plurality of light emitting elements 201 are integrally formed so as to be continuous in the lateral direction. In this way, the visible light emitting film portion 210a is formed as a single unit. Since it is possible to collectively form one visible light emitting film 210, manufacturing is easy. In this case, when the visible light emitting film portion 210a is considered as a portion covered by the light emitting element 201, the light emitting element 201 and the visible light emitting film portion 2 are considered.
Due to the distance relationship with 10a, the ultraviolet rays from the light emitting element 201 spread outward and leak to the outside of the visible light emitting film portion 210a, and as a result, emit light in a wider area than the visible light emitting film portion 210a. Is also possible. Therefore,
By appropriately adjusting the distance between the visible light emitting film 210 and the light emitting element 201, the adjacent light emitting elements 201, 20
Even if there are some gaps between the individual light emitting elements 20,
The visible light emitting regions of the visible light emitting film 210 due to ultraviolet rays from 1, 201 are connected to each other, and uniform light emission with less unevenness can be generated over the entire surface of the visible light emitting film 210.

【００４３】発光装置２５０においては、基体をなす透
明基板２０９の片面に可視光発光膜２１０が形成されて
いる。これと反対側の面に発光素子２０１の光取出し面
が対向するように配置され（ここでは密着して配置され
ている）、透明基板２０９を介して可視光発光膜２１０
に発光素子２０１（半導体紫外線発光素子）からの紫外
線が照射されるようになっている。この構成によると、
透明基板２０９の両面を利用して発光素子２０１（半導
体紫外線発光素子）と可視光発光膜２１０とを振り分け
て配置することができ、装置のコンパクト化と構成の簡
略化とを図る上で一層効果的である。In the light emitting device 250, the visible light emitting film 210 is formed on one surface of the transparent substrate 209 which is the base. The light extraction surface of the light emitting element 201 is arranged so as to face the surface on the opposite side (here, it is arranged in close contact), and the visible light emitting film 210 is interposed via the transparent substrate 209.
Ultraviolet rays from the light emitting element 201 (semiconductor ultraviolet light emitting element) are irradiated to the above. According to this configuration,
The light emitting element 201 (semiconductor ultraviolet light emitting element) and the visible light emitting film 210 can be separately arranged by using both surfaces of the transparent substrate 209, which is further effective in achieving compactness of the device and simplification of the configuration. Target.

【００４４】なお、透明基板２０９はガラス板や透明プ
ラスチック（例えばアクリル樹脂など）を使用できる。
発光素子２０１は透明基板２０９に対し、光取出し面側
を例えば接着剤等により貼り付けて配置することができ
るが、例えばガラス板を用いる場合は、発光素子２０１
の発光層部を該ガラス板上に成長させることも可能であ
る。なお、個々の発光素子２０１，２０１による可視光
発光膜２１０の可視光発光領域を互いに接続したい場合
は、このような接続が生ずる程度に紫外線が広がるよ
う、透明基板２０９の厚さを調整しておけばよい。逆
に、発光素子２０１を可視光発光膜２１０に近づけるほ
ど紫外線の広がりが少なくなり、個々の発光素子２０１
を画素とする表示装置等へ応用する場合は、画素の鮮明
化等において有利となる。As the transparent substrate 209, a glass plate or transparent plastic (eg acrylic resin) can be used.
The light emitting element 201 can be arranged by adhering the light extraction surface side to the transparent substrate 209 with, for example, an adhesive agent. When a glass plate is used, for example, the light emitting element 201 is used.
It is also possible to grow the light emitting layer portion of the above on the glass plate. When it is desired to connect the visible light emitting regions of the visible light emitting film 210 by the individual light emitting elements 201, 201 to each other, the thickness of the transparent substrate 209 is adjusted so that the ultraviolet rays spread to the extent that such a connection occurs. You can leave it. On the contrary, the closer the light emitting element 201 is to the visible light emitting film 210, the smaller the spread of the ultraviolet rays becomes, and the individual light emitting element 201
When it is applied to a display device or the like having pixels as pixels, it is advantageous in sharpening the pixels.

【００４５】図６の発光装置２５０においては、可視光
発光膜２１０の表面が透明プラスチック等で構成された
透明保護層２１１により覆われている。また、透明基板
２０９の発光素子２０１の配置側を光分散板２１２で覆
っている。なお、ムラの少ない均一な発光を生じさせる
ための別の方法としては、図７に示すように、光分散板
２１２を介して光を取り出すようにする構成も可能であ
る。本実施形態では、可視光発光膜２１０と光分散板２
１２との間に透明保護層２１１を設けている。In the light emitting device 250 of FIG. 6, the surface of the visible light emitting film 210 is covered with the transparent protective layer 211 made of transparent plastic or the like. Further, the side of the transparent substrate 209 on which the light emitting element 201 is arranged is covered with a light dispersion plate 212. As another method for producing uniform light emission with little unevenness, a configuration in which light is extracted via the light dispersion plate 212 as shown in FIG. 7 is also possible. In this embodiment, the visible light emitting film 210 and the light dispersion plate 2 are used.
The transparent protective layer 211 is provided between the transparent protective layer 211 and the transparent protective layer 211.

【００４６】なお、複数の発光素子２０１への通電配線
は、種々の構成形態が可能であるが、以下、いくつかの
例を示す。図１０は本発明の可視光発光装置を薄型の照
明装置２６０として構成したもので、アクリル板等の透
明板７４の裏面側に可視光発光膜１０を形成し、その上
に、図２７に示す発光素子１０５（ガラス基板９を用い
たもの：製造方法は図２８を用いてすでに説明した）
を、複数個接着剤を用いて貼り付けてある（発光層部の
厚さを誇張して描いてあり、実際にはもっと薄い）。そ
して、各素子１０５の電極１３及び２２に対し、通電配
線７１，７２と電極端子１３ａ，２２ａを形成した配線
板を重ね合わせて全体をケース７３によりモールドして
いる（本実施形態では、配線板がモールド用のケース７
３の一部に兼用されている）。そして、ケース７３に
は、通電配線７１，７２の末端を取り出す形でコネクタ
７５が形成されている。ここに電源７６を接続すること
で、各素子１０５が通電される。The current-carrying wiring to the plurality of light-emitting elements 201 can have various configurations, but some examples will be shown below. FIG. 10 shows the visible light emitting device of the present invention configured as a thin lighting device 260. The visible light emitting film 10 is formed on the back side of a transparent plate 74 such as an acrylic plate, and the visible light emitting film 10 is formed thereon as shown in FIG. Light emitting element 105 (using glass substrate 9: manufacturing method has already been described with reference to FIG. 28)
Are attached by using an adhesive (the thickness of the light emitting layer is exaggerated in the drawing, and it is actually thinner). Then, the electrodes 13 and 22 of each element 105 are overlapped with the wiring boards on which the conductive wirings 71 and 72 and the electrode terminals 13a and 22a are formed, and the whole is molded by the case 73 (in the present embodiment, the wiring board is formed). Is a case for molding 7
It is also used as a part of 3. A connector 75 is formed on the case 73 in such a manner that the ends of the energizing wirings 71 and 72 are taken out. By connecting the power supply 76 to this, each element 105 is energized.

【００４７】なお、電源７６としては直流電源を用いる
ことができるが、交流を整流したのみの脈流にて駆動す
ることも可能であり、さらに、半波波形となることが問
題にならなければ、交流電源にて直接駆動することも可
能である。Although a DC power supply can be used as the power supply 76, it can also be driven by a pulsating current obtained by only rectifying AC, and if a half-wave waveform is not a problem. It is also possible to drive directly with an AC power supply.

【００４８】また、従来の蛍光ランプの場合、調光機能
を付加するには、電極保温と交流位相制御とを同時に行
なう必要があったため回路構成の複雑化が避けがたく、
高級な照明設備以外には搭載しにくい事情があった（な
お、直列インピーダンス切り換えにより調光を行なうも
のもあるが、非常に不経済である）。しかしながら、上
記の照明装置２６０によれば、発光素子１０５への供給
電圧を変化させる方式、あるいはデューティ比制御によ
り平均電流を変化させる方式等により、複雑な回路構成
を用いなくとも簡単に調光を行なうことができる利点が
ある。In addition, in the case of the conventional fluorescent lamp, in order to add the dimming function, it was necessary to simultaneously perform the electrode heat retention and the AC phase control, and thus the circuit structure was unavoidably complicated.
There was a situation where it was difficult to install other than high-class lighting equipment (it is very uneconomical though there are some that perform dimming by switching the series impedance). However, according to the illumination device 260 described above, dimming can be easily performed without using a complicated circuit configuration by a method of changing the supply voltage to the light emitting element 105 or a method of changing the average current by controlling the duty ratio. There is an advantage that can be done.

【００４９】次に、図１１は、ガラス基板２０９上に発
光素子１０６の発光層部５３，５４，５２を成長させた
タイプの照明装置２６１を示すものである。ガラス基板
２０９の片面に可視光発光膜２１０及び透明保護膜２１
１を形成し、反対側には、各発光素子１０６の形成領域
に対応する形で、ＩＴＯ等の透明導電材料からなる電極
層２２０のパターンを、フォトリソグラフィー等を用い
て形成する。そして、その上に、例えば適当なバッファ
層２２１を介して全酸化物型の発光層部５４，５３，５
２を順次形成し、次いで各電極層２２０の一部が露出す
るように化学エッチングによりパターニングして、個々
の素子１０６の発光層部に分離する。最後に、それら発
光層部のそれぞれに金属反射膜２２を形成し、必要な配
線部７１，７２を設ければ、照明装置２６２が完成す
る。Next, FIG. 11 shows an illuminating device 261 of the type in which the light emitting layer portions 53, 54, 52 of the light emitting element 106 are grown on the glass substrate 209. The visible light emitting film 210 and the transparent protective film 21 are formed on one surface of the glass substrate 209.
1 is formed, and on the opposite side, a pattern of the electrode layer 220 made of a transparent conductive material such as ITO is formed by photolithography or the like so as to correspond to the formation region of each light emitting element 106. Then, on top of that, for example, an appropriate buffer layer 221 is provided, and all the oxide type light emitting layer portions 54, 53, 5 are provided.
2 are sequentially formed, and then patterned by chemical etching so that a part of each electrode layer 220 is exposed to separate the light emitting layer portions of the individual elements 106. Finally, the metal reflection film 22 is formed on each of the light emitting layer portions, and the required wiring portions 71 and 72 are provided, whereby the lighting device 262 is completed.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の、素子上発光膜を用いる可視光発光装
置の第一実施形態を示す模式図。FIG. 1 is a schematic diagram showing a first embodiment of a visible light emitting device using an on-element light emitting film of the present invention.

【図２】本発明の、素子上発光膜を用いる可視光発光装
置の第二実施形態を示す模式図。FIG. 2 is a schematic diagram showing a second embodiment of a visible light emitting device using an on-element light emitting film of the present invention.

【図３】本発明の可視光発光装置に使用する可視光発光
膜の組織構造を推定して示す模式図。FIG. 3 is a schematic diagram showing an estimated tissue structure of a visible light emitting film used in the visible light emitting device of the present invention.

【図４】素子外発光膜の作用説明図。FIG. 4 is an explanatory view of the action of the light emitting film outside the device.

【図５】本発明の、素子外発光膜を用いる可視光発光装
置の第一実施形態を示す模式図。FIG. 5 is a schematic view showing a first embodiment of a visible light emitting device using an extra-element light emitting film of the present invention.

【図６】本発明の、素子外発光膜を用いる可視光発光装
置の第二実施形態を示す模式図。FIG. 6 is a schematic view showing a second embodiment of a visible light emitting device using an extra-element light emitting film of the present invention.

【図７】本発明の、素子外発光膜を用いる可視光発光装
置の第三実施形態を示す模式図。FIG. 7 is a schematic diagram showing a third embodiment of a visible light emitting device using an extra-element light emitting film of the present invention.

【図８】本発明の、素子外発光膜を用いる可視光発光装
置の第四実施形態を示す模式図。FIG. 8 is a schematic view showing a fourth embodiment of a visible light emitting device using an extra-element light emitting film of the present invention.

【図９】本発明の、素子外発光膜を用いる可視光発光装
置の第五実施形態を示す模式図。FIG. 9 is a schematic diagram showing a fifth embodiment of a visible light emitting device using an extra-element light emitting film of the present invention.

【図１０】本発明の、素子外発光膜を用いる可視光発光
装置の第六実施形態を示す模式図。FIG. 10 is a schematic diagram showing a sixth embodiment of a visible light emitting device using an extra-element light emitting film of the present invention.

【図１１】本発明の、素子外発光膜を用いる可視光発光
装置の第七実施形態を示す模式図。FIG. 11 is a schematic view showing a seventh embodiment of a visible light emitting device using an extra-element light emitting film of the present invention.

【図１２】可視光発光膜を製造するための高周波スパッ
タリング装置の概念図。FIG. 12 is a conceptual diagram of a high frequency sputtering apparatus for manufacturing a visible light emitting film.

【図１３】可視光発光膜を製造するためのターゲットの
構成例を示す模式図。FIG. 13 is a schematic diagram showing a configuration example of a target for manufacturing a visible light emitting film.

【符号の説明】[Explanation of symbols]

１ 可視光発光装置 ２，２０１ 半導体紫外線発光素子 ３，２３ 単結晶基板 ５ ｎ型クラッド層（第二クラッド層） ６ 活性層 ７ ｐ型クラッド層（第一クラッド層） ８ 発光層部 Ｐ１ 第一主表面 Ｐ２ 第二主表面 ９ 第一電極 １０ 素子上発光膜（可視光発光膜） １１ 第二電極 １３ 金属ケーシング（基体） １４，２１０ 素子外発光膜（可視光発光膜） ２５０〜２５２，２６０，２６１ 可視光発光装置（照
明装置）1 Visible Light Emitting Device 2, 201 Semiconductor Ultraviolet Light Emitting Element 3, 23 Single Crystal Substrate 5 n-Type Clad Layer (Second Clad Layer) 6 Active Layer 7 p-Type Clad Layer (First Clad Layer) 8 Light Emitting Layer Part P1 First Main surface P2 Second main surface 9 First electrode 10 Light emitting film on element (visible light emitting film) 11 Second electrode 13 Metal casing (base) 14,210 Light emitting film outside element (visible light emitting film) 250 to 252, 260 , 261 Visible light emitting device (illumination device)

Claims (10)

【特許請求の範囲】[Claims] 【請求項１】 ＭｇａＺｎ１−ａＯ（ただし、０≦ａ≦
１）又はＡｌｂＩｎ ｃＧａ１−ｂ−ｃＮ（ただし、０≦
ｂ≦１、０≦ｃ≦１、０≦ｂ＋ｃ≦１）からなる発光層
部を有した半導体紫外線発光素子と、 ＳｉＯ２とＳｉとの混合スパッタ膜からなり、前記半導
体紫外線発光素子からの紫外線照射を受けて可視光を発
光する可視光発光膜と、 を有することを特徴とする可視光発光装置。1. MgaZn1-aO (however, 0 ≦ a ≦
1) or AlbIn cGa1-bcN (however, 0 ≦
b ≦ 1, 0 ≦ c ≦ 1, 0 ≦ b + c ≦ 1)
A semiconductor ultraviolet light emitting device having a portion, SiOTwoConsisting of a mixed sputtered film of Si and Si,
Visible light is emitted from the ultraviolet light emitted from the body ultraviolet light emitting element.
A visible light emitting film that shines; A visible light emitting device comprising: 【請求項２】 前記可視光発光膜は、スパッタリングに
使用するターゲットとして、ターゲット全面積に占める
Ｓｉターゲット部分の面積率が５％以上２５％以下であ
り、残部がＳｉＯ２ターゲット部分とされたものを用い
て、ＳｉとＳｉＯ２とを同時に高周波スパッタリングす
ることにより形成されたものである請求項１記載の可視
光発光装置。2. The visible light emitting film as a target used for sputtering, wherein the area ratio of the Si target portion to the entire target area is 5% or more and 25% or less, and the balance is the SiO 2 target portion. The visible light emitting device according to claim 1, which is formed by simultaneously high-frequency sputtering Si and SiO 2 using. 【請求項３】 ＭｇａＺｎ１−ａＯ（ただし、０≦ａ≦
１）又はＡｌｂＩｎ ｃＧａ１−ｂ−ｃＮ（ただし、０≦
ｂ≦１、０≦ｃ≦１、０≦ｂ＋ｃ≦１）からなる発光層
部を有した半導体紫外線発光素子と、 ＳｉＯ２相とＳｉ相との膜面内における平均形成間隔が
紫外線波長以下となるように、ＳｉＯ２相中にＳｉ相が
分散形成された構造を有し、前記半導体紫外線発光素子
からの紫外線照射を受けて可視光を発光する可視光発光
膜と、 を有することを特徴とする可視光発光装置。3. MgaZn1-aO (however, 0 ≦ a ≦
1) or AlbIn cGa1-bcN (however, 0 ≦
b ≦ 1, 0 ≦ c ≦ 1, 0 ≦ b + c ≦ 1)
A semiconductor ultraviolet light emitting device having a portion, SiOTwoThe average formation interval between the Si phase and the Si phase in the film plane is
SiO to keep the wavelength below the UV wavelengthTwoSi phase in the phase
The semiconductor ultraviolet light emitting device having a dispersed structure
Visible light emission that emits visible light when irradiated with ultraviolet light from
A membrane, A visible light emitting device comprising: 【請求項４】 前記半導体紫外線発光素子の少なくとも
一方の主表面に、前記可視光発光膜を素子上発光膜とし
て形成してなることを特徴とする請求項１ないし３のい
ずれか１項に記載の可視光発光装置。4. The visible light emitting film is formed as an on-device light emitting film on at least one main surface of the semiconductor ultraviolet light emitting device, according to any one of claims 1 to 3. Visible light emitting device. 【請求項５】 前記発光層部は、単結晶基板上にヘテロ
エピタキシャル成長されたものであり、前記発光層部の
前記単結晶基板に接している主表面を第二主表面とし、
これと反対側の主表面を第一主表面として、前記第一主
表面の一部領域を覆うように前記発光層部に導通する電
極が形成され、前記第一主表面の前記電極以外の領域が
前記素子上発光膜にて覆われていることを特徴とする請
求項４記載の可視光発光装置。5. The light emitting layer portion is heteroepitaxially grown on a single crystal substrate, and the main surface of the light emitting layer portion in contact with the single crystal substrate is a second main surface,
An electrode that is electrically connected to the light emitting layer portion is formed so as to cover a partial area of the first main surface with the main surface on the opposite side as the first main surface, and the area other than the electrode of the first main surface. 5. The visible light emitting device according to claim 4, wherein is covered with the light emitting film on the element. 【請求項６】 前記発光層部は、ｎ型クラッド層、活性
層及びｐ型クラッド層がこの順序にて積層されたもので
あり、 前記ｐ型クラッド層と前記ｎ型クラッド層との前記第一
主表面側に位置するものを第一クラッド層とし、前記第
二主表面側に位置するものを第二クラッド層として、 前記第一主表面には、前記第一クラッド層に導通する第
一電極が形成され、 また、前記第一主表面には、記第一クラッド層と前記活
性層との一部を切り欠く形で、前記第二クラッド層の露
出領域が形成され、該露出領域にて前記第二クラッド層
に導通する第二電極が形成されてなることを特徴とする
請求項５記載の可視光発光装置。6. The light emitting layer portion is formed by laminating an n-type clad layer, an active layer and a p-type clad layer in this order, and the p-type clad layer and the n-type clad layer The one located on one main surface side is the first cladding layer, the one located on the second main surface side is the second cladding layer, and the first main surface is electrically connected to the first cladding layer. An electrode is formed, and an exposed region of the second clad layer is formed on the first main surface in a form of a part of the first clad layer and the active layer being cut out, and the exposed region is formed in the exposed region. The visible light emitting device according to claim 5, wherein a second electrode is formed so as to be electrically connected to the second cladding layer. 【請求項７】 前記発光層部は、ｎ型クラッド層、活性
層及びｐ型クラッド層がこの順序にて積層されたもので
あり、 前記ｐ型クラッド層と前記ｎ型クラッド層との前記第一
主表面側に位置するものを第一クラッド層とし、前記第
二主表面側に位置するものを第二クラッド層として、 前記第一主表面には、前記第一クラッド層に導通する第
一電極が形成され、 また、前記単結晶基板が導電性基板とされ、前記導電性
基板の前記発光層が形成されているのと反対側の主表面
に、該導電性基板を介して前記第二クラッド層に導通す
る第二電極が形成されてなることを特徴とする請求項５
記載の可視光発光装置。7. The light emitting layer portion is formed by laminating an n-type clad layer, an active layer and a p-type clad layer in this order, and the p-type clad layer and the n-type clad layer The one located on one main surface side is the first cladding layer, the one located on the second main surface side is the second cladding layer, and the first main surface is electrically connected to the first cladding layer. An electrode is formed, the single crystal substrate is a conductive substrate, and the second surface is formed on the main surface of the conductive substrate on the side opposite to the side where the light emitting layer is formed. The second electrode which is electrically connected to the clad layer is formed.
The visible light emitting device described. 【請求項８】 前記半導体紫外線発光素子とは別に設け
られた基体上に、前記可視光発光膜を素子外発光膜とし
て形成し、該素子外発光膜に前記半導体紫外線発光素子
からの紫外線が照射されることを特徴とする請求項１な
いし７のいずれか１項に記載の可視光発光装置。8. The visible light emitting film is formed as an external light emitting film on a base provided separately from the semiconductor ultraviolet light emitting device, and the external light emitting film is irradiated with ultraviolet light from the semiconductor ultraviolet light emitting device. The visible light emitting device according to claim 1, wherein the visible light emitting device is provided. 【請求項９】 前記半導体紫外線発光素子の少なくとも
一方の主表面に前記可視光発光膜が素子上発光膜として
形成されてなり、 他方、前記素子外発光膜は、前記半導体紫外線発光素子
からの紫外線照射を受けるとともに、該照射により生じ
た可視光を、前記素子上発光膜からの可視光に重畳させ
て放出するものである請求項８記載の可視光発光装置。9. The visible light emitting film is formed as an on-device light emitting film on at least one main surface of the semiconductor ultraviolet light emitting device, and the external light emitting film is ultraviolet light from the semiconductor ultraviolet light emitting device. 9. The visible light emitting device according to claim 8, which is irradiated with the visible light, and emits the visible light generated by the irradiation by superimposing the visible light from the light emitting film on the element. 【請求項１０】 前記素子外発光膜の下地面をなす前記
基体の表面が、前記素子上発光膜からの可視光の反射面
とされてなる請求項９記載の可視光発光装置。10. The visible light emitting device according to claim 9, wherein the surface of the base body that forms the lower ground of the light emitting film outside the element is a reflection surface of visible light from the light emitting film above the element.
JP2002087054A 2002-03-26 2002-03-26 Visible light emitting device Pending JP2003282944A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002087054A JP2003282944A (en) 2002-03-26 2002-03-26 Visible light emitting device
PCT/JP2003/003703 WO2003081685A1 (en) 2002-03-26 2003-03-26 Visible light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002087054A JP2003282944A (en) 2002-03-26 2002-03-26 Visible light emitting device

Publications (1)

Publication Number Publication Date
JP2003282944A true JP2003282944A (en) 2003-10-03

Family

ID=28449350

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002087054A Pending JP2003282944A (en) 2002-03-26 2002-03-26 Visible light emitting device

Country Status (2)

Country Link
JP (1) JP2003282944A (en)
WO (1) WO2003081685A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014048699A1 (en) * 2012-09-25 2014-04-03 Osram Opto Semiconductors Gmbh Optoelectronic semiconductor component and method for producing said component
CN115616041A (en) * 2022-12-15 2023-01-17 太原理工大学 Gas sensor based on GaN-based QDs film and preparation method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102504814B (en) * 2011-10-20 2013-11-20 中国科学院上海硅酸盐研究所 Direct white light fluorescent material excited by ultraviolet light and preparation method and application thereof

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10145006A (en) * 1996-09-10 1998-05-29 Toshiba Corp Compound semiconductor device
JPH10214995A (en) * 1996-11-27 1998-08-11 Matsushita Electric Ind Co Ltd Optoelectronic material and its application device as well as manufacture of optoelectronic material
JPH10321906A (en) * 1997-05-16 1998-12-04 Seiwa Electric Mfg Co Ltd Light-emitting diode and display device using the same
JPH1146015A (en) * 1997-07-28 1999-02-16 Nichia Chem Ind Ltd Light-emitting diode and its manufacture
JPH1187778A (en) * 1997-09-02 1999-03-30 Toshiba Corp Semiconductor light emitting element, semiconductor light emitting device and manufacture thereof
JPH11510968A (en) * 1996-06-11 1999-09-21 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Visible light emitting display including ultraviolet light emitting diode and ultraviolet excited visible light emitting phosphor and method of manufacturing the device
WO1999050916A1 (en) * 1998-04-01 1999-10-07 Massachusetts Institute Of Technology Quantum dot white and colored light emitting diodes
WO2000016411A1 (en) * 1998-09-10 2000-03-23 Rohm Co., Ltd. Semiconductor light-emitting device and method for manufacturing the same
JP2000347601A (en) * 1999-06-02 2000-12-15 Toshiba Electronic Engineering Corp Light emitting device
JP2001040348A (en) * 1999-07-28 2001-02-13 Keiogijuku Silicon nanocrystal light-emitting element and its production
JP2002084002A (en) * 2000-09-06 2002-03-22 Nippon Leiz Co Ltd Light source device

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11510968A (en) * 1996-06-11 1999-09-21 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Visible light emitting display including ultraviolet light emitting diode and ultraviolet excited visible light emitting phosphor and method of manufacturing the device
JPH10145006A (en) * 1996-09-10 1998-05-29 Toshiba Corp Compound semiconductor device
JPH10214995A (en) * 1996-11-27 1998-08-11 Matsushita Electric Ind Co Ltd Optoelectronic material and its application device as well as manufacture of optoelectronic material
JPH10321906A (en) * 1997-05-16 1998-12-04 Seiwa Electric Mfg Co Ltd Light-emitting diode and display device using the same
JPH1146015A (en) * 1997-07-28 1999-02-16 Nichia Chem Ind Ltd Light-emitting diode and its manufacture
JPH1187778A (en) * 1997-09-02 1999-03-30 Toshiba Corp Semiconductor light emitting element, semiconductor light emitting device and manufacture thereof
WO1999050916A1 (en) * 1998-04-01 1999-10-07 Massachusetts Institute Of Technology Quantum dot white and colored light emitting diodes
WO2000016411A1 (en) * 1998-09-10 2000-03-23 Rohm Co., Ltd. Semiconductor light-emitting device and method for manufacturing the same
JP2000347601A (en) * 1999-06-02 2000-12-15 Toshiba Electronic Engineering Corp Light emitting device
JP2001040348A (en) * 1999-07-28 2001-02-13 Keiogijuku Silicon nanocrystal light-emitting element and its production
JP2002084002A (en) * 2000-09-06 2002-03-22 Nippon Leiz Co Ltd Light source device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014048699A1 (en) * 2012-09-25 2014-04-03 Osram Opto Semiconductors Gmbh Optoelectronic semiconductor component and method for producing said component
CN115616041A (en) * 2022-12-15 2023-01-17 太原理工大学 Gas sensor based on GaN-based QDs film and preparation method thereof

Also Published As

Publication number Publication date
WO2003081685A1 (en) 2003-10-02

Similar Documents

Publication Publication Date Title
EP3444855B1 (en) Semiconductor light emitting device
KR102460072B1 (en) Semiconductor light emitting device
US7687816B2 (en) Light emitting diode
EP1349217A1 (en) Light-emitting device and its manufacturing method and visible-light-emitting device
US8299701B2 (en) Lighting device having illumination, backlighting and display applications
US20050211991A1 (en) Light-emitting apparatus and illuminating apparatus
US20050110032A1 (en) Light-Emitting Diode and Semiconductor Light-Emitting Device
JP2006253336A (en) Light source device
TWI423420B (en) Radiation-emitting device
TW201044568A (en) Non-radiatively pumped wavelength converter
KR20120040550A (en) Semiconductor light emitting device and manufacturing method of the same
US20040227144A1 (en) Novel light-emitting device
US9564560B2 (en) Optoelectronic component
TW201205879A (en) Light emitting device
JP2004327719A (en) Light-emitting device
KR20200018949A (en) Smeiconductor device
EP2448015B1 (en) Semiconductor light emitting device
JP2003282944A (en) Visible light emitting device
EP1246262A2 (en) Light-emitting element
JP4275701B2 (en) Light emitting device and manufacturing method thereof
JP2001007401A (en) Compound semiconductor light emitting element
CN109564956B (en) Semiconductor device with a plurality of transistors
KR20200092694A (en) Semiconductor device
JP2019041109A (en) Semiconductor device
KR102631075B1 (en) Smeiconductor device

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080527

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20081006