JP2003110152A - Optical semiconductor device - Google Patents

Optical semiconductor device

Info

Publication number
JP2003110152A
JP2003110152A JP2001306349A JP2001306349A JP2003110152A JP 2003110152 A JP2003110152 A JP 2003110152A JP 2001306349 A JP2001306349 A JP 2001306349A JP 2001306349 A JP2001306349 A JP 2001306349A JP 2003110152 A JP2003110152 A JP 2003110152A
Authority
JP
Japan
Prior art keywords
emitting element
light emitting
semiconductor substrate
electrode
terminal electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001306349A
Other languages
Japanese (ja)
Other versions
JP3920613B2 (en
Inventor
Susumu Nishimura
晋 西村
Koji Kamiyama
孝二 上山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP2001306349A priority Critical patent/JP3920613B2/en
Publication of JP2003110152A publication Critical patent/JP2003110152A/en
Application granted granted Critical
Publication of JP3920613B2 publication Critical patent/JP3920613B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent the break of a light-emitting element of an optical semiconductor device due to an overvoltage such as static electricity and a reverse voltage without putting a limitation on the material of a semiconductor substrate. SOLUTION: The optical semiconductor device is provided with a semiconductor substrate 1 having an underside electrode 2, a terminal electrode 3 formed on the top of the semiconductor substrate 1 and a light-emitting element 4 having positive and negative surface electrodes 41a and 41b on different sides. The surface electrode 41a is connected to the terminal electrode 3. The resistance R of the semiconductor substrate 1 is set higher than the actuating resistance of the light-emitting element 4 and the potential of the surface electrode 41b of the light-emitting element 4 is set equal to that of the underside electrode 2 of the semiconductor substrate 1. A driving voltage is applied between a terminal T1 and a terminal T2 .

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は光半導体装置に関
し、より詳細には発光素子の静電耐圧を向上させた光半
導体装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device, and more particularly to an optical semiconductor device in which the electrostatic breakdown voltage of a light emitting element is improved.

【0002】[0002]

【従来の技術】窒化ガリウム系発光素子などの発光素子
は静電気などの逆方向過電圧(以下、「サージ」と記す
ことがある)に非常に弱く、比較的小さな静電気によっ
ても素子が破壊されてしまう。このため静電気対策とし
てこれまでから種々の方法が提案されている。代表的な
方法としてはツェナーダイオードを用いる方法がある。
ツェナーダイオードを用いた光半導体装置の縦断面図を
図8に、その回路図を図9に示す。
2. Description of the Related Art Light-emitting devices such as gallium nitride-based light-emitting devices are very vulnerable to reverse overvoltage (hereinafter also referred to as "surge") such as static electricity, and the device is destroyed by relatively small static electricity. . Therefore, various methods have been proposed as countermeasures against static electricity. A typical method is to use a Zener diode.
FIG. 8 shows a longitudinal sectional view of an optical semiconductor device using a Zener diode, and FIG. 9 shows a circuit diagram thereof.

【0003】図8の光半導体装置では、n型半導体基板
61の一部表面下にp型不純物の拡散層62を形成する
と共に、下面に電極2を形成している。そしてこの拡散
層62に接触するように第2の端子電極32を基板61
上に形成する一方、もう一つの電極である第1の端子電
極31も基板61上に形成している。そして、同一面側
に正・負の表面電極41a,41bを有する発光素子
4’を、正・負の表面電極41a,41bが第1の端子
電極31と第2の端子電極32とにそれぞれ接続するよ
うに固着している。発光素子4’の駆動電圧は端子T1
と端子T2との間に印加される。なお、端子T1から端子
2に電流が流れる方向を順電圧とする。
In the optical semiconductor device of FIG. 8, a p-type impurity diffusion layer 62 is formed under a partial surface of an n-type semiconductor substrate 61, and an electrode 2 is formed on the lower surface. Then, the second terminal electrode 32 is attached to the substrate 61 so as to come into contact with the diffusion layer 62.
While being formed on the upper side, the first terminal electrode 31, which is another electrode, is also formed on the substrate 61. Then, the light-emitting element 4'having positive / negative surface electrodes 41a, 41b on the same side is connected to the positive / negative surface electrodes 41a, 41b respectively to the first terminal electrode 31 and the second terminal electrode 32. It is stuck to do so. The driving voltage of the light emitting element 4'is terminal T 1
Is applied between the terminal and the terminal T 2 . The direction in which the current flows from the terminal T 1 to the terminal T 2 is the forward voltage.

【0004】このような従来の光半導体装置において正
常な順電圧が印加された場合には、ボンディングワイヤ
Wa−下面電極2−基板61−第1の端子電極31−発
光素子4’−第2の端子電極32−ボンディングワイヤ
Wbと電流が流れ発光素子4’が発光する。
In such a conventional optical semiconductor device, when a normal forward voltage is applied, the bonding wire Wa-the lower surface electrode 2-the substrate 61-the first terminal electrode 31-the light emitting element 4'-the second. A current flows through the terminal electrode 32-bonding wire Wb and the light emitting element 4 ′ emits light.

【0005】一方、静電気などにより順方向に過電圧が
印加された場合には、上記電流回路の他、ツェナーダイ
オード(n型半導体基板61−p型拡散層62)を介し
て下面電極2から第2の端子電極32へと流れる新たな
電流回路が形成されるため、過電圧による発光素子の破
壊が防止される。また、静電気などにより逆電圧が印加
された場合には、図9から理解されるように、ボンディ
ングワイヤWb−第2の端子電極32−p型拡散層62
−n型半導体基板61−下面電極2−ボンディングワイ
ヤWaと電流が流れる。この結果、発光素子4’に電流
は流れず発光素子の破壊が防止される。
On the other hand, when an overvoltage is applied in the forward direction due to static electricity or the like, in addition to the current circuit described above, a second Zener diode (n-type semiconductor substrate 61-p-type diffusion layer 62) is used to connect the lower electrode 2 to the second electrode. Since a new current circuit that flows to the terminal electrode 32 is formed, it is possible to prevent the light emitting element from being damaged by an overvoltage. When a reverse voltage is applied due to static electricity or the like, as understood from FIG. 9, the bonding wire Wb-the second terminal electrode 32-p type diffusion layer 62.
-N-type semiconductor substrate 61-Bottom surface electrode 2-Bonding wire Wa and current flow. As a result, current does not flow in the light emitting element 4'and destruction of the light emitting element is prevented.

【0006】[0006]

【発明が解決しようとする課題】このように、ツェナー
ダイオードを用いれば静電気による発光素子の破壊を有
効に防止できるものの、ツェナーダイオードを形成する
ためには半導体基板の材料に制限を受ける。このため、
発光素子の活性層での発熱を効率的に外部に放散するに
は熱伝導性の高い半導体基板材料を用いるのが望ましい
が、前記のツェナーダイオードを形成するためにこのよ
うな材料を用いることができなかった。また、半導体基
板61の抵抗成分R’が発光素子4’と直列接続された
形態をとるので、抵抗成分R’によって端子T1から端
子T2に加える順電圧が高くなってしまう。
Thus, although the use of the Zener diode can effectively prevent the destruction of the light emitting element due to static electricity, the material of the semiconductor substrate is limited to form the Zener diode. For this reason,
In order to efficiently dissipate heat generated in the active layer of the light emitting device to the outside, it is desirable to use a semiconductor substrate material having high thermal conductivity, but it is preferable to use such a material for forming the Zener diode. could not. Further, since the resistance component R ′ of the semiconductor substrate 61 is connected in series with the light emitting element 4 ′, the forward voltage applied from the terminal T 1 to the terminal T 2 becomes high due to the resistance component R ′.

【0007】本発明はこのような従来の問題に鑑みてな
されたものであり、ツェナーダイオードを形成せずに、
順方向に過電圧が印加された場合および逆電圧が印加さ
れた場合であっても発光素子が壊れない光半導体装置を
提供することをその主な目的とするものである。また、
発光素子の保護を行なうための構成によって順方向電圧
が増加することがない光半導体装置を提供することもそ
の目的の1つとするものである。
The present invention has been made in view of such conventional problems, and it is possible to form a zener diode without forming a zener diode.
It is a main object of the invention to provide an optical semiconductor device in which a light emitting element is not broken even when an overvoltage is applied in the forward direction and a reverse voltage is applied. Also,
It is also an object of the present invention to provide an optical semiconductor device in which the forward voltage does not increase due to the structure for protecting the light emitting element.

【0008】[0008]

【課題を解決するための手段】本発明によれば、下面に
電極が形成され半導体基板と、この半導体基板の上面に
形成された端子電極と、異なる面側に正・負の表面電極
を有する発光素子とを備え、前記表面電極のいずれか一
方を前記端子電極に接続し、前記半導体基板の抵抗値を
前記発光素子の作動時抵抗値よりも大きくし、且つ前記
端子電極と接続していない方の発光素子の表面電極と半
導体基板の下面の電極とを同電位とし、前記端子電極と
接続していない方の発光素子の表面電極と、前記端子電
極との間に駆動電圧を印加することを特徴とする光半導
体装置が提供される。
According to the present invention, a semiconductor substrate having an electrode formed on the lower surface, a terminal electrode formed on the upper surface of the semiconductor substrate, and positive and negative surface electrodes on different surface sides are provided. A light emitting element, one of the surface electrodes is connected to the terminal electrode, the resistance value of the semiconductor substrate is made larger than the operating resistance value of the light emitting element, and the surface electrode is not connected to the terminal electrode. The surface electrode of the other light emitting element and the electrode on the lower surface of the semiconductor substrate have the same potential, and a drive voltage is applied between the surface electrode of the light emitting element which is not connected to the terminal electrode and the terminal electrode. An optical semiconductor device is provided.

【0009】また本発明によれば、下面に電極が形成さ
れた半導体基板と、この半導体基板の上面に形成された
第1の端子電極と、同一面側に正・負の表面電極を有す
る発光素子とを備え、前記発光素子の表面電極のいずれ
か一方を第1の端子電極と接続し、前記半導体基板の抵
抗値を前記発光素子の作動時抵抗値よりも大きくし、且
つ第1の端子電極と接続していない方の発光素子の表面
電極と半導体基板の下面の電極とを同電位とし、第1の
端子電極と接続していない方の発光素子の表面電極と、
第1の端子電極との間に駆動電圧を印加することを特徴
とする光半導体装置が提供される。
Further, according to the present invention, a semiconductor substrate having an electrode formed on the lower surface thereof, a first terminal electrode formed on the upper surface of the semiconductor substrate, and positive and negative surface electrodes on the same surface side are provided. An element, one of the surface electrodes of the light emitting element is connected to a first terminal electrode, and the resistance value of the semiconductor substrate is larger than the operating resistance value of the light emitting element, and the first terminal The surface electrode of the light emitting element that is not connected to the electrode and the electrode on the lower surface of the semiconductor substrate have the same potential, and the surface electrode of the light emitting element that is not connected to the first terminal electrode,
An optical semiconductor device is provided which is characterized in that a driving voltage is applied between the first terminal electrode and the first terminal electrode.

【0010】ここで、前記半導体基板の上面に絶縁層を
介して第2の端子電極を形成し、前記発光素子の正・負
の表面電極を第1の端子電極と第2の端子電極とに接続
し、第1の端子電極と第2の端子電極との間に駆動電圧
を印可する構成としてもよい。
Here, a second terminal electrode is formed on the upper surface of the semiconductor substrate via an insulating layer, and the positive and negative surface electrodes of the light emitting element are used as the first terminal electrode and the second terminal electrode. Alternatively, the driving voltage may be applied between the first terminal electrode and the second terminal electrode by connecting them.

【0011】本発明の光半導体素子には発光素子として
窒化ガリウム系発光素子が好適に用いられる。またサー
ジによる発光素子の破壊を一層確実に防止する観点から
は、半導体基板の抵抗値は50〜15,000Ωの範囲
とするのが好ましい。
A gallium nitride-based light emitting device is preferably used as a light emitting device in the optical semiconductor device of the present invention. Further, from the viewpoint of more surely preventing the destruction of the light emitting element due to the surge, the resistance value of the semiconductor substrate is preferably in the range of 50 to 15,000Ω.

【0012】[0012]

【発明の実施の形態】本発明者等は、ツェナーダイオー
ドを用いずに静電気による発光素子の破壊を防ぐことが
できないか鋭意検討を重ねた結果、半導体基板の抵抗を
発光素子との関係において特定値とすることにより、正
常な順電圧が印加された場合には発光素子に電流が流れ
る一方、順方向に過電圧印加された場合には発光素子の
みならず半導体基板にも電流が流れ、また逆電圧が印加
された場合には半導体基板に電流が流れて発光素子の破
壊が防止できることを見出し本発明をなすに至った。す
なわち、本発明の大きな特徴の一つは、半導体基板の抵
抗値を発光素子の作動時抵抗よりも大きくしたことにあ
る。そしてもう一つの大きな特徴は、半導体基板上に形
成された端子電極と接続していない方の発光素子の表面
電極と、半導体基板の下面電極とを同電位としたことに
ある。このような構成により、本発明の光半導体装置で
は正常な順電圧が印加された場合には発光素子が発光
し、順方向に過電圧が印加された場合および逆電圧が印
加された場合には半導体基板を電流が流れ発光素子の破
壊が防止される。以下、図に基づいて本発明の光半導体
装置について説明する。
DETAILED DESCRIPTION OF THE INVENTION The inventors of the present invention have made extensive studies as to whether or not damage to a light emitting element due to static electricity can be prevented without using a Zener diode. As a result, the resistance of a semiconductor substrate is specified in relation to the light emitting element. By setting this value, current will flow to the light emitting element when a normal forward voltage is applied, while current will flow not only to the light emitting element but also to the semiconductor substrate when an overvoltage is applied in the forward direction, and vice versa. The inventors have found that when a voltage is applied, a current flows through the semiconductor substrate and the destruction of the light emitting element can be prevented, and the present invention has been completed. That is, one of the major features of the present invention is that the resistance value of the semiconductor substrate is made larger than the operating resistance of the light emitting element. Another major feature is that the surface electrode of the light emitting element which is not connected to the terminal electrode formed on the semiconductor substrate and the lower surface electrode of the semiconductor substrate have the same potential. With such a configuration, in the optical semiconductor device of the present invention, the light emitting element emits light when a normal forward voltage is applied, and when the overvoltage is applied in the forward direction and the reverse voltage is applied, the semiconductor A current flows through the substrate to prevent the light emitting element from being destroyed. The optical semiconductor device of the present invention will be described below with reference to the drawings.

【0013】図1は、第1の発明に係る光半導体装置の
一例を示す縦断面図である。図1の光半導体装置は、下
面電極2を備えた半導体基板1の上面に端子電極3が形
成され、この端子電極3上に、上・下面に負・正の表面
電極41a,41bが形成された発光素子4が導電性接
着剤Bで固着されている。そして、発光素子4の上面に
形成された表面電極41bと半導体基板1の下面電極2
とは配線Wb,Wcにより同電位とされている。なお、
半導体基板1の抵抗値は発光素子4の作動時抵抗値より
も大きく設定されている。
FIG. 1 is a vertical sectional view showing an example of an optical semiconductor device according to the first invention. In the optical semiconductor device of FIG. 1, a terminal electrode 3 is formed on the upper surface of a semiconductor substrate 1 having a lower surface electrode 2, and negative and positive surface electrodes 41a and 41b are formed on the upper and lower surfaces of the terminal electrode 3. The light emitting element 4 is fixed with a conductive adhesive B. Then, the surface electrode 41 b formed on the upper surface of the light emitting element 4 and the lower surface electrode 2 of the semiconductor substrate 1
And have the same potential by the wirings Wb and Wc. In addition,
The resistance value of the semiconductor substrate 1 is set to be larger than the operation resistance value of the light emitting element 4.

【0014】このような構成の光半導体装置では2つの
電流通過回路が形成される。一つは配線Wa−端子電極
3−表面電極41a−発光素子4−表面電極41b−配
線Wbと流れる第1電流通過回路である。もう一つは、
配線Wa−端子電極3−半導体基板1−下面電極2−配
線Wcと流れる第2電流通過回路である。回路的には、
発光素子4に半導体基板1(その抵抗値R)が並列接続
された形態をとる。
In the optical semiconductor device having such a structure, two current passing circuits are formed. One is a first current passage circuit that flows through the wiring Wa-the terminal electrode 3-the surface electrode 41a-the light emitting element 4-the surface electrode 41b-the wiring Wb. the other one is,
It is a second current passing circuit that flows through the wiring Wa-terminal electrode 3-semiconductor substrate 1-lower surface electrode 2-wiring Wc. In terms of circuit,
The semiconductor substrate 1 (its resistance value R) is connected in parallel to the light emitting element 4.

【0015】ここで端子T1をプラス側、端子T2をマイ
ナス側としてこの間に発光素子の駆動電圧が印加された
場合には、半導体基板1の抵抗値が発光素子4の作動時
抵抗値よりも大きいため、第1電流通過回路に電流が流
れて発光素子4が発光する。発光素子4に半導体基板1
が並列接続されているため、基板1によって発光素子4
の駆動電圧が上昇することは防止される。
Here, when the driving voltage of the light emitting element is applied with the terminal T 1 on the positive side and the terminal T 2 on the negative side during this period, the resistance value of the semiconductor substrate 1 is higher than the operating resistance value of the light emitting element 4. Is also large, a current flows through the first current passing circuit and the light emitting element 4 emits light. Semiconductor substrate 1 for light emitting element 4
Are connected in parallel, the light emitting element 4
Driving voltage is prevented from rising.

【0016】これに対して逆電圧が印加された場合、す
なわち端子T1をマイナス側、端子T2をプラス側として
電圧が印加された場合には、半導体基板1の抵抗に比べ
て発光素子4の抵抗が格段に高いため第2電流通過回路
に電流が流れる。これにより発光素子の破壊が防止され
るのである。また、半導体基板1の抵抗を選択すること
により順方向に過電圧が印加された場合に、発光素子4
のみならず半導体基板1へも電流を流すことができ発光
素子4の破壊を防止できる。
On the other hand, when a reverse voltage is applied, that is, when a voltage is applied with the terminal T 1 on the minus side and the terminal T 2 on the plus side, the light emitting element 4 is higher than the resistance of the semiconductor substrate 1. Since the resistance of is extremely high, current flows through the second current passing circuit. This prevents the light emitting element from being destroyed. Further, when an overvoltage is applied in the forward direction by selecting the resistance of the semiconductor substrate 1, the light emitting element 4
Not only can a current be applied to the semiconductor substrate 1, it is possible to prevent the light emitting element 4 from being destroyed.

【0017】半導体基板1の抵抗値Rは下記式(1)か
ら算出できるから、端子電極3が半導体基板1に直接接
触している面積Sおよび半導体基板1の厚さd、半導体
基板1の抵抗率kを変えることにより(図1を参照)、
発光素子4の作動時抵抗値よりも大きくなるように半導
体基板1の抵抗値Rを調整すればよい。
Since the resistance value R of the semiconductor substrate 1 can be calculated from the following equation (1), the area S in which the terminal electrode 3 is in direct contact with the semiconductor substrate 1, the thickness d of the semiconductor substrate 1, the resistance of the semiconductor substrate 1 By changing the rate k (see Figure 1),
The resistance value R of the semiconductor substrate 1 may be adjusted so as to be larger than the resistance value of the light emitting element 4 during operation.

【0018】R=k×(d/S)・・・・・・(1) 光半導体装置における半導体基板の抵抗値Rと発光素子
の静電耐圧との関係の一例を図2に示す。抵抗値Rを1
6,000Ω程度とした場合、静電耐圧は約110V程
度(図のA群)、抵抗値Rを5,000Ω程度とした場
合、静電耐圧は約170V前後となる(図のB群)。こ
の図から半導体基板の抵抗値Rを小さくすると静電耐圧
が大きくなることがわかる。発光素子の種類にもよるが
一般に発光素子の静電耐圧としては120V以上が望ま
れることから、抵抗値Rの上限値としては15,000
Ωが好ましい。一方、抵抗値Rが発光素子の作動時抵抗
値よりも小さいと、前記の第2電流通過回路を流れる電
流が大きくなり発光素子が発光しなくなるからその下限
値は50Ωが好ましい。
R = k × (d / S) (1) An example of the relationship between the resistance value R of the semiconductor substrate and the electrostatic breakdown voltage of the light emitting element in the optical semiconductor device is shown in FIG. Resistance value 1
When it is set to about 6,000Ω, the electrostatic breakdown voltage is about 110V (group A in the figure), and when the resistance value R is set to about 5,000Ω, the electrostatic breakdown voltage is about 170V (group B in the figure). From this figure, it can be seen that the electrostatic breakdown voltage increases as the resistance value R of the semiconductor substrate decreases. Although it is generally desired that the electrostatic breakdown voltage of the light emitting element is 120 V or more, depending on the type of the light emitting element, the upper limit value of the resistance value R is 15,000.
Ω is preferred. On the other hand, when the resistance value R is smaller than the operating resistance value of the light emitting element, the current flowing through the second current passing circuit increases and the light emitting element does not emit light. Therefore, the lower limit value is preferably 50Ω.

【0019】次に、第2の発明に係る光半導体装置につ
いて説明する。第2の発明に係る光半導体装置の第1の
発明に係る光半導体装置と異なる点は、第2の発明に係
る光半導体装置では、同一面側に正・負の表面電極を有
する発光素子を用いる点にある。そこでまず、同一面側
に正・負の表面電極を有する発光素子の一例として窒化
ガリウム系発光素子の構造を図3に示す。図3の発光素
子4’は、サファイヤ基板42の上に、GaNバッファ
層43、n型窒化ガリウム系化合物半導体層44、n型
Ga1−yAlyNクラッド層(0<y<1)45、n
型InzGa1−zN(0<z<1)活性層46、Mg
ドープp型Ga1−xAlxN(0<x<0.5)クラ
ッド層47、Mgドープp型GaNコンタクト層48が
順に積層された構造を有し、n型窒化ガリウム系化合物
半導体層44及びMgドープp型GaNコンタクト層4
8の表面にそれぞれAl及びAuからなる表面電極41
a,41bが形成されている。
Next, an optical semiconductor device according to the second invention will be described. The optical semiconductor device according to the second invention is different from the optical semiconductor device according to the first invention in that the optical semiconductor device according to the second invention includes a light emitting element having positive and negative surface electrodes on the same surface side. There is a point to use. Therefore, first, FIG. 3 shows a structure of a gallium nitride-based light emitting device as an example of a light emitting device having positive and negative surface electrodes on the same surface side. 3 includes a GaN buffer layer 43, an n-type gallium nitride-based compound semiconductor layer 44, an n-type Ga1-yAlyN cladding layer (0 <y <1) 45, n on a sapphire substrate 42.
Type InzGa1-zN (0 <z <1) active layer 46, Mg
It has a structure in which a doped p-type Ga1-xAlxN (0 <x <0.5) cladding layer 47 and a Mg-doped p-type GaN contact layer 48 are sequentially stacked, and includes an n-type gallium nitride-based compound semiconductor layer 44 and a Mg-doped p-type. -Type GaN contact layer 4
Surface electrodes 41 made of Al and Au respectively on the surface of No. 8
a and 41b are formed.

【0020】このような窒化ガリウム系発光素子4’は
例えば次のようにして作製される。サファイヤ基板42
を洗浄した後反応器内に配設し、キャリアガスとして水
素、原料ガスとしてアンモニアとトリメチルガリウム
(TMG)を反応器内に供給し510℃の成長温度でサ
ファイア基板42上にGaN層43を約200Åまで成
長させる。次に、TMGの供給を止めて1030℃まで
昇温した後、TMGとアンモニアガスを供給すると同時
にドーパントガスとしてシランガスを供給し、Siをド
ープしたn型GaN層44を4μm程度成長させる。次
に、原料ガスとしてTMGとトリメチルアルミニウム
(TMA)、アンモニアとを用い、ドーパントガスとし
てシランガスを反応器内に供給し800℃の成長温度で
Siドープn型Ga0.86Al0.14N層45を0.15μ
mまで成長させる。そして、原料ガス及びドーパントガ
スの供給を止めて、キャリアガスを窒素に切替えた後、
原料ガスとしてTMGとトリメチルインジウム(TM
I)、アンモニアとを用い、ドーパントガスとしてシラ
ンガスを用いて、Siドープn型In0.01Ga0.99N層
46を100Åまで成長させる。
Such a gallium nitride-based light emitting device 4'is manufactured, for example, as follows. Sapphire substrate 42
After cleaning the GaN layer 43 in the reactor, hydrogen as a carrier gas, ammonia and trimethylgallium (TMG) as a source gas are supplied into the reactor, and a GaN layer 43 is formed on the sapphire substrate 42 at a growth temperature of 510 ° C. Grow to 200Å. Next, after stopping the supply of TMG and raising the temperature to 1030 ° C., TMG and ammonia gas are supplied, and at the same time, silane gas is supplied as a dopant gas to grow the Si-doped n-type GaN layer 44 by about 4 μm. Next, TMG, trimethylaluminum (TMA), and ammonia were used as source gases, and silane gas was supplied as a dopant gas into the reactor, and the Si-doped n-type Ga 0.86 Al 0.14 N layer 45 was formed at a growth temperature of 800 ° C. 15μ
Grow to m. Then, after stopping the supply of the raw material gas and the dopant gas and switching the carrier gas to nitrogen,
TMG and trimethylindium (TM) as source gas
I), using ammonia and silane gas as a dopant gas, the Si-doped n-type In 0.01 Ga 0.99 N layer 46 is grown to 100 Å.

【0021】次に、原料ガスとドーパントガスの供給を
止めて1020℃まで昇温した後、原料ガスとしてTM
GとTMA、アンモニアを用い、ドーパントガスとして
Cp2Mgを用いて、p型Ga0.86Al0.14Nクラッド
層47を0.15μmまで成長させる。そして、TMA
の供給を止めてMgドープp型GaNコンタクト層48
を0.4μmまで成長させる。
Next, after stopping the supply of the raw material gas and the dopant gas and raising the temperature to 1020 ° C., TM is used as the raw material gas.
A p-type Ga 0.86 Al 0.14 N cladding layer 47 is grown to 0.15 μm using G, TMA, and ammonia, and Cp2Mg as a dopant gas. And TMA
Of the Mg-doped p-type GaN contact layer 48
Are grown to 0.4 μm.

【0022】その後、作製したウエハを反応容器から取
りだし、アニーリング装置で窒素雰囲気下700℃で2
0分間アニーリングを行い、p型Ga0.86Al0.14Nク
ラッド層45とp型GaNコンタクト層48の低抵抗化
を行う。そして、このウエハの片側をエッチングして図
3のようにn型GaN層44を露出させ、n型GaN層
44の表面にはAl電極41b、p型GaNコンタクト
層48の表面にはAu電極41aを形成し、500℃で
再度アニーリングを行い電極41a,41bと前記層4
8,44とをなじませる。そして最後に500μm×5
00μmに分割して発光素子4’としていた。
After that, the produced wafer is taken out from the reaction vessel, and is annealed at 700 ° C. for 2 hours in a nitrogen atmosphere.
Annealing is performed for 0 minutes to reduce the resistance of the p-type Ga 0.86 Al 0.14 N cladding layer 45 and the p-type GaN contact layer 48. Then, one side of this wafer is etched to expose the n-type GaN layer 44 as shown in FIG. 3, the Al electrode 41b is on the surface of the n-type GaN layer 44, and the Au electrode 41a is on the surface of the p-type GaN contact layer 48. And then annealing again at 500 ° C. to form the electrodes 41a and 41b and the layer 4
Blend in with 8,44. And finally 500μm × 5
It was divided into 00 μm to form a light emitting element 4 ′.

【0023】次に、このような発光素子4’を用いた光
半導体装置の一例を示す縦断面図を図4に示す。図4の
光半導体装置では、下面電極2を有する半導体基板1
(材料:SiC、抵抗率k:0.4Ω・cm、厚さd:
200μm)の表面に、端子電極31が形成されている
と共に、正・負の表面電極41a,41bが上面に形成
された発光素子4’が固着されている。そして端子電極
31と表面電極41bとは配線Wdで接続され、もう一
つの表面電極41aと半導体基板1の下面電極2とは配
線Wb、Wcにより同電位とされている。また、半導体
基板1の抵抗値Rは発光素子4’の作動時抵抗値よりも
大きく設定されている。
Next, FIG. 4 is a longitudinal sectional view showing an example of an optical semiconductor device using such a light emitting element 4 '. In the optical semiconductor device of FIG. 4, the semiconductor substrate 1 having the lower surface electrode 2 is provided.
(Material: SiC, resistivity k: 0.4 Ω · cm, thickness d:
The terminal electrode 31 is formed on the surface of 200 μm), and the light emitting element 4 ′ having the positive / negative surface electrodes 41a and 41b formed on the upper surface is fixed. The terminal electrode 31 and the surface electrode 41b are connected by a wiring Wd, and the other surface electrode 41a and the lower surface electrode 2 of the semiconductor substrate 1 are made to have the same potential by the wirings Wb and Wc. Further, the resistance value R of the semiconductor substrate 1 is set to be larger than the operating resistance value of the light emitting element 4 '.

【0024】このような構成の光半導体装置における電
流通過回路は、前記と同様に2つあり、その一つは配線
Wa−端子電極31−配線Wd−表面電極41b−発光
素子4’−表面電極41a−配線Wbと流れる第1電流
通過回路である。もう一つは、配線Wa−端子電極31
−半導体基板1−下面電極2−配線Wcと流れる第2電
流通過回路である。回路的には、発光素子4’に半導体
基板1(その抵抗値R)が並列接続された形態をとる。
There are two current passing circuits in the optical semiconductor device having such a structure as described above, and one of them is wiring Wa-terminal electrode 31-wiring Wd-surface electrode 41b-light emitting element 4'-surface electrode. 41a-a first current passage circuit that flows with the wiring Wb. The other is the wiring Wa-terminal electrode 31.
-Semiconductor substrate 1-lower surface electrode 2-wiring Wc and second current passing circuit. In terms of a circuit, the semiconductor substrate 1 (its resistance value R) is connected in parallel to the light emitting element 4 '.

【0025】ここで端子T1をプラス側、端子T2をマイ
ナス側としてこの間に発光素子4’の駆動電圧が印加さ
れた場合には、半導体基板1の抵抗値Rが発光素子4’
の作動時抵抗値よりも大きいため、第1電流通過回路に
電流が流れ発光素子4’が発光する。発光素子4’に半
導体基板1が並列接続されているため、基板1によって
発光素子4’の駆動電圧が上昇することは防止される。
Here, when the driving voltage of the light emitting element 4'is applied between the terminals T 1 on the positive side and the terminals T 2 on the negative side, the resistance value R of the semiconductor substrate 1 changes to the light emitting element 4 '.
Since the resistance value is larger than the operating resistance value, the current flows through the first current passing circuit and the light emitting element 4 ′ emits light. Since the semiconductor substrate 1 is connected in parallel to the light emitting element 4 ', the substrate 1 prevents the drive voltage of the light emitting element 4'from rising.

【0026】これに対して逆電圧が印加された場合、す
なわち端子T1をマイナス側、端子T2をプラス側として
電圧が印加された場合には、半導体基板1の抵抗に比べ
て発光素子4’の抵抗が格段に高いため第2電流通過回
路に電流が流れ、これにより発光素子4’の破壊が防止
される。また、半導体基板1の抵抗を選択することによ
り順方向に過電圧が印加された場合に、発光素子4のみ
ならず半導体基板1へも電流を流すことができ発光素子
4’の破壊を防止できる。
On the other hand, when a reverse voltage is applied, that is, when a voltage is applied with the terminal T 1 on the minus side and the terminal T 2 on the plus side, the light emitting element 4 is higher than the resistance of the semiconductor substrate 1. Since the resistance of'is extremely high, a current flows through the second current passage circuit, which prevents the light emitting element 4'from being destroyed. Further, by selecting the resistance of the semiconductor substrate 1, when an overvoltage is applied in the forward direction, a current can be passed not only to the light emitting element 4 but also to the semiconductor substrate 1 and the light emitting element 4'can be prevented from being destroyed.

【0027】第2の発明に係る光半導体装置の他の例を
示す縦断面図を図5に示す。図5の光半導体装置は、下
面電極2を有する半導体基板1(材料:n−Si、抵抗
率k:0.4Ω・cm、厚さd:200μm)の表面に
2つの端子電極31,32が形成されている。一方の端
子電極(第1の端子電極)31は半導体基板1表面に直
接形成され、もう一方の端子電極(第2の端子電極)3
2は絶縁層5を介して半導体基板1上に形成されてい
る。そして、図3の発光素子4’を上下反対にして、発
光素子4’の2つの表面電極41a,41bをそれぞれ
第1の端子電極31と第2の端子電極32の上に位置さ
せて導電性接着剤Bで固着している。また、第1の端子
電極31および第2の端子電極32上の発光素子4’に
よって覆われない露出部分に電源からの配線Wa,Wb
がそれぞれ接続され、また表面電極41bと下面電極2
とは配線Wb、Wcにより同電位とされている。そして
また、半導体基板1の抵抗値Rは発光素子4’の作動時
抵抗値よりも大きく設定されている(この例ではR=2
70Ω)。
FIG. 5 is a vertical sectional view showing another example of the optical semiconductor device according to the second invention. In the optical semiconductor device of FIG. 5, two terminal electrodes 31 and 32 are provided on the surface of a semiconductor substrate 1 (material: n-Si, resistivity k: 0.4 Ω · cm, thickness d: 200 μm) having a bottom electrode 2. Has been formed. One terminal electrode (first terminal electrode) 31 is formed directly on the surface of the semiconductor substrate 1, and the other terminal electrode (second terminal electrode) 3
2 is formed on the semiconductor substrate 1 via the insulating layer 5. Then, the light emitting element 4 ′ of FIG. 3 is turned upside down, and the two surface electrodes 41a and 41b of the light emitting element 4 ′ are positioned above the first terminal electrode 31 and the second terminal electrode 32, respectively. It is fixed with adhesive B. In addition, wirings Wa and Wb from the power source are provided on the exposed portions of the first terminal electrode 31 and the second terminal electrode 32 which are not covered by the light emitting element 4 ′.
Are respectively connected to each other, and the front surface electrode 41b and the lower surface electrode 2 are connected.
And have the same potential by the wirings Wb and Wc. Further, the resistance value R of the semiconductor substrate 1 is set larger than the operating resistance value of the light emitting element 4 '(R = 2 in this example).
70Ω).

【0028】このような構成の光半導体装置における電
流通過回路は、前記と同様に2つあり、その一つは配線
Wa−第1の端子電極31−表面電極41a−発光素子
4’−表面電極41b−第2の端子電極32−配線Wb
と流れる第1電流通過回路である。もう一つは、配線W
a−端子電極31−半導体基板1−下面電極2−配線W
cと流れる第2電流通過回路である。回路的には、発光
素子4’に半導体基板1(その抵抗値R)が並列接続さ
れた形態をとる。
There are two current passing circuits in the optical semiconductor device having such a structure as described above, and one of them is a wiring Wa-first terminal electrode 31-surface electrode 41a-light emitting element 4'-surface electrode. 41b-second terminal electrode 32-wiring Wb
Is a first current passing circuit that flows. The other is wiring W
a-terminal electrode 31-semiconductor substrate 1-bottom surface electrode 2-wiring W
It is the 2nd electric current passage circuit which flows with c. In terms of a circuit, the semiconductor substrate 1 (its resistance value R) is connected in parallel to the light emitting element 4 '.

【0029】そして、前記と同様にして、この光半導体
装置に順電圧を印加すると、半導体基板1の抵抗値Rが
発光素子4’の作動時抵抗値よりも大きいため、第1電
流通過回路に電流が流れ発光素子4’が発光する。発光
素子4’に半導体基板1が並列接続されているため、基
板1によって発光素子4’の駆動電圧が上昇することは
防止される。
When a forward voltage is applied to this optical semiconductor device in the same manner as described above, the resistance value R of the semiconductor substrate 1 is larger than the operating resistance value of the light emitting element 4 '. A current flows and the light emitting element 4 ′ emits light. Since the semiconductor substrate 1 is connected in parallel to the light emitting element 4 ', the substrate 1 prevents the drive voltage of the light emitting element 4'from rising.

【0030】一方、逆電圧を印加すると、半導体基板1
の抵抗に比べて発光素子4’の抵抗が格段に高いため第
2電流通過回路に電流が流れ、これにより発光素子4’
の破壊が防止される。また、半導体基板1の抵抗を選択
することにより順方向に過電圧が印加された場合に、発
光素子4’のみならず半導体基板1へも電流を流すこと
ができ発光素子4の破壊を防止できる。
On the other hand, when a reverse voltage is applied, the semiconductor substrate 1
Since the resistance of the light emitting element 4'is much higher than that of the light emitting element 4 ', a current flows through the second current passing circuit, which causes the light emitting element 4'.
Is prevented from being destroyed. Further, by selecting the resistance of the semiconductor substrate 1, when an overvoltage is applied in the forward direction, a current can flow not only to the light emitting element 4 ′ but also to the semiconductor substrate 1 and the light emitting element 4 can be prevented from being destroyed.

【0031】次に、第2の発明に係る光半導体装置を発
光装置に実装した場合の形態を説明する。図6は、図4
に示した光半導体装置Mを半導体レーザ装置に実装した
場合の斜視図である。光半導体装置Mは、その下面電極
2(図4に図示)と主リード81とが導通可能に主リー
ド81の先端部分に導電性接着剤で固着されている。ま
た、主リード81に対して垂直方向に形成された、主リ
ード81と導通し且つ副リード82,83とは絶縁の側
壁9には、発光素子4’からの光を受光できる位置に受
光素子7が設けられている。そして主リード81の左右
には副リード82,83が軸方向に平行して設けられて
いる。
Next, a mode in which the optical semiconductor device according to the second invention is mounted on a light emitting device will be described. FIG. 6 shows FIG.
FIG. 6 is a perspective view when the optical semiconductor device M shown in FIG. In the optical semiconductor device M, the lower surface electrode 2 (shown in FIG. 4) and the main lead 81 are fixed to the tip end portion of the main lead 81 with a conductive adhesive so that the main lead 81 can be conducted. Further, the side wall 9 formed in the direction perpendicular to the main lead 81 and electrically connected to the main lead 81 and insulated from the sub leads 82 and 83 has a light receiving element at a position where light from the light emitting element 4'can be received. 7 is provided. Sub leads 82 and 83 are provided on the left and right of the main lead 81 in parallel with the axial direction.

【0032】副リード82と端子電極31とはボンディ
ングワイヤWaで接続され、端子電極31と表面電極4
1bとはボンディングワイヤWdで、表面電極41aと
主リード81とはボンディングワイヤWbでそれぞれ接
続されている。また、受光素子7と副リード83とはボ
ンディングワイヤWeで接続されている。そして、光半
導体装置Mや受光素子7、各ボンディングワイヤを含め
た、側壁9から先端側はエポキシ樹脂などの透光性樹脂
Rで封止されている。もちろん側壁9から先端側が透光
性樹脂Rで封止されていなくても構わない。
The sub lead 82 and the terminal electrode 31 are connected by a bonding wire Wa, and the terminal electrode 31 and the surface electrode 4 are connected.
1b is a bonding wire Wd, and the surface electrode 41a and the main lead 81 are connected by a bonding wire Wb. Further, the light receiving element 7 and the sub lead 83 are connected by a bonding wire We. Then, from the side wall 9 including the optical semiconductor device M, the light receiving element 7, and the bonding wires, the tip side is sealed with a light transmitting resin R such as an epoxy resin. Needless to say, the tip side from the side wall 9 may not be sealed with the transparent resin R.

【0033】このような構造の半導体レーザ装置におい
て、主リード81と副リード82の間に順方向に所定の
電流又は所定のレーザ駆動電圧を与えた場合には、主リ
ード81−ボンディングワイヤWb−表面電極41a−
半導体レーザ素子4’−表面電極41b−ボンディング
ワイヤWd−端子電極31−ボンディングワイヤWa−
副リード82と流れ、半導体レーザ素子4’が発振し、
レーザ光がX方向に出射される。そして出射された光を
受光素子7が検知すると、主リード81と副リード83
間に電流が流れ、この電流値を基に半導体レーザ素子
4’の光出力が一定になるように電圧が制御される。
In the semiconductor laser device having such a structure, when a predetermined current or a predetermined laser driving voltage is applied in the forward direction between the main lead 81 and the sub lead 82, the main lead 81-bonding wire Wb- Surface electrode 41a-
Semiconductor laser element 4'-surface electrode 41b-bonding wire Wd-terminal electrode 31-bonding wire Wa-
The semiconductor laser element 4 ′ oscillates by flowing with the sub lead 82,
Laser light is emitted in the X direction. When the light receiving element 7 detects the emitted light, the main lead 81 and the sub lead 83
A current flows in the meantime, and the voltage is controlled based on this current value so that the optical output of the semiconductor laser device 4 ′ becomes constant.

【0034】一方、静電気などによって主リード81と
副リード82の間に逆方向に電圧が加わった場合には、
副リード82−ボンディングワイヤWa−端子電極31
−半導体基板1−下面電極2−主リード81と流れ、静
電気による半導体レーザ素子4’の破壊が回避される。
On the other hand, when a voltage is applied in the opposite direction between the main lead 81 and the sub lead 82 due to static electricity,
Sub lead 82-bonding wire Wa-terminal electrode 31
-Semiconductor substrate 1-lower surface electrode 2-main lead 81, and the semiconductor laser element 4'is prevented from being damaged by static electricity.

【0035】さらに、第2の発明に係る光半導体装置を
発光装置に実装した他の形態を図7に示す。図7は、図
5に示した光半導体装置M’をリード型発光ダイオード
装置に実装した場合の縦断面図である。リード84の上
端に、その下面電極とリードとが導通可能に導電性接着
剤で光半導体装置M’が固着されている。そして、リー
ド84と第1の端子電極31とはボンディングワイヤW
aで接続され、第2の端子電極32とリード85とはボ
ンディングワイヤWbで接続されている。光半導体装置
M’と各ボンディングワイヤ、リード84,85の上部
は透光性樹脂Rで封止されている。
FIG. 7 shows another embodiment in which the optical semiconductor device according to the second invention is mounted on a light emitting device. FIG. 7 is a vertical cross-sectional view when the optical semiconductor device M ′ shown in FIG. 5 is mounted on a lead type light emitting diode device. An optical semiconductor device M ′ is fixed to the upper end of the lead 84 with a conductive adhesive so that the lower surface electrode and the lead can be electrically connected. The lead 84 and the first terminal electrode 31 are bonded to each other by the bonding wire W.
The second terminal electrode 32 and the lead 85 are connected by a bonding wire Wb. The optical semiconductor device M ′, the bonding wires, and the upper portions of the leads 84 and 85 are sealed with a transparent resin R.

【0036】このような電極間配線において、リード8
4,85の間に順方向に所定の電流又は所定のレーザ駆
動電圧を与えた場合には、リード84−ボンディングワ
イヤWa−第1の端子電極31−発光素子4’−第2の
端子電極32−ボンディングワイヤWb−リード85と
流れ、発光素子4’が発光する。一方、静電気などによ
ってリード84,85の間に逆方向に電圧が加わった場
合には、リード85−端子電極32−半導体基板1−下
面電極2−リード84と流れ、静電気による発光素子
4’の破壊が回避される。
In such inter-electrode wiring, the lead 8
When a predetermined current or a predetermined laser drive voltage is applied in the forward direction between Nos. 4 and 85, the lead 84-bonding wire Wa-first terminal electrode 31-light emitting element 4'-second terminal electrode 32. -Bonding wire Wb-Flows with the lead 85, and the light emitting element 4'emits light. On the other hand, when a voltage is applied between the leads 84 and 85 in the opposite direction due to static electricity or the like, the current flows through the lead 85-terminal electrode 32-semiconductor substrate 1-bottom electrode 2-lead 84, and the light-emitting element 4'is caused by static electricity. Destruction is avoided.

【0037】[0037]

【発明の効果】第1の発明に係る光半導体装置では、下
面に電極が形成され半導体基板と、この半導体基板の上
面に形成された端子電極と、異なる面側に正・負の表面
電極を有する発光素子とを備え、表面電極のいずれか一
方を端子電極に接続し、半導体基板の抵抗値を発光素子
の作動時抵抗値よりも大きくし、且つ端子電極と接続し
ていない方の発光素子の表面電極と半導体基板の下面の
電極とを同電位とし、端子電極と接続していない方の発
光素子の表面電極と、端子電極との間に駆動電圧を印加
する構成としたので、半導体基板の材料に特に制限を受
けることなく、過電圧および逆電圧による発光素子の破
壊を有効に防止できる。
In the optical semiconductor device according to the first aspect of the present invention, a semiconductor substrate having an electrode formed on the lower surface, a terminal electrode formed on the upper surface of the semiconductor substrate, and positive and negative surface electrodes on different surface sides are provided. A light emitting element having one of the surface electrodes connected to the terminal electrode, the resistance value of the semiconductor substrate being larger than the operating resistance value of the light emitting element, and not connected to the terminal electrode. Since the surface electrode of the semiconductor substrate and the electrode on the lower surface of the semiconductor substrate have the same potential, and the drive voltage is applied between the terminal electrode and the surface electrode of the light emitting element which is not connected to the terminal electrode, the semiconductor substrate It is possible to effectively prevent destruction of the light emitting element due to overvoltage and reverse voltage, without being particularly limited by the material.

【0038】また第2の発明に係る光半導体装置では、
下面に電極が形成された半導体基板と、この半導体基板
の上面に形成された第1の端子電極と、同一面側に正・
負の表面電極を有する発光素子とを備え、発光素子の表
面電極のいずれか一方を第1の端子電極と接続し、半導
体基板の抵抗値を発光素子の作動時抵抗値よりも大きく
し、且つ第1の端子電極と接続していない方の発光素子
の表面電極と半導体基板の下面の電極とを同電位とし、
第1の端子電極と接続していない方の発光素子の表面電
極と、第1の端子電極との間に駆動電圧を印加する構成
としたので、第1の発明と同様に、半導体基板の材料に
特に制限を受けることなく、過電圧および逆電圧による
発光素子の破壊を有効に防止できる。
In the optical semiconductor device according to the second invention,
A semiconductor substrate having an electrode formed on the lower surface and a first terminal electrode formed on the upper surface of the semiconductor substrate are on the same surface side as a positive electrode.
A light emitting element having a negative surface electrode, one of the surface electrodes of the light emitting element is connected to the first terminal electrode, and the resistance value of the semiconductor substrate is larger than the resistance value during operation of the light emitting element, and The surface electrode of the light emitting element that is not connected to the first terminal electrode and the electrode on the lower surface of the semiconductor substrate are set to the same potential,
Since the driving voltage is applied between the surface electrode of the light emitting element which is not connected to the first terminal electrode and the first terminal electrode, the material of the semiconductor substrate is the same as in the first invention. It is possible to effectively prevent destruction of the light emitting element due to overvoltage and reverse voltage without being particularly limited.

【0039】本発明によれば、発光素子にその保護回路
としての半導体基板が並列に接続された形態をとるの
で、発光素子の駆動電圧の上昇を防止することもでき
る。
According to the present invention, since the semiconductor substrate as a protection circuit for the light emitting element is connected in parallel, it is possible to prevent the driving voltage of the light emitting element from rising.

【図面の簡単な説明】[Brief description of drawings]

【図1】 第1の発明に係る光半導体装置の一例を示す
縦断面図である。
FIG. 1 is a vertical sectional view showing an example of an optical semiconductor device according to a first invention.

【図2】 半導体基板の抵抗値Rと発光素子の静電耐圧
との関係を示す図である。
FIG. 2 is a diagram showing a relationship between a resistance value R of a semiconductor substrate and an electrostatic breakdown voltage of a light emitting element.

【図3】 同一面側に正・負の表面電極を有する発光素
子の一例を示す縦断面図である。
FIG. 3 is a vertical cross-sectional view showing an example of a light emitting element having positive and negative surface electrodes on the same surface side.

【図4】 第2の発明に係る光半導体装置の一例を示す
縦断面図である。
FIG. 4 is a vertical sectional view showing an example of an optical semiconductor device according to a second invention.

【図5】 第2の発明に係る光半導体装置の他の例を示
す縦断面図である。
FIG. 5 is a vertical cross-sectional view showing another example of the optical semiconductor device according to the second invention.

【図6】 図4の光半導体装置を搭載した半導体レーザ
装置の斜視図である。
6 is a perspective view of a semiconductor laser device equipped with the optical semiconductor device of FIG.

【図7】 図5の光半導体装置を搭載した発光ダイオー
ド装置の縦断面図である。
7 is a longitudinal sectional view of a light emitting diode device equipped with the optical semiconductor device of FIG.

【図8】 従来の光半導体装置を示す縦断面図である。FIG. 8 is a vertical cross-sectional view showing a conventional optical semiconductor device.

【図9】 図8の光半導体装置の回路図である。9 is a circuit diagram of the optical semiconductor device of FIG.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 下面電極 3 端子電極 4,4’ 発光素子 5 絶縁層 31 第1の端子電極 32 第2の端子電極 41a,41b 表面電極 1 Semiconductor substrate 2 Bottom electrode 3 terminal electrode 4,4 'light emitting element 5 insulating layers 31 First terminal electrode 32 Second terminal electrode 41a, 41b surface electrodes

フロントページの続き (72)発明者 上山 孝二 鳥取県鳥取市南吉方3丁目201番地 鳥取 三洋電機株式会社内 Fターム(参考) 5F041 AA23 BB22 CA40 DA04 DA09Continued front page    (72) Inventor Koji Ueyama             3-201 Minamiyoshikata, Tottori City, Tottori Prefecture Tottori             Sanyo Electric Co., Ltd. F-term (reference) 5F041 AA23 BB22 CA40 DA04 DA09

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 下面に電極が形成され半導体基板と、こ
の半導体基板の上面に形成された端子電極と、異なる面
側に正・負の表面電極を有する発光素子とを備え、 前記表面電極のいずれか一方を前記端子電極に接続し、 前記半導体基板の抵抗値を前記発光素子の作動時抵抗値
よりも大きくし、且つ前記端子電極と接続していない方
の発光素子の表面電極と半導体基板の下面の電極とを同
電位とし、 前記端子電極と接続していない方の発光素子の表面電極
と、前記端子電極との間に駆動電圧を印加することを特
徴とする光半導体装置。
1. A semiconductor substrate having an electrode formed on a lower surface, a terminal electrode formed on an upper surface of the semiconductor substrate, and a light-emitting element having positive and negative surface electrodes on different surface sides. Either one is connected to the terminal electrode, the resistance value of the semiconductor substrate is made larger than the operating resistance value of the light emitting element, and the surface electrode and the semiconductor substrate of the light emitting element which is not connected to the terminal electrode. An optical semiconductor device, characterized in that an electrode on the lower surface of the is made to have the same potential, and a drive voltage is applied between the surface electrode of the light emitting element which is not connected to the terminal electrode and the terminal electrode.
【請求項2】 下面に電極が形成された半導体基板と、
この半導体基板の上面に形成された第1の端子電極と、
同一面側に正・負の表面電極を有する発光素子とを備
え、 前記発光素子の表面電極のいずれか一方を第1の端子電
極と接続し、 前記半導体基板の抵抗値を前記発光素子の作動時抵抗値
よりも大きくし、且つ第1の端子電極と接続していない
方の発光素子の表面電極と半導体基板の下面の電極とを
同電位とし、 第1の端子電極と接続していない方の発光素子の表面電
極と、第1の端子電極との間に駆動電圧を印加すること
を特徴とする光半導体装置。
2. A semiconductor substrate having an electrode formed on a lower surface,
A first terminal electrode formed on the upper surface of the semiconductor substrate;
A light emitting element having positive and negative surface electrodes on the same surface side, one of the surface electrodes of the light emitting element is connected to a first terminal electrode, and the resistance value of the semiconductor substrate is set to the operation of the light emitting element. One whose resistance is greater than the resistance value and which is not connected to the first terminal electrode and has the same potential as the surface electrode of the light emitting element and the electrode on the lower surface of the semiconductor substrate and which is not connected to the first terminal electrode An optical semiconductor device, wherein a driving voltage is applied between the surface electrode of the light emitting element and the first terminal electrode.
【請求項3】 前記半導体基板の上面に絶縁層を介して
第2の端子電極を形成し、前記発光素子の正・負の表面
電極を第1の端子電極と第2の端子電極とに接続し、第
1の端子電極と第2の端子電極との間に駆動電圧を印可
する請求項2記載の光半導体装置。
3. A second terminal electrode is formed on an upper surface of the semiconductor substrate via an insulating layer, and positive / negative surface electrodes of the light emitting element are connected to the first terminal electrode and the second terminal electrode. The optical semiconductor device according to claim 2, wherein a drive voltage is applied between the first terminal electrode and the second terminal electrode.
【請求項4】 前記発光素子が窒化ガリウム系半導体素
子である請求項2又は3記載の光半導体装置。
4. The optical semiconductor device according to claim 2, wherein the light emitting element is a gallium nitride based semiconductor element.
【請求項5】 前記半導体基板の抵抗値が50〜15,
000Ωの範囲である請求項1〜4のいずれかに記載の
光半導体装置。
5. The resistance value of the semiconductor substrate is 50 to 15,
The optical semiconductor device according to claim 1, wherein the optical semiconductor device has a range of 000Ω.
JP2001306349A 2001-10-02 2001-10-02 Optical semiconductor device Expired - Fee Related JP3920613B2 (en)

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Country Link
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0489150A (en) * 1990-07-31 1992-03-23 Nisshin Steel Co Ltd Production of wire net and wire net
US7190004B2 (en) 2003-12-03 2007-03-13 Sumitomo Electric Industries, Ltd. Light emitting device
US7202509B2 (en) 2003-08-26 2007-04-10 Sumitomo Electric Industries, Ltd. Light emitting apparatus
US7995636B2 (en) 2004-06-08 2011-08-09 Fuji Xerox Co., Ltd. Semiconductor laser apparatus and manufacturing method thereof
JP2011199006A (en) * 2010-03-19 2011-10-06 Sharp Corp Nitride semiconductor laser element
JP2015211135A (en) * 2014-04-25 2015-11-24 ウシオオプトセミコンダクター株式会社 Semiconductor optical device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0489150A (en) * 1990-07-31 1992-03-23 Nisshin Steel Co Ltd Production of wire net and wire net
US7202509B2 (en) 2003-08-26 2007-04-10 Sumitomo Electric Industries, Ltd. Light emitting apparatus
US7687822B2 (en) 2003-08-26 2010-03-30 Sumitomo Electric Industries, Ltd. Light emitting apparatus
US7190004B2 (en) 2003-12-03 2007-03-13 Sumitomo Electric Industries, Ltd. Light emitting device
US7995636B2 (en) 2004-06-08 2011-08-09 Fuji Xerox Co., Ltd. Semiconductor laser apparatus and manufacturing method thereof
JP2011199006A (en) * 2010-03-19 2011-10-06 Sharp Corp Nitride semiconductor laser element
JP2015211135A (en) * 2014-04-25 2015-11-24 ウシオオプトセミコンダクター株式会社 Semiconductor optical device

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