JP2002348198A - Substrate for semiconductor device epitaxial growth and method for producing the same - Google Patents

Substrate for semiconductor device epitaxial growth and method for producing the same

Info

Publication number
JP2002348198A
JP2002348198A JP2001159045A JP2001159045A JP2002348198A JP 2002348198 A JP2002348198 A JP 2002348198A JP 2001159045 A JP2001159045 A JP 2001159045A JP 2001159045 A JP2001159045 A JP 2001159045A JP 2002348198 A JP2002348198 A JP 2002348198A
Authority
JP
Japan
Prior art keywords
substrate
single crystal
epitaxial growth
layer
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001159045A
Other languages
Japanese (ja)
Inventor
Kichiya Yano
吉弥 谷野
Nobuhiro Munetomo
宣浩 宗友
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissin Electric Co Ltd
Original Assignee
Nissin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissin Electric Co Ltd filed Critical Nissin Electric Co Ltd
Priority to JP2001159045A priority Critical patent/JP2002348198A/en
Publication of JP2002348198A publication Critical patent/JP2002348198A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for semiconductor device epitaxial growth with which a semiconductor device which is low in cost but also has extremely excellent crystal quality and very good electrical property can be produced, by effectively using a single crystal of high quality and high resistance grown by a solid-phase growth, and a method for producing the same. SOLUTION: Hydrogen ion is injected into a grown single crystal 2A grown by a solid-phase growth in using a SiC single crystal as a seed crystal, and at the same time, a substrate support body 3 is laminated on the surface of the grown single crystal 2A via a SiO2 layer 8. And, a membrane-like grown single crystal layer 2 is removed from a grown single crystal body 2', by subjecting the laminated body to a heat treatment under the condition of applying compressive load to the laminated body. Further, the membrane-like grown single crystal layer 2 and the substrate support body 3 comprising Si or Sic polycrystalline substance are fused and integrated via the SiO2 layer 8. In this way, the substrate 1 for semiconductor device epitaxial growth is produced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体素子エピタキ
シャル成長用基板およびその製造方法に関する。詳しく
は、携帯電話や高機能携帯電話等の高周波デバイス、あ
るいは、発光ダイオードや半導体レーザ等の発光素子と
して注目されているGaNなど窒化ガリウム系半導体素
子をエピタキシャル成長させる際に用いられる半導体素
子エピタキシャル成長用基板及びその製造方法に関する
ものである。
[0001] 1. Field of the Invention [0002] The present invention relates to a substrate for epitaxial growth of a semiconductor device and a method of manufacturing the same. More specifically, a semiconductor device epitaxial growth substrate used when epitaxially growing a gallium nitride based semiconductor device such as GaN, which is attracting attention as a high frequency device such as a mobile phone or a high-performance mobile phone, or a light emitting device such as a light emitting diode or a semiconductor laser. And a method of manufacturing the same.

【0002】[0002]

【従来の技術】この種の半導体素子エピタキシャル成長
用基板として、従来では、(1)シリコン(Si)基板
上に、例えば熱CVD法により炭化ケイ素(SiC)の
エピタキシャル層を形成し、このSiCエピタキシャル
層にGaNなど窒化ガリウム系半導体素子をエピタキシ
ャル成長させたもの、(2)サファイヤ(Al2 3
基板を使用し、このサファイヤ基板の(0001)面上
にMOCVD(Metal Organic Chemical Vapor Depositi
on) 法でGaNなど窒化ガリウム系半導体素子をエピタ
キシャル成長させたもの、が知られている。
2. Description of the Related Art Conventionally, as a substrate for epitaxial growth of a semiconductor device of this kind, (1) an epitaxial layer of silicon carbide (SiC) is formed on a silicon (Si) substrate by, for example, a thermal CVD method. Gallium nitride based semiconductor devices such as GaN epitaxially grown on (2) sapphire (Al 2 O 3 )
Using a substrate, MOCVD (Metal Organic Chemical Vapor Depositi) was placed on the (0001) face of this sapphire substrate.
On) methods are known in which gallium nitride-based semiconductor devices such as GaN are epitaxially grown by the (on) method.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記し
た従来の半導体素子エピタキシャル成長用基板のうち、
(1)のシリコン基板上にSiCエピタキシャル層を形
成してなるものは、サファイヤ基板に比べて加工が容易
であるとともに、電気的な導通性にも優れ、半導体素子
の構造形態の制約が少ないという利点を有する反面、半
導体素子のエピタキシャル成長温度が高いために、この
エピタキシャル成長以前にシリコン基板上に形成するS
iCエピタキシャル層形成材料に大きな制限があり、特
に、GaNなどの窒化ガリウム系半導体素子を高温(1
000〜1040℃)でエピタキシャル成長させると、
SiCエピタキシャル層と窒化ガリウム系半導体層(以
下、GaNエピタキシャル層と称する)との熱膨張率の
差が原因で、両層間に熱歪が発生するだけでなく、室温
にまで冷却されたとき、GaNエピタキシャル層に引張
り応力が負荷されてクラックが発生しやすく、良好な結
晶品質が得られず、窒化ガリウム系半導体素子を作成す
ることができない。
However, of the above-mentioned conventional substrates for epitaxial growth of semiconductor devices,
The device (1) formed by forming an SiC epitaxial layer on a silicon substrate is easier to process than a sapphire substrate, has excellent electrical conductivity, and has less restrictions on the structure of a semiconductor device. Although it has an advantage, since the epitaxial growth temperature of the semiconductor element is high, the S formed on the silicon substrate before this epitaxial growth
There is a great limitation on the material for forming the iC epitaxial layer. In particular, gallium nitride based semiconductor devices such as GaN are subject to high temperatures (1
000-1040 ° C.)
Due to the difference in the coefficient of thermal expansion between the SiC epitaxial layer and the gallium nitride based semiconductor layer (hereinafter referred to as GaN epitaxial layer), not only thermal distortion occurs between the two layers but also GaN when cooled to room temperature. Cracks are liable to be generated by applying tensile stress to the epitaxial layer, and good crystal quality cannot be obtained, so that a gallium nitride based semiconductor device cannot be manufactured.

【0004】また、(2)のサファイヤ基板を用いるも
のは、サファイヤ自体の硬度が非常に硬く化学的に安定
し、かつ、電気的に絶縁性を有するものであるために、
エッチング等の加工性が悪いだけでなく、基板裏面に電
極を設けることができないなど半導体素子の構造形態に
大きな制約がある。その上、GaNエピタキシャル層の
成長時に、結晶欠陥を多く含むGaNエピタキシャル層
と基板との間で結晶格子の不整合が大きくて結晶品質の
向上には限界がある。さらに、サファイヤ基板と成長さ
れるGaNエピタキシャル層との間の熱膨張率の差は
(1)のSiCエピタキシャル層の場合に比べて、一層
大きい(因みに、SiCの熱膨張率:4.2×10-6
°K、サファイヤの熱膨張率:7.5×10-6/°K、
GaNの熱膨張率:5.6×10-6/°K)ために、G
aNエピタキシャル層を高温で成長させた後、室温に戻
したとき、圧縮応力が負荷されてクラックが発生し、結
晶品質を一層低下させるという問題があった。
Further, in the case of using the sapphire substrate of (2), the sapphire itself is very hard and chemically stable, and has electrical insulation.
Not only is the processability of etching and the like poor, but there is a great limitation on the structure of the semiconductor element, such as the inability to provide electrodes on the back surface of the substrate. In addition, during the growth of the GaN epitaxial layer, there is a large mismatch in the crystal lattice between the GaN epitaxial layer containing many crystal defects and the substrate, and there is a limit to improving the crystal quality. Furthermore, the difference in the coefficient of thermal expansion between the sapphire substrate and the GaN epitaxial layer to be grown is larger than that in the case of the SiC epitaxial layer (1). -6 /
° K, coefficient of thermal expansion of sapphire: 7.5 × 10 -6 / ° K,
The coefficient of thermal expansion of GaN: 5.6 × 10 −6 / ° K)
When the temperature of the aN epitaxial layer is increased to a high temperature and then returned to room temperature, a compressive stress is applied to cause cracks, which causes a problem that the crystal quality is further reduced.

【0005】本発明は上記の実情に鑑み、本発明者らに
よる永年に亘る鋭意研究の成果として育成に成功してい
る高品位、高抵抗のSiC単結晶を巧みに有効利用する
ことによって、低コストでありながら、結晶品質が極め
て良好で電気的特性に非常に優れた半導体素子を作成す
ることができる半導体素子エピタキシャル成長用基板お
よびその製造方法を提供することを目的としている。
In view of the above circumstances, the present invention has succeeded in developing a high-grade, high-resistance SiC single crystal that has been successfully grown as a result of years of intensive research by the present inventors. It is an object of the present invention to provide a substrate for epitaxial growth of a semiconductor device and a method for manufacturing the same, which is capable of producing a semiconductor device having extremely good crystal quality and extremely excellent electrical characteristics while being low in cost.

【0006】本発明の他の目的は、上記目的に加えて、
高性能基板の製造歩留りを向上して基板単価の著しい低
減を図ることができるようにすることにある。
Another object of the present invention is to provide, in addition to the above objects,
It is an object of the present invention to improve the production yield of a high-performance substrate so that the unit cost of the substrate can be significantly reduced.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
に、請求項1に記載の発明に係る半導体素子エピタキシ
ャル成長用基板は、SiC単結晶を種結晶として成長さ
れた育成単結晶中への水素イオンの注入によって育成単
結晶本体から薄膜状に剥離分割された育成単結晶層と、
基板支持体とが、800〜950℃の温度範囲で軟化流
動可能な接合層を介して融着一体化されていることを特
徴とするものである。
According to a first aspect of the present invention, there is provided a substrate for epitaxially growing a semiconductor device, comprising the steps of: introducing hydrogen into a grown single crystal grown using a SiC single crystal as a seed crystal; A grown single crystal layer, which has been separated from the grown single crystal body into a thin film by ion implantation,
It is characterized in that the substrate support is fused and integrated through a bonding layer capable of softening and flowing in a temperature range of 800 to 950 ° C.

【0008】ここで、育成単結晶は、気相成長や液相成
長により育成されたものであってもよいが、特に、請求
項2に記載のように、固相成長により育成されたもので
あることが望ましい。
[0008] Here, the grown single crystal may be grown by vapor phase growth or liquid phase growth, but is particularly grown by solid phase growth. Desirably.

【0009】上記のような構成要件を有する請求項1及
び請求項2に記載の発明による半導体素子エピタキシャ
ル成長用基板は、本発明者らが永年に亘って鋭意研究を
続けた結果として開発に成功したところの、SiC単結
晶を種結晶とする固相成長により育成した単結晶を基板
の主要材料として利用している。このような固相成長に
よる育成単結晶は、従来より用いられていたSi基板や
Si基板上に熱CVD法によりSiCエピタキシャル層
を形成してなるものに比べて高品位、高抵抗であるとと
もに、高温特性、高周波特性にも優れている等の多くの
優位性を有し、また、サファイヤ基板に比べると電気導
通性に優れ、基板裏面にも自由に電極を設けることがで
きるなど半導体素子の構造形態の制約が少ないととも
に、GaNなどの半導体素子エピタキシャル成長時にお
けるエピタキシャル層と基板との間の結晶格子の不整合
も非常に少なくて半導体素子としての結晶品質の向上が
図れるという優位性を有している。
The semiconductor device epitaxial growth substrate according to the first and second aspects of the present invention having the above constitutional requirements has been successfully developed as a result of the inventors' intensive research for many years. However, a single crystal grown by solid phase growth using a SiC single crystal as a seed crystal is used as a main material of the substrate. Such a single crystal grown by solid phase growth has higher quality and higher resistance than a conventionally used Si substrate or a SiC epitaxial layer formed on a Si substrate by a thermal CVD method. It has many advantages such as excellent high-temperature characteristics and high-frequency characteristics.It also has excellent electrical conductivity compared to sapphire substrates, and can be freely provided with electrodes on the back of the substrate. It has the advantage that there are few restrictions on the form and that the crystal lattice mismatch between the epitaxial layer and the substrate during epitaxial growth of a semiconductor device such as GaN is very small and the crystal quality as a semiconductor device can be improved. I have.

【0010】本発明は、上記のような多くの優位性を有
する育成単結晶をバルク状で使用するのではなく、その
育成単結晶を水素イオンの注入法により機械的カッティ
ング手段の場合には避けられない研削、研磨等による材
料ロスのほとんどない状態で薄膜化するとともに、その
薄膜状育成単結晶層を800〜950℃の温度範囲で軟
化流動可能な接合層を介して支持体に融着一体化させる
ことにより、高価な育成単結晶の使用量を最少必要限に
抑えつつも取扱い上支障のない厚み、強度を確保させる
ことが可能であり、これによって、工程の削減と相俟っ
て基板全体の製造コストをできるだけ低減しながら、上
述したような結晶品質の向上により電気的特性に非常に
優れた基板を得ることが可能である。
The present invention does not use a grown single crystal having many advantages as described above in a bulk form, but avoids using the grown single crystal as a mechanical cutting means by a hydrogen ion implantation method. It is thinned in a state where there is almost no material loss due to unrequired grinding, polishing, etc., and the thin film-grown single crystal layer is fused and integrated with the support via a bonding layer capable of softening and flowing at a temperature of 800 to 950 ° C. By reducing the amount of expensive grown single crystals to the minimum necessary, it is possible to secure the thickness and strength that do not hinder handling, thereby reducing the number of processes and the substrate. It is possible to obtain a substrate having extremely excellent electrical characteristics by improving the crystal quality as described above while reducing the overall manufacturing cost as much as possible.

【0011】また、請求項9に記載の発明に係る半導体
素子エピタキシャル成長用基板の製造方法は、SiC単
結晶を種結晶として固相成長された育成単結晶中にその
表面側から水素イオンを注入する工程と、育成単結晶の
表面に800〜950℃の温度範囲で軟化流動可能な接
合層を形成する工程と、その接合層の表面に基板支持体
を積層させ、かつ、押圧しながら加熱処理することによ
り、水素イオンの平均侵入深さで育成単結晶本体から薄
膜状の育成単結晶層を剥離分割するとともに、その薄膜
状育成単結晶層と基板支持体とを接合層を介して融着一
体化してエピタキシャル成長用基板を作成する工程とを
備え、エピタキシャル成長用基板が分離された後の種結
晶と一体のままにある残部の育成単結晶本体に対して上
記の工程を複数回繰り返して複数のエピタキシャル成長
用基板を作成することを特徴とするものである。
According to a ninth aspect of the present invention, in the method of manufacturing a substrate for epitaxial growth of a semiconductor element, hydrogen ions are implanted from the surface side into a grown single crystal solid-phase grown using a SiC single crystal as a seed crystal. A step of forming a bonding layer capable of softening and flowing at a temperature in the range of 800 to 950 ° C. on the surface of the grown single crystal, and laminating a substrate support on the surface of the bonding layer, and performing heat treatment while pressing. This allows the thin-film grown single-crystal layer to be separated from the grown single-crystal main body at the average penetration depth of hydrogen ions, and the thin-film grown single-crystal layer and the substrate support to be integrally fused via a bonding layer. And forming a substrate for epitaxial growth by performing the above steps a plurality of times for the remaining grown single crystal body remaining integral with the seed crystal after the epitaxial growth substrate is separated. It is characterized in that to create a plurality of epitaxial growth substrate return Ri.

【0012】ここでも、育成単結晶は、気相成長や液相
成長により育成されたものであってもよいが、特に、請
求項10に記載のように、固相成長により育成されたも
のであることが望ましい。
Also in this case, the grown single crystal may be grown by vapor phase growth or liquid phase growth, but is particularly preferably grown by solid phase growth. Desirably.

【0013】上記請求項9及び請求項10に記載の発明
に係る半導体素子エピタキシャル成長用基板の製造方法
によれば、上記請求項1及び請求項2の発明と同様に、
SiC単結晶を種結晶として固相成長され従来の基板に
比べて既述のような多くの優位性を有する育成単結晶を
水素イオンの注入法により剥離分離した薄膜状の育成単
結晶層を基板の主要材料として有効利用し、この薄膜状
の育成単結晶層を基板支持体に接合層を介して融着一体
化することで、高価な育成単結晶の使用量を最少必要限
に抑えつつエピタキシャル成長用基板として取扱い上支
障のない厚み、強度を確保させて、機械的カッティング
手段の場合には避けられない研削、研磨等の工程削減と
材料ロスの軽減が図れるだけでなく、薄膜状育成単結晶
が剥離分離された後の種結晶と一体のままにある残部の
高品位、高抵抗の育成単結晶本体を水素イオンの注入法
によりロスなく薄膜状に剥離分離して複数のエピタキシ
ャル成長用基板の主要材料に有効利用することによって
製造歩留まりの向上が図れ、これらの相乗作用によって
基板全体の製造コスト、ひいては、基板単価の著しい低
減を図りながら、エピタキシャル成長面の結晶品質の向
上により電気的特性に非常に優れた基板を得ることが可
能である。
According to the method of manufacturing a substrate for epitaxially growing a semiconductor device according to the ninth and tenth aspects of the present invention, as in the first and second aspects,
A thin-film grown single crystal layer obtained by solid-phase growth of a SiC single crystal as a seed crystal and having many advantages as described above in comparison with a conventional substrate and separated by hydrogen ion implantation. The thin-film grown single crystal layer is fused and integrated with the substrate support via a bonding layer to minimize the amount of expensive grown single crystal used to minimize epitaxial growth. In addition to ensuring the thickness and strength that will not interfere with handling as a substrate for mechanical use, it is possible not only to reduce grinding and polishing steps and material loss that are inevitable in the case of mechanical cutting means, but also to reduce material loss, as well as thin film grown single crystals The remaining high-quality, high-resistance grown single crystal body, which remains integral with the seed crystal after separation and separation, is separated into thin films without loss by the hydrogen ion implantation method to form a plurality of substrates for epitaxial growth. The effective use of essential materials can improve the manufacturing yield. These synergistic effects significantly reduce the manufacturing cost of the entire substrate and, consequently, the unit cost of the substrate, while significantly improving the electrical characteristics by improving the crystal quality of the epitaxial growth surface. It is possible to obtain an excellent substrate.

【0014】特に、請求項10に記載の発明に係る半導
体素子エピタキシャル成長用基板の製造方法おいて、エ
ピタキシャル成長用基板が分離された後の種結晶と一体
のままにある残部の育成単結晶本体に対する上記工程の
複数回繰り返しによって残った種結晶を請求項11に記
載のように、育成単結晶の固相成長に繰り返し使用する
ことによって、種結晶自体のリサイクルも図り、エピタ
キシャル成長用基板の製造コストを一層低減することが
できる。
In particular, in the method for manufacturing a substrate for epitaxial growth of a semiconductor device according to the present invention, the remaining single crystal main body remaining integral with the seed crystal after the substrate for epitaxial growth is separated. The seed crystal itself is repeatedly used for solid phase growth of the grown single crystal as described in claim 11, thereby recycling the seed crystal itself and further increasing the manufacturing cost of the epitaxial growth substrate. Can be reduced.

【0015】上記請求項1及び請求項2に記載の発明に
係る半導体素子エピタキシャル成長用基板並びに請求項
9及び請求項10に記載の発明に係る半導体素子エピタ
キシャル成長用基板の製造方法において、基板の主要材
料として利用される育成単結晶層としては、請求項3及
び請求項12に記載のように、2.5〜10μm、好ま
しくは、3.0〜5.0μmの厚さに剥離分割されるこ
とが望ましい。すなわち、薄膜状育成単結晶層上に例え
ばGaNエピタキシャル層を成長させる際、育成単結晶
層が10μmを超える厚さのバルク状のものであった
り、あるいは、2.5μm未満の超薄膜の場合は、両層
の弾性率の相違に起因してGaNエピタキシャル層の成
長に伴い負荷される引っ張り応力により育成単結晶層に
クラックが入って層全体に割れが発生しやすい。これに
対して、2.5〜10μmの厚さの場合は、両層の弾性
率が分配されて均衡状態を保つために、割れが発生せ
ず、半導体素子のエピタキシャル成長にも十分に耐応さ
せることができる。
In the method for manufacturing a semiconductor device epitaxial growth substrate according to the first and second aspects of the present invention, and the method for manufacturing a semiconductor element epitaxial growth substrate according to the ninth and tenth aspects, the main material of the substrate is The grown single crystal layer used as a layer may be separated and separated into a thickness of 2.5 to 10 μm, preferably 3.0 to 5.0 μm, as described in claim 3 and claim 12. desirable. That is, when, for example, a GaN epitaxial layer is grown on a thin film-grown single crystal layer, if the grown single crystal layer is a bulk material having a thickness of more than 10 μm or an ultrathin film of less than 2.5 μm, In addition, cracks occur in the grown single crystal layer due to tensile stress applied as the GaN epitaxial layer grows due to the difference in the elastic modulus between the two layers, and cracks easily occur in the entire layer. On the other hand, in the case of a thickness of 2.5 to 10 μm, the elastic modulus of both layers is distributed and a balanced state is maintained, so that no cracks occur and the semiconductor element is sufficiently resistant to epitaxial growth. be able to.

【0016】また、上記請求項1及び請求項2に記載の
発明に係る半導体素子エピタキシャル成長用基板並びに
請求項9及び請求項10に記載の発明に係る半導体素子
エピタキシャル成長用基板の製造方法における基板支持
体としては、半導体素子をエピタキシャル成長させる面
が高品位、高抵抗の育成単結晶層であることから、結晶
品質に優れたものを用いる必要はなく、薄膜状の育成単
結晶層を含めて基板全体を取扱い上支障のない厚み、強
度に確保し、かつ、電気導通性及び放熱性(熱伝導性)
を有するものであれば十分であり、その意味から請求項
4および請求項13に記載のように、SiまたはSiC
の多結晶体を用いることが好ましい。
Further, the substrate for epitaxially growing a semiconductor device according to the first and second aspects of the present invention and the substrate support in the method for manufacturing a substrate for epitaxially growing a semiconductor element according to the ninth and tenth aspects of the present invention. As the surface on which a semiconductor element is epitaxially grown is a high-quality, high-resistance grown single crystal layer, it is not necessary to use a material having excellent crystal quality, and the entire substrate including the thin-film grown single crystal layer is used. Ensures thickness and strength that do not hinder handling, and has electrical conductivity and heat dissipation (thermal conductivity)
It is sufficient to have Si or SiC as described in claim 4 and claim 13.
It is preferable to use a polycrystal of the above.

【0017】また、上記請求項1及び請求項2に記載の
発明に係る半導体素子エピタキシャル成長用基板並びに
請求項9及び請求項10に記載の発明に係る半導体素子
エピタキシャル成長用基板の製造方法において、請求項
5及び請求項14に記載のように、GaN等の半導体素
子エピタキシャル成長面となる薄膜状育成単結晶層の表
面変質を、例えばプラズマ放電加工などを用いて除去処
理することによって、半導体素子エピタキシャル成長時
におけるエピタキシャル層と基板の結晶格子の不整合を
少なく保ち、界面におけるミスマッチを極力抑制して結
晶品質の一層の向上を図ることができる。
Further, in the method for manufacturing a substrate for epitaxial growth of a semiconductor device according to the first and second aspects of the present invention and the method for manufacturing a substrate for epitaxial growth of a semiconductor element according to the ninth and tenth aspects of the present invention. As described in claim 5 and claim 14, the surface of the thin-film grown single crystal layer which becomes the epitaxial growth surface of the semiconductor element such as GaN is subjected to removal treatment using, for example, plasma discharge machining or the like, so that the semiconductor element during epitaxial growth can be obtained. The mismatch between the crystal lattice of the epitaxial layer and the substrate can be kept small, and the mismatch at the interface can be suppressed as much as possible to further improve the crystal quality.

【0018】さらに、上記請求項1及び請求項2に記載
の発明に係る半導体素子エピタキシャル成長用基板並び
に請求項9及び請求項10に記載の発明に係る半導体素
子エピタキシャル成長用基板の製造方法において、基板
支持体と薄膜状の育成単結晶層とを融着一体化する接合
層としては、請求項6及び請求項15に記載のようなS
iO2 層、あるいは、請求項7及び請求項16に記載の
ように、800〜950℃の温度範囲で軟化流動可能な
ガラス層のいずれであっても、基板支持体と薄膜状の育
成単結晶層を強力に結合することが可能で、半導体素子
エピタキシャル成長用基板として品質的にも取扱い性能
上にも優れた製品を提供することができる。特に、接合
層がSiO2 層である場合、そのSiO2 層をSiO2
粉体もしくはシリコン化合物の塗布あるいはスパッタリ
ングにより膜状に形成するものの方が、育成単結晶の表
面の一部を酸化させてSiO2 層を形成するものに比べ
て、高価な育成単結晶の無駄な使用がなく、その育成単
結晶の基板主要材料としての繰り返し再利用率が大きく
なり、基板全体の製造コスト、ひいては、基板単価の一
層の低減を達成することができる。
Further, in the method for manufacturing a semiconductor device epitaxial growth substrate according to the first and second aspects of the present invention and the method for manufacturing a semiconductor element epitaxial growth substrate according to the ninth and tenth aspects, As the bonding layer for fusing and integrating the body and the grown single crystal layer in the form of a thin film as described in claim 6 and claim 15,
17. A substrate support and a thin-film grown single crystal, whether an iO 2 layer or a glass layer capable of softening and flowing at a temperature in the range of 800 to 950 ° C., as described in claim 7 and claim 16. The layers can be strongly bonded, and a product excellent in quality and handling performance can be provided as a substrate for semiconductor device epitaxial growth. In particular, if the bonding layer is a SiO 2 layer, SiO 2 and the SiO 2 layer
A film formed by applying powder or a silicon compound or by sputtering is more wasteful of expensive grown single crystals than a film formed by oxidizing a part of the surface of the grown single crystal to form a SiO 2 layer. Since the single crystal is not used, the reuse rate of the grown single crystal as a main material of the substrate is increased, and the production cost of the entire substrate and, consequently, the unit cost of the substrate can be further reduced.

【0019】[0019]

【発明の実施の形態】以下、本発明の実施の形態を図面
にもとづいて説明する。図1は本発明に係る半導体素子
エピタキシャル成長用基板の縦断面図であり、この半導
体素子エピタキシャル成長用基板1は、後述する固相成
長により育成された育成単結晶をイオン注入法によって
2.5〜10μm、好ましくは3.0〜5.0μmの厚
さに剥離分離された薄膜状の育成単結晶層2と、Siま
たはSiCの多結晶体を用いた基板支持体3とが800
〜950℃の温度範囲で軟化流動可能な接合層の一例と
なるSiO2 層8を介して融着一体化され、かつ、薄膜
状育成単結晶層2の表面はプラズマ放電加工により、そ
の変質が除去処理されている。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a longitudinal sectional view of a substrate for epitaxial growth of a semiconductor device according to the present invention. The substrate 1 for epitaxial growth of a semiconductor device is formed by growing a single crystal grown by solid phase growth described below by 2.5 to 10 μm by ion implantation. Preferably, the growth single crystal layer 2 in the form of a thin film separated and separated to a thickness of preferably 3.0 to 5.0 μm and the substrate support 3 using a polycrystal of Si or SiC are 800
The SiO 2 layer 8 is an example of a bonding layer capable of softening and flowing in a temperature range of from about 950 ° C. to about 950 ° C., and is fused and integrated. It has been removed.

【0020】次に、上記半導体素子エピタキシャル成長
用基板1の製造方法を、(1)図2に示す固相成長によ
る単結晶の育成方法と、(2)図3に示すSOI(silic
on−on−insulator)構造の基板製造方法とに分け、その
(1),(2)の両方法に関し、丸付き数字を付して工
程順に詳細に説明する。 (1)育成単結晶の育成方法(図2参照): α−SiC単結晶からなる種結晶4上に、β−SiC
からなる多結晶層5を熱CVD法により300μmの厚
さに形成する。 上記種結晶4と多結晶層5からなる複合体6を、19
00〜2400℃、好ましくは2000〜2200℃の
温度範囲で、かつ、SiC飽和蒸気圧下で熱処理するこ
とにより、多結晶層5をα−SiCに転化させて種結晶
4の結晶軸と同方位に配向された単結晶2Aを固相成長
により一体に育成する。 上記のようにして固相成長された育成単結晶2Aの成
長面(C面)をダイヤモンド砥粒によって研磨し、RM
S5オングストローム程度の平坦面で大きさが20mm
角、300μm厚さの育成単結晶2Aを持ち、種結晶4
を含む全体厚さがおおよそ1.5mmの中間素材7を製
造する。
Next, the method for manufacturing the substrate 1 for epitaxial growth of a semiconductor device is described in (1) a method for growing a single crystal by solid phase growth shown in FIG. 2 and (2) an SOI (silicic) method shown in FIG.
The method is divided into a method of manufacturing a substrate having an on-on-insulator structure, and the two methods (1) and (2) will be described in detail in the order of steps with circled numbers. (1) Method for growing a grown single crystal (see FIG. 2): β-SiC is placed on seed crystal 4 made of α-SiC single crystal.
Is formed to a thickness of 300 μm by a thermal CVD method. The composite 6 comprising the seed crystal 4 and the polycrystalline layer 5 was
The polycrystalline layer 5 is converted to α-SiC by heat treatment in a temperature range of 00 to 2400 ° C., preferably 2000 to 2200 ° C. and under a saturated vapor pressure of SiC, so that the polycrystalline layer 5 has the same orientation as the crystal axis of the seed crystal 4. The oriented single crystal 2A is integrally grown by solid phase growth. The growth surface (C surface) of the grown single crystal 2A solid-phase grown as described above is polished with diamond abrasive grains, and RM
S5 angstrom flat surface and size 20mm
Holds a grown single crystal 2A having a thickness of 300 μm and a seed crystal 4
To produce an intermediate material 7 having an overall thickness of about 1.5 mm.

【0021】(2)SOI構造の基板製造方法(図3参
照): 中間素材7における育成単結晶2A中に水素イオンH
+ を100keVの加電圧でドーズ量2×1016〜1×
1017/cm2 の範囲で注入する。このときの注入加速
電圧を調整することにより、水素原子の濃度分布のピー
クを厚さt1=2.5〜3.0μmの範囲に任意にコン
トロールすることが可能である。 しかる後、上記育成単結晶2Aの表面に、マグネロト
ンスパッタ装置を用いて、100mmのSiO2 板をタ
ーゲットにSiO2 粉体をスパッタリングすることによ
り、接合層の一例として1000オングストロームのS
iO2 層8を成膜する。 次に、中間素材7におけるSiO2 層8をSiまたは
SiCの多結晶体からなる基板支持体3の鏡面に対峙さ
せて積層し、かつ、5kg/cm2 の加圧力を負荷した
状態でAr雰囲気中において、5時間かけて室温から8
00℃まで加熱昇温するとともに、800℃から110
0℃まで2時間かけて加熱昇温保持した後、室温まで降
温させて除荷することにより、水素イオンの平均侵入深
さで育成単結晶本体2´から3.0μm厚さの薄膜状育
成単結晶層2を剥離分割するとともに、その薄膜状育成
単結晶層2をSiO2 層8を介して基板支持体3に融着
一体化して図1に示すような半導体素子エピタキシャル
成長用基板1を作成する。 その半導体素子エピタキシャル成長用基板1における
薄膜状育成単結晶2の表面をプラズマ放電加工すること
により、表面変質を除去処理する。この表面変質除去後
の表面を光干渉式粗さ測定装置で測定したところ、RM
S8オングストロームの表面粗さであり、CaNなど半
導体素子エピキタシャル成長面として良好であることが
確認できた。
(2) Substrate manufacturing method of SOI structure (see FIG. 3): Hydrogen ions H are formed in the grown single crystal 2A in the intermediate material 7.
Dose 2 × 10 16 ~1 × + at applied voltage of 100keV
Implant in the range of 10 17 / cm 2 . By adjusting the injection acceleration voltage at this time, it is possible to arbitrarily control the peak of the concentration distribution of the hydrogen atoms to a thickness t1 in the range of 2.5 to 3.0 μm. Thereafter, the surface of the grown single crystal 2A is sputtered with SiO 2 powder using a magnetroton sputtering apparatus with a 100 mm SiO 2 plate as a target, so that 1000 Å of S as an example of a bonding layer.
An iO 2 layer 8 is formed. Next, the SiO 2 layer 8 in the intermediate material 7 is laminated so as to face the mirror surface of the substrate support 3 made of polycrystal of Si or SiC, and an Ar atmosphere is applied under a pressure of 5 kg / cm 2. In room temperature from 8 to 5 hours
While heating to 00 ° C, the temperature is raised from 800 ° C to 110 ° C.
After heating and maintaining the temperature at 0 ° C. for 2 hours, the temperature is lowered to room temperature and unloaded, so that a 3.0 μm-thick thin-film grown single crystal is grown from the grown single crystal main body 2 ′ at an average penetration depth of hydrogen ions. The crystal layer 2 is separated and separated, and the thin film grown single crystal layer 2 is fused and integrated with the substrate support 3 via the SiO 2 layer 8 to produce the semiconductor element epitaxial growth substrate 1 as shown in FIG. . The surface of the thin-film grown single crystal 2 on the semiconductor element epitaxial growth substrate 1 is subjected to plasma discharge machining to remove surface alteration. When the surface after the surface alteration was removed was measured with a light interference type roughness measuring device, RM
It was confirmed that the surface roughness was S8 angstroms, which was favorable as a semiconductor element epitaxial growth surface such as CaN.

【0022】上記のようにして半導体素子エピタキシャ
ル成長用基板1が分離された後の種結晶4が一体のまま
にある残部の育成単結晶本体2´は、未だ297μmの
厚さを有しており、また、その残部の育成単結晶本体2
´の表面粗さはRMS10オングストローム程度であ
り、研磨しないで上記〜の工程を複数回、具体的に
は、約100回繰り返し使用することによって、100
個程度の均質な半導体素子エピタキシャル成長用基板1
を製造することが可能であり、高価な育成単結晶の繰り
返し再利用率を大きくして基板1の製造コスト、ひいて
は、基板単価の低減を達成することができる。
The remaining grown single crystal main body 2 ′ in which the seed crystal 4 remains separated after the semiconductor element epitaxial growth substrate 1 is separated as described above still has a thickness of 297 μm. Further, the remaining grown single crystal body 2
'Has a surface roughness of about 10 Angstroms RMS, and the above-mentioned steps (1) to (4) are repeated a plurality of times, specifically, about 100 times without polishing.
Substrate 1 for homogenous semiconductor device epitaxial growth
Can be manufactured, and the recycle rate of the expensive grown single crystal can be increased to reduce the manufacturing cost of the substrate 1 and, consequently, the unit cost of the substrate.

【0023】また、上記〜の工程の複数回、具体的
には、約100回の繰り返しによって残った種結晶4に
ついては、上記(1)における〜工程の固相成長に
よる単結晶2Aの育成、さらにはそれに続く上記(2)
における〜工程の基板製造にリサイクル使用するこ
とが可能であり、このように種結晶4自体のリサイクル
によってエピタキシャル成長用基板1の製造コストの一
層の低減を図ることができる。
The seed crystal 4 remaining by repeating the above-mentioned steps a plurality of times, specifically, about 100 times, is obtained by growing the single crystal 2A by the solid-phase growth of the above-mentioned steps (1) in (1). Furthermore, the following (2)
It is possible to recycle the substrate in the steps (1) to (4), and it is possible to further reduce the manufacturing cost of the epitaxial growth substrate 1 by recycling the seed crystal 4 itself.

【0024】なお、上記実施の形態では、薄膜状の育成
単結晶層2とSiまたはSiCからなる基板支持体3と
の融着一体化のための接合層として、熱伝導性に優れエ
ピタキシャル成長用基板1の製造熱処理時の昇温及び冷
却性がよく、その結果、基板製造効率の向上に寄与する
SiO2 層8を用いたが、これに代えて、870℃近傍
で軟化流動するガラス層を用いてもよく、この場合は、
基板の結晶品質の一層の向上を図ることができる。
In the above-described embodiment, the substrate for epitaxial growth has excellent thermal conductivity as a bonding layer for fusing and integrating the thin-film grown single crystal layer 2 and the substrate support 3 made of Si or SiC. The SiO 2 layer 8, which has good temperature rise and cooling properties during the production heat treatment and contributes to the improvement of the substrate production efficiency, was used. Instead, a glass layer softening and flowing at around 870 ° C. was used. In this case,
The crystal quality of the substrate can be further improved.

【0025】[0025]

【発明の効果】以上のように、請求項1及び請求項2並
びに請求項9及び請求項10に記載の発明によれば、半
導体素子エピタキシャル成長用基板の成長面となる主要
材料として、本発明者らが永年に亘る鋭意研究の成果と
して育成に成功し、従来より用いられていたSi基板や
SiCエピタキシャル層に比べて高品位、高抵抗で、か
つ高温特性、高周波特性にも優れ、また、サファイヤ基
板に比べて電気導通性に優れ、かつ基板裏面に自由に電
極を設けるなど半導体素子の構造形態の制約が少ない上
に、半導体素子エピタキシャル成長時におけるエピタキ
シャル層との間の結晶格子の不整合が非常に少ないとい
った多くの優位性を有する固相成長による育成単結晶を
使用することによって、半導体素子をエピキタシャル成
長する時の結晶品質の向上が図れ、電気的特性に非常に
優れた基板を得ることができる。しかも、高品位、高抵
抗で結晶格子の不整合の小さい育成単結晶をバルク状で
使用するのではなく、水素イオンの注入法といった材料
ロスをほとんど招くことのない手段で薄膜状に剥離分割
して用い、かつ、薄膜状に剥離分割された育成単結晶層
を接合層を介して支持体に融着一体化させて取扱い上支
障のない厚み、強度を確保することによって、高価な育
成単結晶の使用量及びロスを最少必要限に抑えるととも
に研磨、研削等を不要にして製造工程の削減を図ること
ができ、したがって、上述したような電気的特性に非常
に優れた基板の製造コストを低減し基板単価の著しい低
下を図ることができるという効果を奏する。
As described above, according to the first and second aspects and the ninth and tenth aspects of the present invention, the present inventor uses the main material for forming the growth surface of the substrate for epitaxially growing a semiconductor device. Have succeeded in cultivating them as a result of years of dedicated research, and have higher quality, higher resistance, higher temperature characteristics and higher frequency characteristics than conventional Si substrates and SiC epitaxial layers. It has better electrical conductivity than the substrate and has few restrictions on the structure of the semiconductor device, such as the provision of electrodes freely on the back surface of the substrate.In addition, there is very little mismatch of the crystal lattice between the semiconductor device and the epitaxial layer during epitaxial growth. By using a single crystal grown by solid phase growth, which has many advantages, such as a small number of crystals, a crystal product for epitaxial growth of a semiconductor device Can be a better Hakare, obtain a very good substrate electrical characteristics. In addition, instead of using a single crystal grown with high quality, high resistance and small crystal lattice mismatch in bulk, it is separated into thin films by means such as hydrogen ion implantation, which hardly causes material loss. In addition, the grown single crystal layer peeled and divided into a thin film is fused and integrated with a support via a bonding layer to secure a thickness and strength without any trouble in handling, so that an expensive grown single crystal is obtained. In addition to minimizing the use amount and the loss, the number of manufacturing steps can be reduced by eliminating the need for polishing, grinding, etc., thus reducing the manufacturing cost of a substrate having excellent electrical characteristics as described above. This has the effect of significantly reducing the unit cost of the substrate.

【0026】特に、製造方法において、薄膜状育成単結
晶が剥離分離された後の種結晶と一体のままにある残部
の高品位、高抵抗の育成単結晶本体を水素イオンの注入
法によりロスなく薄膜状に剥離分割して複数のエピタキ
シャル成長用基板の主要材料に有効利用することによっ
て製造歩留まりの向上が図れ、基板全体の製造コスト、
ひいては、基板単価のより一層の低減を図ることができ
る。
In particular, in the manufacturing method, the remaining high-quality and high-resistance grown single crystal body which remains integral with the seed crystal after the thin-film grown single crystal is separated and separated by the hydrogen ion implantation method without loss. Separation into thin films and effective use as the main material of a plurality of substrates for epitaxial growth can improve the manufacturing yield, and can reduce the manufacturing cost of the entire substrate,
As a result, the unit cost of the substrate can be further reduced.

【0027】また、請求項11に記載したように、エピ
タキシャル成長用基板が分離された後の種結晶と一体の
ままにある残部の育成単結晶本体を複数回剥離分割して
サイクル利用する工程を複数回繰り返した後に残った種
結晶を育成単結晶の固相成長に繰り返し使用する場合
は、種結晶自体のリサイクルによってエピタキシャル成
長用基板の製造コストの一層の低減を図ることができる
という効果も奏する。
[0027] As described in the eleventh aspect, a plurality of steps of separating and dividing the remaining grown single crystal main body, which remains integral with the seed crystal after the epitaxial growth substrate is separated, and performing cycle use are performed. When the seed crystal left after the repetition is repeatedly used for the solid phase growth of the grown single crystal, there is an effect that the cost of manufacturing the substrate for epitaxial growth can be further reduced by recycling the seed crystal itself.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る半導体素子エピタキシャル成長用
基板の縦断面図である。
FIG. 1 is a longitudinal sectional view of a semiconductor device epitaxial growth substrate according to the present invention.

【図2】同半導体素子エピタキシャル成長用基板の製造
方法のうち、固相成長による単結晶の育成方法を工程順
に示す概略断面図である。
FIG. 2 is a schematic cross-sectional view showing a method of growing a single crystal by solid-phase growth in a method of manufacturing the substrate for epitaxial growth of a semiconductor device.

【図3】同半導体素子エピタキシャル成長用基板の製造
方法のうち、SOI構造の基板製造方法を工程順に示す
概略断面図である。
FIG. 3 is a schematic cross-sectional view showing, in the order of steps, a method of manufacturing a substrate having an SOI structure in the method of manufacturing a substrate for semiconductor element epitaxial growth.

【符号の説明】[Explanation of symbols]

1 半導体素子エピタキシャル成長用基板 2 薄膜状育成単結晶層 2A 育成単結晶 2´ 育成単結晶本体 3 基板支持体 4 種結晶 8 SiO2 層(接合層の一例)DESCRIPTION OF SYMBOLS 1 Substrate for epitaxial growth of a semiconductor element 2 Thin-film grown single crystal layer 2A Grown single crystal 2 'Grown single crystal main body 3 Substrate support 4 Seed crystal 8 SiO 2 layer (an example of a bonding layer)

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4G077 AA03 BE08 CA00 DB01 ED04 FE06 FE11 FF01 FF03 FJ03 FJ06 HA12 5F041 AA40 CA33 CA40 5F045 AB14 AF19 5F073 CA02 CB04 DA07 DA14 DA35 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4G077 AA03 BE08 CA00 DB01 ED04 FE06 FE11 FF01 FF03 FJ03 FJ06 HA12 5F041 AA40 CA33 CA40 5F045 AB14 AF19 5F073 CA02 CB04 DA07 DA14 DA35

Claims (17)

【特許請求の範囲】[Claims] 【請求項1】 SiC単結晶を種結晶として成長された
育成単結晶中への水素イオンの注入によって育成単結晶
本体から薄膜状に剥離分割された育成単結晶層と、基板
支持体とが、800〜950℃の温度範囲で軟化流動可
能な接合層を介して融着一体化されていることを特徴と
する半導体素子エピタキシャル成長用基板。
1. A growth single crystal layer separated into a thin film from a growth single crystal body by implanting hydrogen ions into a growth single crystal grown using a SiC single crystal as a seed crystal, and a substrate support, A substrate for epitaxial growth of a semiconductor device, wherein the substrate is integrated by fusion bonding via a bonding layer capable of softening and flowing in a temperature range of 800 to 950 ° C.
【請求項2】 上記育成単結晶は、種結晶の固相成長に
より育成されたものである請求項1に記載の半導体素子
エピタキシャル成長用基板。
2. The substrate for epitaxial growth of a semiconductor device according to claim 1, wherein the grown single crystal is grown by solid phase growth of a seed crystal.
【請求項3】 上記育成単結晶層が、2.5〜10μm
の厚さに剥離分割されている請求項1または2に記載の
半導体素子エピタキシャル成長用基板。
3. The growth single crystal layer has a thickness of 2.5 to 10 μm.
3. The substrate for epitaxial growth of a semiconductor device according to claim 1, wherein the substrate is separated by separation into a thickness of:
【請求項4】 上記基板支持体として、SiまたはSi
Cの多結晶体を用いる請求項1ないし3のいずれかに記
載の半導体素子エピタキシャル成長用基板。
4. The method according to claim 1, wherein the substrate support is Si or Si.
4. The substrate for epitaxial growth of a semiconductor device according to claim 1, wherein a polycrystalline body of C is used.
【請求項5】 上記基板支持体に融着一体化された薄膜
状育成単結晶層は、その表面変質の除去処理が施されて
いる請求項1ないし4のいずれかに記載の半導体素子エ
ピタキシャル成長用基板。
5. The semiconductor element epitaxial growth method according to claim 1, wherein the thin film-grown single crystal layer fused and integrated with the substrate support has been subjected to a treatment for removing a surface alteration thereof. substrate.
【請求項6】 上記接合層が、SiO2 層である請求項
1ないし5のいずれかに記載の半導体素子エピタキシャ
ル成長用基板。
6. The substrate for epitaxial growth of a semiconductor device according to claim 1, wherein said bonding layer is an SiO 2 layer.
【請求項7】 上記接合層が、800〜950℃の温度
範囲で軟化流動可能なガラス層である請求項1ないし5
のいずれかに記載の半導体素子エピタキシャル成長用基
板。
7. The glass layer according to claim 1, wherein said bonding layer is a glass layer capable of softening and flowing at a temperature in the range of 800 to 950 ° C.
The substrate for epitaxial growth of a semiconductor device according to any one of the above.
【請求項8】 上記SiO2 層が、SiO2 粉体もしく
はシリコン化合物の塗布あるいはスパッタリングにより
膜状に形成されたものである請求項6に記載の半導体素
子エピタキシャル成長用基板。
8. The substrate for epitaxial growth of a semiconductor device according to claim 6, wherein the SiO 2 layer is formed in a film shape by coating or sputtering of SiO 2 powder or a silicon compound.
【請求項9】 SiC単結晶を種結晶として成長された
育成単結晶中にその表面側から水素イオンを注入する工
程と、 育成単結晶の表面に800〜950℃の温度範囲で軟化
流動可能な接合層を形成する工程と、 その接合層の表面に基板支持体を積層させ、かつ、押圧
しながら加熱処理することにより、水素イオンの平均侵
入深さで育成単結晶本体から薄膜状の育成単結晶層を剥
離分割するとともに、その薄膜状育成単結晶層と基板支
持体とを接合層を介して融着一体化してエピタキシャル
成長用基板を作成する工程とを備え、 エピタキシャル成長用基板が分離された後の種結晶と一
体のままにある残部の育成単結晶本体に対して上記の工
程を複数回繰り返して複数のエピタキシャル成長用基板
を作成することを特徴とする半導体素子エピタキシャル
成長用基板の製造方法。
9. A step of implanting hydrogen ions from the surface side into a grown single crystal grown using a SiC single crystal as a seed crystal, and capable of softening and flowing to the surface of the grown single crystal at a temperature in the range of 800 to 950 ° C. Forming a bonding layer, laminating a substrate support on the surface of the bonding layer, and performing heat treatment while pressing to form a thin film-shaped growth unit from the grown single crystal body at an average penetration depth of hydrogen ions. Separating and separating the crystal layer and fusing and integrating the thin film grown single crystal layer and the substrate support through a bonding layer to form an epitaxial growth substrate, after the epitaxial growth substrate is separated. A plurality of substrates for epitaxial growth by repeating the above steps a plurality of times for the remaining grown single crystal body that remains integral with the seed crystal of A method for manufacturing a substrate for axial growth.
【請求項10】 上記育成単結晶は、種結晶の固相成長
により育成されたものである請求項9に記載の半導体素
子エピタキシャル成長用基板の製造方法。
10. The method according to claim 9, wherein the grown single crystal is grown by solid phase growth of a seed crystal.
【請求項11】 エピタキシャル成長用基板が分離され
た後の種結晶と一体のままにある残部の育成単結晶本体
に対する上記工程の複数回繰り返しによって残った種結
晶を育成単結晶の固相成長に繰り返し使用する請求項1
0に記載の半導体素子エピタキシャル成長用基板の製造
方法。
11. The seed crystal remaining by repeating the above-mentioned steps a plurality of times for the remaining grown single crystal body which remains integral with the seed crystal after the substrate for epitaxial growth has been separated is repeated for solid phase growth of the grown single crystal. Claim 1 to use
0. The method for manufacturing a substrate for epitaxial growth of a semiconductor device according to item 0.
【請求項12】 上記育成単結晶層は、2.5〜10μ
mの厚さで育成単結晶本体から剥離分割される請求項9
ないし11のいずれかに記載の半導体素子エピタキシャ
ル成長用基板の製造方法。
12. The grown single crystal layer has a thickness of 2.5 to 10 μm.
10. The substrate is separated from the grown single crystal body by a thickness of m.
12. The method of manufacturing a substrate for epitaxially growing a semiconductor device according to any one of claims 11 to 11.
【請求項13】 上記基板支持体として、SiまたはS
iCの多結晶体を使用する請求項9ないし12のいずれ
かに記載の半導体素子エピタキシャル成長用基板の製造
方法。
13. The method according to claim 13, wherein the substrate support is Si or S.
The method for producing a substrate for epitaxial growth of a semiconductor device according to claim 9, wherein a polycrystalline body of iC is used.
【請求項14】 上記基板支持体に融着一体化された薄
膜状育成単結晶層の表面に対する変質除去処理が施され
る請求項9ないし13のいずれかに記載の半導体素子エ
ピタキシャル成長用基板の製造方法。
14. The method of manufacturing a substrate for epitaxial growth of a semiconductor device according to claim 9, wherein the surface of the thin-film grown single crystal layer fused and integrated with the substrate support is subjected to a property-removing treatment. Method.
【請求項15】 上記接合層として、SiO2 層を用い
る請求項9ないし14のいずれかに記載の半導体素子エ
ピタキシャル成長用基板の製造方法。
15. The method according to claim 9, wherein an SiO 2 layer is used as the bonding layer.
【請求項16】 上記接合層として、800〜950℃
の温度範囲で軟化流動可能なガラス層を用いる請求項9
ないし14のいずれかに記載の半導体素子エピタキシャ
ル成長用基板の製造方法。
16. The bonding layer has a temperature of 800 to 950 ° C.
10. A glass layer capable of softening and flowing in a temperature range of
15. The method of manufacturing a substrate for epitaxially growing a semiconductor device according to any one of the above items.
【請求項17】 上記SiO2 層が、SiO2 粉体もし
くはシリコン化合物の塗布あるいはスパッタリングによ
り膜状に形成されたものである請求項15に記載の半導
体素子エピタキシャル成長用基板の製造方法。
17. The method for manufacturing a substrate for epitaxial growth of a semiconductor device according to claim 15, wherein the SiO 2 layer is formed in a film shape by coating or sputtering of SiO 2 powder or a silicon compound.
JP2001159045A 2001-05-28 2001-05-28 Substrate for semiconductor device epitaxial growth and method for producing the same Pending JP2002348198A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001159045A JP2002348198A (en) 2001-05-28 2001-05-28 Substrate for semiconductor device epitaxial growth and method for producing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001159045A JP2002348198A (en) 2001-05-28 2001-05-28 Substrate for semiconductor device epitaxial growth and method for producing the same

Publications (1)

Publication Number Publication Date
JP2002348198A true JP2002348198A (en) 2002-12-04

Family

ID=19002687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001159045A Pending JP2002348198A (en) 2001-05-28 2001-05-28 Substrate for semiconductor device epitaxial growth and method for producing the same

Country Status (1)

Country Link
JP (1) JP2002348198A (en)

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006527480A (en) * 2003-06-06 2006-11-30 コミツサリア タ レネルジー アトミーク Method for producing ultrathin layer thinned by inducing self-supporting
WO2008126706A1 (en) * 2007-04-06 2008-10-23 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
WO2008132904A1 (en) * 2007-04-13 2008-11-06 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
JP2009151293A (en) * 2007-11-30 2009-07-09 Semiconductor Energy Lab Co Ltd Display device, manufacturing method of display device and electronic equipment
JP2010010667A (en) * 2008-05-30 2010-01-14 Semiconductor Energy Lab Co Ltd Photoelectric conversion device and method for manufacturing the same
US7674647B2 (en) 2007-11-30 2010-03-09 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US7858431B2 (en) 2007-11-30 2010-12-28 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing photoelectric conversion device
US7951656B2 (en) 2008-06-06 2011-05-31 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7964429B2 (en) 2007-11-01 2011-06-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US7985604B2 (en) 2007-11-30 2011-07-26 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing photoelectric conversion device
KR101055763B1 (en) * 2004-11-24 2011-08-11 서울반도체 주식회사 Separation of nitride semiconductor layer from substrate using ion implantation layer
US8008169B2 (en) 2007-12-28 2011-08-30 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
JP2012146695A (en) * 2011-01-06 2012-08-02 Denso Corp Silicon carbide semiconductor substrate, silicon carbide semiconductor device, method of manufacturing silicon carbide semiconductor substrate, and method of manufacturing silicon carbide semiconductor device
US8338218B2 (en) 2008-06-26 2012-12-25 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device module and manufacturing method of the photoelectric conversion device module
US8394655B2 (en) 2007-11-09 2013-03-12 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and method for manufacturing the same
US8975169B2 (en) 2011-08-22 2015-03-10 The University Of Surrey Method of manufacture of an optoelectronic device and an optoelectronic device manufactured using the method
US8994009B2 (en) 2011-09-07 2015-03-31 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device
US9029184B2 (en) 2008-03-28 2015-05-12 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and method for manufacturing the same
JP2020152625A (en) * 2019-03-23 2020-09-24 株式会社新興製作所 Epitaxial compound composite substrate and method for manufacturing the same

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006527480A (en) * 2003-06-06 2006-11-30 コミツサリア タ レネルジー アトミーク Method for producing ultrathin layer thinned by inducing self-supporting
KR101055763B1 (en) * 2004-11-24 2011-08-11 서울반도체 주식회사 Separation of nitride semiconductor layer from substrate using ion implantation layer
WO2008126706A1 (en) * 2007-04-06 2008-10-23 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
US8828789B2 (en) 2007-04-06 2014-09-09 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
WO2008132904A1 (en) * 2007-04-13 2008-11-06 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
US8415231B2 (en) 2007-04-13 2013-04-09 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
CN101657907B (en) * 2007-04-13 2012-12-26 株式会社半导体能源研究所 Photovoltaic device and method for manufacturing the same
US8044296B2 (en) 2007-04-13 2011-10-25 Semiconductor Energy Laboratory Co., Ltd. Photovoltaic device and method for manufacturing the same
US7964429B2 (en) 2007-11-01 2011-06-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US8394655B2 (en) 2007-11-09 2013-03-12 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and method for manufacturing the same
US8143087B2 (en) 2007-11-30 2012-03-27 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing photoelectric conversion device
JP2009151293A (en) * 2007-11-30 2009-07-09 Semiconductor Energy Lab Co Ltd Display device, manufacturing method of display device and electronic equipment
US7985604B2 (en) 2007-11-30 2011-07-26 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing photoelectric conversion device
US8674368B2 (en) 2007-11-30 2014-03-18 Semiconductor Energy Laboratory Co., Ltd. Display device and method for manufacturing thereof
US7871849B2 (en) 2007-11-30 2011-01-18 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US8507313B2 (en) 2007-11-30 2013-08-13 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing photoelectric conversion device
US7674647B2 (en) 2007-11-30 2010-03-09 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US7858431B2 (en) 2007-11-30 2010-12-28 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing photoelectric conversion device
US8008169B2 (en) 2007-12-28 2011-08-30 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US9029184B2 (en) 2008-03-28 2015-05-12 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and method for manufacturing the same
JP2010010667A (en) * 2008-05-30 2010-01-14 Semiconductor Energy Lab Co Ltd Photoelectric conversion device and method for manufacturing the same
US8173496B2 (en) 2008-06-06 2012-05-08 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7951656B2 (en) 2008-06-06 2011-05-31 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US8338218B2 (en) 2008-06-26 2012-12-25 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device module and manufacturing method of the photoelectric conversion device module
JP2012146695A (en) * 2011-01-06 2012-08-02 Denso Corp Silicon carbide semiconductor substrate, silicon carbide semiconductor device, method of manufacturing silicon carbide semiconductor substrate, and method of manufacturing silicon carbide semiconductor device
US8975169B2 (en) 2011-08-22 2015-03-10 The University Of Surrey Method of manufacture of an optoelectronic device and an optoelectronic device manufactured using the method
US8994009B2 (en) 2011-09-07 2015-03-31 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device
JP2020152625A (en) * 2019-03-23 2020-09-24 株式会社新興製作所 Epitaxial compound composite substrate and method for manufacturing the same

Similar Documents

Publication Publication Date Title
KR101797428B1 (en) Single-crystal diamond growth base material and method for manufacturing single-crystal diamond substrate
EP3351660B1 (en) Manufacturing method of sic composite substrate
JP2002348198A (en) Substrate for semiconductor device epitaxial growth and method for producing the same
JP6544166B2 (en) Method of manufacturing SiC composite substrate
JP5377212B2 (en) Method for producing single crystal diamond substrate
US7538010B2 (en) Method of fabricating an epitaxially grown layer
JP5031365B2 (en) Method for forming epitaxial growth layer
EP3349237B1 (en) Method for manufacturing sic composite substrate, and method for manufacturing semiconductor substrate
CN101521155B (en) Method for preparing substrate having monocrystalline film
JP2011079683A (en) Base material for growing single crystal diamond and method for producing single crystal diamond substrate
EP3352197B1 (en) Method for producing a composite sic substrate
EP1664396A1 (en) A method of fabricating an epitaxially grown layer
US7605055B2 (en) Wafer with diamond layer
TW202141582A (en) PROCESS FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN LAYER MADE OF MONOCRYSTALLINESiC ON A CARRIER SUBSTRATE MADE OF SiC
JP6737378B2 (en) SiC composite substrate
KR20000068876A (en) SINGLE CRYSTAL SiC AND PROCESS FOR PREPARING THE SAME
KR102523183B1 (en) Method for producing a two-dimensional film of hexagonal crystal structure
TW202205357A (en) Process for manufacturing a composite structure comprising a thin layer of monocrystalline sic on a carrier substrate made of sic

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050214

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050301

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20050628