JP2002344120A - Flexible circuit board and its manufacturing method - Google Patents

Flexible circuit board and its manufacturing method

Info

Publication number
JP2002344120A
JP2002344120A JP2001142735A JP2001142735A JP2002344120A JP 2002344120 A JP2002344120 A JP 2002344120A JP 2001142735 A JP2001142735 A JP 2001142735A JP 2001142735 A JP2001142735 A JP 2001142735A JP 2002344120 A JP2002344120 A JP 2002344120A
Authority
JP
Japan
Prior art keywords
wiring pattern
circuit wiring
circuit board
polyimide resin
flexible circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001142735A
Other languages
Japanese (ja)
Inventor
Fumihiko Matsuda
文彦 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Priority to JP2001142735A priority Critical patent/JP2002344120A/en
Publication of JP2002344120A publication Critical patent/JP2002344120A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a flexible circuit board on which a circuit wiring pattern can be narrowed in pitch and lowered in dielectric constant, and to provide a method of manufacturing the circuit board. SOLUTION: A required circuit wiring pattern 2 is formed on at least one surface of an insulating base material 1 and an electrodeposited polyimide resin layer 4 is formed on the whole surface of the pattern 2 except openings 5 which become outside connecting terminal sections in the pattern 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、回路配線パターン
の狭ピッチ化と低誘電率化とを達成可能な可撓性回路基
板及びその製造法に関する。
[0001] 1. Field of the Invention [0002] The present invention relates to a flexible circuit board capable of achieving a narrow pitch and a low dielectric constant of a circuit wiring pattern and a method of manufacturing the same.

【0002】[0002]

【従来の技術】近年、電子機器の小型化と高機能化は益
々促進されてきており、その為に回路配線基板にも、高
密度実装と信号の高速化に対応可能な回路配線パターン
の狭ピッチ化と低誘電率化の要求が高まってきている。
2. Description of the Related Art In recent years, the miniaturization and the enhancement of functions of electronic devices have been increasingly promoted. For this reason, circuit wiring patterns on a circuit wiring board have been required to have a narrow circuit wiring pattern capable of supporting high-density mounting and high-speed signals. There is an increasing demand for a pitch and a low dielectric constant.

【0003】これに対して、従来の可撓性回路基板は、
絶縁ベース材の少なくとも一方面に銅箔などの導電層を
有する積層板を用意し、この導電層に対してエッチング
処理を施して所望の回路配線パターンを形成した後、外
部接続端子部などの所要部位に開口を有するポリイミド
フィルム等の絶縁性フィルムを接着して回路配線パター
ンの表面保護層を形成し、最後に外形加工をして製作さ
れる。
On the other hand, a conventional flexible circuit board is
Prepare a laminate having a conductive layer such as a copper foil on at least one surface of the insulating base material, perform an etching process on the conductive layer to form a desired circuit wiring pattern, and then perform a required process such as an external connection terminal portion. An insulating film such as a polyimide film having an opening at a site is adhered to form a surface protection layer of a circuit wiring pattern, and finally, an outer shape is manufactured.

【0004】上記製造方法では、微細な端子構造を形成
する事が困難な為、近年では、図3(1)から(3)に
示すような方法が採用されるようになってきた。同図に
於いては、片面型可撓性回路基板を用いて説明する。
In the above manufacturing method, it is difficult to form a fine terminal structure, and in recent years, methods shown in FIGS. 3A to 3C have been adopted. In the figure, description will be made using a single-sided flexible circuit board.

【0005】先ず、図3(1)に示す様に、絶縁ベース
材20の一方面に銅箔を有する銅張り積層板を用意し、
その銅箔に対してフォトリソグラフィーとエッチング手
法により回路配線パターン21を形成する。
First, as shown in FIG. 3A, a copper-clad laminate having a copper foil on one surface of an insulating base material 20 is prepared.
A circuit wiring pattern 21 is formed on the copper foil by photolithography and etching.

【0006】次いで、同図(2)の様に、回路配線パタ
ーン21側の全面に感光性カバーコート22を塗布する
か、ラミネートし、次に、上記感光性カバーコート22
に対して、露光、現像及び硬化処理を施し、外部接続用
端子部に所要の開口25を有する回路配線パターン21
の表面保護層24を形成し、最後に外形加工を施して可
撓性回路基板を製作する。
Next, as shown in FIG. 2B, a photosensitive cover coat 22 is applied or laminated on the entire surface of the circuit wiring pattern 21 side.
To the circuit wiring pattern 21 having a required opening 25 in the external connection terminal portion.
The surface protection layer 24 is formed, and finally, the outer shape processing is performed to manufacture a flexible circuit board.

【0007】表面保護層としては、上記感光性カバーコ
ート以外にも、非感光性樹脂を塗工し、硬化処理を施し
た後、レーザー照射やプラズマエッチング処理、又はそ
の他、公知の方法で開口を形成する方法も採用されてい
る。
As the surface protective layer, in addition to the above-described photosensitive cover coat, a non-photosensitive resin is applied and cured, and then the opening is formed by laser irradiation, plasma etching, or other known methods. A forming method is also employed.

【0008】[0008]

【発明が解決しようとする課題】上述の方法で得られる
可撓性回路基板は、回路配線パターン間に表面保護層と
しての接着剤、ポリイミドフィルム或いはカバーコート
樹脂が存在し、低誘電率化の要求を達成する事は困難で
ある。
The flexible circuit board obtained by the above-mentioned method has an adhesive, a polyimide film or a cover coat resin as a surface protective layer between circuit wiring patterns, and has a low dielectric constant. It is difficult to achieve the requirements.

【0009】そこで、表面保護層の回路配線パターン間
に位置する部分の少なくとも一部を除去して空隙を形成
し、誘電率を低下させようとの試みもなされたが、上記
表面保護層の形成方法を採用して、上記空隙を形成しよ
うとすると、先ず、感光性カバーコートを用いた場合
は、露光時の精密な位置合わせが求められる事、また、
レーザーによる加工手段でも、精密な位置合わせが要求
されるのみならず、開口の一括加工が困難である為、安
定的、且つ、安価に可撓性回路基板を提供する事が困難
となる。
Attempts have been made to reduce the dielectric constant by removing at least a part of the surface protective layer located between the circuit wiring patterns to form a void. When trying to form the above-mentioned gap by adopting the method, first, when a photosensitive cover coat is used, precise alignment at the time of exposure is required,
Even with laser processing means, precise alignment is required, and since it is difficult to collectively process openings, it becomes difficult to provide a flexible circuit board stably and at low cost.

【0010】また、その加工寸法にも限界があり、上記
問題と併せて、回路配線パターンの狭ピッチ化を達成す
る事は困難なものとなる。
[0010] Further, there is a limit to the processing dimensions, and in addition to the above-mentioned problems, it is difficult to achieve a narrow pitch of the circuit wiring pattern.

【0011】そこで本発明は、上記問題を好適に解消可
能な可撓性回路基板及びその為の製造法を提供するもの
である。
Accordingly, the present invention provides a flexible circuit board capable of suitably solving the above-mentioned problems, and a manufacturing method therefor.

【0012】[0012]

【課題を解決するための手段】その為に本発明の可撓性
回路基板では、絶縁ベース材の少なくとも一方面に、回
路配線パターンを有し、該回路配線パターンは、外部接
続用端子部を除く全面に、各々の回路配線パターンに対
して独立した電着ポリイミド樹脂による表面保護層を形
成したことを特徴とするものである。
For this purpose, the flexible circuit board of the present invention has a circuit wiring pattern on at least one surface of the insulating base material, and the circuit wiring pattern has a terminal portion for external connection. A surface protection layer made of an electrodeposited polyimide resin independent of each circuit wiring pattern is formed on the entire surface except for the above.

【0013】また、その為の製造法としては、絶縁ベー
ス材の少なくとも一方面に回路配線パターンを形成し、
該回路配線パターン上の外部接続用端子部となる部位に
レジスト層を形成した後、上記回路配線パターンに対し
て電着ポリイミド樹脂層を電着させ、次いで上記レジス
ト層を剥離し、上記電着ポリイミド樹脂層に対する硬化
処理を施す各工程を有する手法が採用される。
As a manufacturing method therefor, a circuit wiring pattern is formed on at least one surface of the insulating base material,
After forming a resist layer on the circuit wiring pattern at a portion to be an external connection terminal portion, an electrodeposited polyimide resin layer is electrodeposited on the circuit wiring pattern, and then the resist layer is peeled off. A method having each step of performing a curing treatment on the polyimide resin layer is employed.

【0014】更に他の製造法としては、絶縁ベース材の
少なくとも一方面に、回路配線パターンを形成し、該回
路配線パターンに対して電着ポリイミド樹脂層の電着及
び硬化処理を施した後、外部接続用端子部となる部位に
開口を有するレジスト層を形成し、該レジスト層を用い
て上記電着ポリイミド樹脂層をエッチング除去する各工
程を有する手法が採用される。
As still another manufacturing method, a circuit wiring pattern is formed on at least one surface of the insulating base material, and the circuit wiring pattern is subjected to electrodeposition and curing of an electrodeposited polyimide resin layer. A method is adopted in which a resist layer having an opening is formed at a portion to be an external connection terminal portion, and the electrodeposited polyimide resin layer is etched away using the resist layer.

【0015】ここで、電着ポリイミド樹脂層をエッチン
グ除去する方法は、化学エッチング処理又はプラズマエ
ッチング処理或いはレーザー加工処理が採用される。
Here, as a method of etching and removing the electrodeposited polyimide resin layer, a chemical etching process, a plasma etching process, or a laser processing process is employed.

【0016】[0016]

【発明の実施の形態】以下、図示の実施例を参照しなが
ら本発明を更に説明する。図1(1)から(4)は本発
明による可撓性回路基板の製造工程図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be further described below with reference to the illustrated embodiments. 1 (1) to 1 (4) are manufacturing process diagrams of a flexible circuit board according to the present invention.

【0017】先ず、同図(1)に示す様に、ポリイミド
フィルム等の絶縁ベース材1の少なくとも一方面に導電
層としての銅箔を有する銅張り積層板を用意し、その銅
箔に対しフォトリソグラフィーとエッチング手法により
所要の回路配線パターン2を形成する。
First, as shown in FIG. 1A, a copper-clad laminate having a copper foil as a conductive layer on at least one surface of an insulating base material 1 such as a polyimide film is prepared. The required circuit wiring pattern 2 is formed by lithography and etching.

【0018】次に、同図(2)に示す様に、回路配線パ
ターン2上の外部接続用端子部となる部位にレジスト層
3をレジストの塗工、又は、ラミネートに続く露光、現
像処理により形成する。ここでは、レジスト層3の形成
方法は上述の方法に限定されず、適宜、公知の方法を実
施してもよい。
Next, as shown in FIG. 2B, a resist layer 3 is applied to a portion of the circuit wiring pattern 2 which will be a terminal for external connection by applying a resist or exposing and developing after lamination. Form. Here, the method of forming the resist layer 3 is not limited to the above-described method, and a known method may be appropriately performed.

【0019】そこで、同図(3)に示す通り、回路配線
パターン2に対して、電着ポリイミド樹脂層4を回路配
線パターン2の露出する面の全面に電着する。
Then, as shown in FIG. 3C, an electrodeposited polyimide resin layer 4 is electrodeposited on the entire surface of the circuit wiring pattern 2 where the circuit wiring pattern 2 is exposed.

【0020】更に、同図(4)に示す通り、レジスト層
3を除去し、電着ポリイミド樹脂層4を硬化処理し、最
後に所要の外形加工を施して可撓性回路基板を得る。
Further, as shown in FIG. 4 (4), the resist layer 3 is removed, the electrodeposited polyimide resin layer 4 is cured, and finally a required outer shape processing is performed to obtain a flexible circuit board.

【0021】このようにして製作された可撓性回路基板
では、開口5を除く回路配線パターン2の外周にのみ電
着ポリイミド樹脂層4を形成できるので、回路配線パタ
ーン2の狭ピッチ化と低誘電率化を達成でき、従って、
可撓性回路基板に対する高密度実装化と信号の高速化に
好適に対応できる。
In the flexible circuit board manufactured as described above, the electrodeposited polyimide resin layer 4 can be formed only on the outer periphery of the circuit wiring pattern 2 except the opening 5, so that the pitch of the circuit wiring pattern 2 can be reduced. Dielectric constant can be achieved, and
It is possible to suitably cope with high-density mounting on a flexible circuit board and high-speed signal.

【0022】次に、本発明による可撓性回路基板の他の
製造法として、図2(1)から(5)を示す。
Next, as another method of manufacturing the flexible circuit board according to the present invention, FIGS.

【0023】この実施例による可撓性回路基板の製造法
に於いては、上記実施例と同様に、先ず、同図(1)に
示す様に、ポリイミドフィルム等の絶縁ベース材1の少
なくとも一方面に導電層としての銅箔を有する銅張り積
層板を用意し、その銅箔に対しフォトリソグラフィーと
エッチング手法を適用して所要の回路配線パターン2を
形成する。
In the method of manufacturing a flexible circuit board according to this embodiment, as in the above-described embodiment, first, as shown in FIG. A copper-clad laminate having a copper foil as a conductive layer on the side is prepared, and a required circuit wiring pattern 2 is formed by applying photolithography and an etching technique to the copper foil.

【0024】次に、同図(2)に示す様に、回路配線パ
ターン2の外面に対して、電着ポリイミド樹脂層6を電
着してこれに硬化処理を施す。
Next, as shown in FIG. 2B, an electrodeposited polyimide resin layer 6 is electrodeposited on the outer surface of the circuit wiring pattern 2 and subjected to a curing treatment.

【0025】次いで、同図(3)に示す様に、外部接続
用端子部を形成する部位に開口7を有するように電着ポ
リイミド樹脂層6を含む全面にレジスト層8をレジスト
の被着、露光及び現像処理により形成する。
Next, as shown in FIG. 3C, a resist layer 8 is coated on the entire surface including the electrodeposited polyimide resin layer 6 so as to have an opening 7 at a portion where the external connection terminal portion is to be formed. It is formed by exposure and development processing.

【0026】そこで、同図(4)に示す通り、上記レジ
スト層8に形成された開口7に露出する電着ポリイミド
樹脂層6をエッチング除去して外部接続用端子部を露出
させる為の開口9を形成する。ここで、電着ポリイミド
樹脂層6をエッチング除去する方法は、エッチング液を
用いる化学エッチング手法或いはプラズマエッチング手
法が採用される。
Then, as shown in FIG. 4D, the electrodeposited polyimide resin layer 6 exposed in the opening 7 formed in the resist layer 8 is removed by etching to expose an external connection terminal portion. To form Here, as a method of etching and removing the electrodeposited polyimide resin layer 6, a chemical etching method using an etchant or a plasma etching method is employed.

【0027】次に、同図(5)に示す様に、レジスト層
8を除去すると図1(4)と同様な回路基板が形成さ
れ、最後に所要の外形加工を施して可撓性回路基板を得
ることができる。
Next, as shown in FIG. 5 (5), when the resist layer 8 is removed, a circuit board similar to that of FIG. 1 (4) is formed. Can be obtained.

【0028】上記方法の他、図2(3)及び(4)に示
す工程に代えて、同図(2)の状態の中間製品に対し、
外部接続用端子部を形成する部位に、レーザー加工処理
を施して外部接続用端子部を形成した後、所要の外形加
工を施して可撓性回路基板を製作する事も出来る。
In addition to the above method, the intermediate product in the state shown in FIG. 2B is replaced with the intermediate product shown in FIG.
After forming the external connection terminal portion by performing laser processing on a portion where the external connection terminal portion is to be formed, a required external shape processing may be performed to manufacture a flexible circuit board.

【0029】ここで、図2に示した製造法に於いては、
図1に示した製造法に於けるレジスト層3が、電着ポリ
イミド樹脂の電着工程で電着液中に浸漬される事による
電着ポリイミド樹脂液の汚染を防止できるという特徴を
有するので、上記の可撓性回路基板を更に安定的に製作
する事が可能となる。
Here, in the manufacturing method shown in FIG.
Since the resist layer 3 in the manufacturing method shown in FIG. 1 can prevent contamination of the electrodeposited polyimide resin solution by being immersed in the electrodeposition solution in the electrodeposition step of the electrodeposited polyimide resin, The above-mentioned flexible circuit board can be manufactured more stably.

【0030】[0030]

【発明の効果】本発明による可撓性回路基板及びその為
の製造法によれば、従来の可撓性回路基板では達成出来
なかった回路配線パターン間の低通電率化を達成できる
のみならず、回路配線パターンの表面保護層として電着
レジストを用いたので回路配線パターンが狭ピッチ化さ
れた高密度配線基板の場合でも、上記効果を好適に達成
できる。
According to the flexible circuit board and the manufacturing method therefor according to the present invention, it is possible to not only achieve a reduction in the duty ratio between circuit wiring patterns that could not be achieved with a conventional flexible circuit board, but also to achieve a low conductivity. Since the electrodeposition resist is used as the surface protection layer of the circuit wiring pattern, the above effects can be suitably achieved even in the case of a high-density wiring board having a narrow circuit wiring pattern.

【0031】また、本発明の他の方法によれば、電着ポ
リイミド樹脂層を硬化した後、外部接続用端子部を形成
する手法を採用したので、電着ポリイミド樹脂液を汚染
する事なく、安定的に本発明の可撓性回路基板を製造す
る事が可能となる。
According to another method of the present invention, a method of forming an external connection terminal portion after curing the electrodeposited polyimide resin layer is employed, so that the electrodeposited polyimide resin liquid is not contaminated. It is possible to stably manufacture the flexible circuit board of the present invention.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例による可撓性回路基板の製造
工程図。
FIG. 1 is a manufacturing process diagram of a flexible circuit board according to an embodiment of the present invention.

【図2】本発明の他の実施例による可撓性回路基板の製
造工程図。
FIG. 2 is a manufacturing process diagram of a flexible circuit board according to another embodiment of the present invention.

【図3】従来例による可撓性回路基板の製造工程図。FIG. 3 is a manufacturing process diagram of a flexible circuit board according to a conventional example.

【符号の説明】[Explanation of symbols]

1 絶縁ベース材 2 回路配線パターン 3 レジスト層 4 電着ポリイミド樹脂層 5 開口 REFERENCE SIGNS LIST 1 insulating base material 2 circuit wiring pattern 3 resist layer 4 electrodeposited polyimide resin layer 5 opening

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】絶縁ベース材の少なくとも一方面に回路配
線パターンを有し、該回路配線パターンは、外部接続用
端子部を除く全面に、各々の回路配線パターンに対して
独立した電着ポリイミド樹脂による表面保護層が形成さ
れてなることを特徴とする可撓性回路基板。
A circuit wiring pattern is provided on at least one surface of an insulating base material, and the circuit wiring pattern is formed on an entire surface excluding an external connection terminal portion by an electrodeposition polyimide resin independent of each circuit wiring pattern. A flexible circuit board, comprising a surface protective layer formed by:
【請求項2】絶縁ベース材の少なくとも一方面に回路配
線パターンを形成し、該回路配線パターン上の外部接続
用端子部となる部位にレジスト層を形成した後、該回路
配線パターンに対して電着ポリイミド樹脂層を電着さ
せ、上記外部接続用端子部に形成された上記レジスト層
を剥離し、次いで上記電着ポリイミド樹脂層に対する硬
化処理を施す各工程を有する可撓性回路基板の製造法。
2. A circuit wiring pattern is formed on at least one surface of an insulating base material, and a resist layer is formed on a portion of the circuit wiring pattern to be a terminal portion for external connection. A method for manufacturing a flexible circuit board, comprising the steps of electrodepositing an electrodeposited polyimide resin layer, removing the resist layer formed on the external connection terminal portion, and then performing a curing process on the electrodeposited polyimide resin layer. .
【請求項3】絶縁ベース材の少なくとも一方面に回路配
線パターンを形成し、該回路配線パターンに対して、電
着ポリイミド樹脂層の電着及び硬化処理を施した後、外
部接続用端子部となる部位に開口を有するレジスト層を
形成し、該レジスト層を用いて上記電着ポリイミド樹脂
層をエッチング除去する各工程を有する可撓性回路基板
の製造法。
3. A circuit wiring pattern is formed on at least one surface of an insulating base material, and the circuit wiring pattern is subjected to electrodeposition and curing of an electrodeposited polyimide resin layer. A method for manufacturing a flexible circuit board, comprising the steps of: forming a resist layer having an opening at a predetermined position; and etching and removing the electrodeposited polyimide resin layer using the resist layer.
【請求項4】上記電着ポリイミド樹脂層をエッチングす
る手段は、化学エッチング処理又はプラズマエッチング
処理により行われる請求項3に記載の可撓性回路基板の
製造法。
4. The method according to claim 3, wherein the means for etching the electrodeposited polyimide resin layer is performed by a chemical etching process or a plasma etching process.
【請求項5】絶縁ベース材の少なくとも一方面に回路配
線パターンを形成し、該回路配線パターンに対して、電
着ポリイミド樹脂層の電着及び硬化処理を施した後、上
記電着ポリイミド樹脂層に対するレーザー加工により外
部接続用端子部となる部位に開口を形成する各工程を有
する可撓性回路基板の製造法。
5. A circuit wiring pattern is formed on at least one surface of an insulating base material, and the circuit wiring pattern is subjected to electrodeposition and curing of an electrodeposited polyimide resin layer. A method for manufacturing a flexible circuit board, comprising: a step of forming an opening in a portion to be an external connection terminal portion by laser processing on the substrate.
JP2001142735A 2001-05-14 2001-05-14 Flexible circuit board and its manufacturing method Pending JP2002344120A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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Publications (1)

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JP2002344120A true JP2002344120A (en) 2002-11-29

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Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004296952A (en) * 2003-03-28 2004-10-21 Tdk Corp Electronic component and its outer layer forming method
JP2011040420A (en) * 2009-07-17 2011-02-24 Nitto Denko Corp Printed circuit board and method of manufacturing the same
JP2017022228A (en) * 2015-07-09 2017-01-26 ローム株式会社 Semiconductor device and manufacturing method of the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004296952A (en) * 2003-03-28 2004-10-21 Tdk Corp Electronic component and its outer layer forming method
JP2011040420A (en) * 2009-07-17 2011-02-24 Nitto Denko Corp Printed circuit board and method of manufacturing the same
US8853546B2 (en) 2009-07-17 2014-10-07 Nitto Denko Corporation Printed circuit board and method of manufacturing the same
JP2017022228A (en) * 2015-07-09 2017-01-26 ローム株式会社 Semiconductor device and manufacturing method of the same

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