JP2002270989A - Ceramic electronic part and manufacturing method therefor - Google Patents

Ceramic electronic part and manufacturing method therefor

Info

Publication number
JP2002270989A
JP2002270989A JP2001066332A JP2001066332A JP2002270989A JP 2002270989 A JP2002270989 A JP 2002270989A JP 2001066332 A JP2001066332 A JP 2001066332A JP 2001066332 A JP2001066332 A JP 2001066332A JP 2002270989 A JP2002270989 A JP 2002270989A
Authority
JP
Japan
Prior art keywords
ceramic
ceramic electronic
electronic component
electrode
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001066332A
Other languages
Japanese (ja)
Inventor
Hiroshi Kagata
博司 加賀田
Ryuichi Saito
隆一 齊藤
Hidenori Katsumura
英則 勝村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001066332A priority Critical patent/JP2002270989A/en
Publication of JP2002270989A publication Critical patent/JP2002270989A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve the problem that a terminal electrode peels off and a ceramic part cracks since stress on a ceramic electronic part is not relieved when a mother board is deformed due to a small distance between the mother board and the ceramic electronic part when the mother board is mounted on the ceramic electronic part. SOLUTION: '1' is the laminated ceramic part, '2' are pattern electrodes, '3' are via electrodes, '6' is a chip capacitor and '7' is a semiconductor device. The ceramic electronic part having a structure where projections 5 exist in a part of each electrode, at least in a part of the terminal electrode 4, for example, on a face mounting the mother board and the like is disposed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、セラミック電子部
品およびその製造方法に関し、特にマザーボードに実装
する面に突起部を形成することで、マザーボード実装後
に、マザーボードが変形した際に、端子電極のはがれや
セラミック部分のひびなどの不具合の発生を抑制するも
のに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic electronic component and a method of manufacturing the same, and more particularly, to forming a projection on a surface to be mounted on a motherboard so that terminal electrodes come off when the motherboard is deformed after mounting on the motherboard. And a device for suppressing the occurrence of defects such as cracks in ceramic parts.

【０００２】[0002]

【従来の技術】近年、セラミックスを使用した電子部品
が広く用いられている。特に、セラミックグリーンシー
トを使用した積層セラミック部品は、小型、高機能化に
向いていることから、高周波モジュールなどを中心に急
激に需要が伸びている。一般的にこの部品は、特開平７
−５０４８８号公報に開示されているように、所定のセ
ラミックグリーンシートにスクリーン印刷などで導体を
形成し、必要に応じてビアを形成し、位置を合わせなが
ら重ねて圧着した後、焼成し、必要に応じて表面に導体
を形成することにより製造する。2. Description of the Related Art In recent years, electronic parts using ceramics have been widely used. In particular, the demand for multilayer ceramic components using ceramic green sheets is growing rapidly, especially for high-frequency modules and the like, because they are suitable for miniaturization and high performance. Generally, this part is disclosed in
As disclosed in Japanese Patent No. -50488, a conductor is formed on a predetermined ceramic green sheet by screen printing or the like, a via is formed if necessary, the layers are pressed together while being aligned, fired, It is manufactured by forming a conductor on the surface according to the above.

【０００３】[0003]

【発明が解決しようとする課題】しかしながら、前記方
法によって得られたセラミック電子部品では、マザーボ
ードに実装する面の電極はうすく、平坦な構造となる。
よって、前記セラミック電子部品では、マザーボードに
実装した際に、マザーボードとセラミック電子部品の間
の距離が小さく、マザーボードの変形時にセラミック電
子部品に加わる応力が緩和されないため、端子電極がは
がれたり、セラミック部分にひびが入るなどの不具合が
生じやすかった。However, in the ceramic electronic component obtained by the above method, the electrodes on the surface mounted on the motherboard have a thin and flat structure.
Therefore, in the ceramic electronic component, when mounted on the motherboard, the distance between the motherboard and the ceramic electronic component is small, and the stress applied to the ceramic electronic component when the motherboard is deformed is not relaxed. Problems such as cracks were likely to occur.

【０００４】本発明は、上記の課題を解決し、簡便な方
法で、マザーボード実装後に、マザーボードが変形した
際に、端子電極のはがれやセラミック部分のひびなどの
不具合の発生を抑制される構造のセラミック電子部品お
よびその製造方法を提供することを目的とする。SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems, and has a structure in which, when a motherboard is deformed after mounting on a motherboard, occurrence of defects such as peeling of terminal electrodes and cracking of a ceramic portion is suppressed. An object of the present invention is to provide a ceramic electronic component and a method for manufacturing the same.

【０００５】[0005]

【課題を解決するための手段】上記課題を解決するた
め、本発明は以下の構成とするものである。Means for Solving the Problems To solve the above problems, the present invention has the following constitution.

【０００６】マザーボードに実装する面の少なくとも一
部の電極における少なくとも一部に突起部がある構造を
有するセラミック電子部品とする。A ceramic electronic component having a structure in which at least a part of an electrode on at least a part of a surface to be mounted on a motherboard has a projection.

【０００７】あるいは、マザーボードに実装する面の少
なくとも一部の電極における少なくとも一部に突起部が
あり、セラミック内部のビア電極と接続した位置に前記
突起部を形成した構造を有するセラミック電子部品とす
る。Alternatively, a ceramic electronic component having a structure in which at least a part of at least a part of an electrode on a surface to be mounted on a motherboard has a projection and the projection is formed at a position connected to a via electrode inside the ceramic. .

【０００８】あるいは、マザーボードに実装する面の少
なくとも一部の電極における少なくとも一部に突起部が
形成されたセラミック電子部品の製造方法において、所
定の導体パターンあるいはビアが形成されたセラミック
グリーンシートの積層体の両面あるいは片面に、前記突
起部形成用の穴をあけ導体材料が充填されたフィルムを
圧着し、前記フィルムをはがすことにより前記突起部を
形成する工程を有するセラミック電子部品の製造方法と
する。Alternatively, in a method of manufacturing a ceramic electronic component in which at least a part of an electrode of at least a part of a surface to be mounted on a motherboard has a projection, a ceramic green sheet having a predetermined conductor pattern or via formed thereon is laminated. A method for manufacturing a ceramic electronic component, comprising the steps of: forming a hole for forming the protrusion on one or both surfaces of a body, pressing a film filled with a conductive material, and removing the film to form the protrusion. .

【０００９】あるいは、マザーボードに実装する面の少
なくとも一部の電極における少なくとも一部に突起部が
あり、セラミック内部のビア電極と接続した位置に前記
突起部が形成されたセラミック電子部品の製造方法にお
いて、内部に所定の導体パターンあるいはビアが形成さ
れたセラミックグリーンシートの積層体における前記突
起部を形成すべき面に弾性体を置き加圧する工程を有す
るセラミック電子部品の製造方法とする。この際、前記
弾性体がグリーンシートであれば望ましく、前記セラミ
ックの焼成温度で焼結しないセラミック材料で構成され
たグリーンシートであればさらに望ましい。Alternatively, in a method of manufacturing a ceramic electronic component in which at least a part of at least a part of an electrode on a surface to be mounted on a motherboard has a projection, and the projection is formed at a position connected to a via electrode inside the ceramic. A method for manufacturing a ceramic electronic component, comprising the steps of: placing an elastic body on the surface of the laminate of ceramic green sheets in which a predetermined conductor pattern or via is formed and on which the protrusion is to be formed, and pressing the same. In this case, the elastic body is preferably a green sheet, and more preferably a green sheet made of a ceramic material that does not sinter at the firing temperature of the ceramic.

【００１０】[0010]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して説明する。Embodiments of the present invention will be described below with reference to the drawings.

【００１１】（実施の形態１）図１に、請求項１に記載
したセラミック電子部品の一実施形態の断面を示す。積
層セラミック部１の上に、チップコンデンサ６および半
導体デバイス７などの部品を半田あるいはフリップチッ
プで実装した高周波モジュールを例とした。積層セラミ
ック部の上に実装する部品は限定するものではなく、イ
ンダクタ、抵抗、ＳＡＷ、あるいは複合部品などでもよ
い。前記部品は、両面に実装してもよく、積層セラミッ
ク部にキャビティを形成し、キャビティの中に各種部品
を実装してもよい。必要に応じて、樹脂でモールドした
り、キャップをする場合もある。積層セラミック部は、
高周波モジュールの場合、高周波で誘電損失の小さいガ
ラスセラミックなどが使用されるが、特に限定するもの
ではなく、用途によって磁性材料や圧電材料を用いても
構わない。積層セラミック部の内部には、必要に応じ
て、パターン電極２あるいはビア電極３が形成される。
積層セラミック部の内部に、導体は必ずしも必要ではな
い。図１の下面がマザーボードに実装される面となる
が、その面には、端子電極４があり、端子電極の一部に
突起部５が形成されている。電極材料としては、Ｃｕ、
Ａｇ、Ａｕ、Ｐｄ、Ａｔ、Ｗ、あるいはそれらの合金な
どが使用されるが、導電性があればよく、特に金属に限
定するものではない。端子電極や突起部は、樹脂を多く
含んだものでも構わない。図の場合、端子電極へは、ビ
アにより接続されているが、側面電極から接続してもよ
い。各電極材料は、同種のものでもよいし、異種のもの
でもよい。表面に露出した電極は、必要に応じて、Ｎｉ
−Ａｕメッキなどの表面処理がなされる。(Embodiment 1) FIG. 1 shows a cross section of a ceramic electronic component according to an embodiment of the present invention. An example of a high-frequency module in which components such as a chip capacitor 6 and a semiconductor device 7 are mounted on the multilayer ceramic portion 1 by soldering or flip-chip. The components mounted on the multilayer ceramic portion are not limited, and may be inductors, resistors, SAWs, composite components, or the like. The components may be mounted on both sides, or a cavity may be formed in the laminated ceramic portion, and various components may be mounted in the cavity. If necessary, they may be molded with a resin or capped. The multilayer ceramic part
In the case of a high-frequency module, glass ceramic or the like having a small dielectric loss at a high frequency is used, but is not particularly limited, and a magnetic material or a piezoelectric material may be used depending on the application. A pattern electrode 2 or a via electrode 3 is formed inside the multilayer ceramic portion as required.
A conductor is not necessarily required inside the multilayer ceramic part. The lower surface in FIG. 1 is a surface to be mounted on the motherboard, and has a terminal electrode 4 on the surface, and a projection 5 is formed on a part of the terminal electrode. As the electrode material, Cu,
Ag, Au, Pd, At, W, or an alloy thereof may be used, as long as it has conductivity, and is not particularly limited to metal. The terminal electrodes and the protrusions may contain a large amount of resin. In the case of the drawing, the terminal electrodes are connected by vias, but they may be connected by side electrodes. Each electrode material may be the same or different. The electrode exposed on the surface is made of Ni
-A surface treatment such as Au plating is performed.

【００１２】以上のように、マザーボードに実装する面
に突起部が形成された構造のセラミック電子部品とする
ことにより、セラミック電子部品とマザーボードの距離
が大きくなり、マザーボードの変形による応力が素子に
伝達される際に緩和され、端子電極のはがれやセラミッ
ク部分のひび等の不具合の発生が抑制される。As described above, by using a ceramic electronic component having a structure in which a projection is formed on the surface to be mounted on the motherboard, the distance between the ceramic electronic component and the motherboard increases, and the stress due to the deformation of the motherboard is transmitted to the element. The occurrence of defects such as peeling of the terminal electrode and cracking of the ceramic portion is suppressed.

【００１３】（実施の形態２）図２に、請求項２に記載
したセラミック電子部品の一実施形態の断面を示す。実
施の形態１との違いは、端子電極内の突起部５が、積層
セラミック部内のビア電極と端子電極の接続位置に形成
されていることである。その他の形態は、実施の形態１
と同様である。(Embodiment 2) FIG. 2 shows a cross section of an embodiment of a ceramic electronic component according to the present invention. The difference from the first embodiment is that the protrusion 5 in the terminal electrode is formed at the connection position between the via electrode and the terminal electrode in the multilayer ceramic portion. Other embodiments are described in Embodiment 1.
Is the same as

【００１４】以上のように、セラミック内部のビア電極
と接続した位置に前記突起部を形成した構造を有するセ
ラミック電子部品とすることにより、マザーボードの変
形による応力を直接ビア電極へ伝えることで、ビア部と
端子電極の接続部におけるクラックの発生を大幅に抑制
することができる。As described above, the ceramic electronic component having the structure in which the protrusion is formed at the position connected to the via electrode inside the ceramic allows the stress due to the deformation of the motherboard to be directly transmitted to the via electrode, thereby providing the via electrode. The occurrence of cracks at the connection between the portion and the terminal electrode can be greatly suppressed.

【００１５】（実施の形態３）図３に、請求項３に記載
した本発明の一実施形態によるセラミック電子部品の製
造方法の断面図を示す。(Embodiment 3) FIG. 3 is a sectional view showing a method for manufacturing a ceramic electronic component according to an embodiment of the present invention.

【００１６】まず(a)のように、フィルム８に穴をあけ
る。フィルムの材質としては、ポリエチレンテレフタレ
ートなどの有機物あるいは箔などの金属などがあるが、
特に限定しない。First, a hole is formed in the film 8 as shown in FIG. Examples of the material of the film include an organic substance such as polyethylene terephthalate or a metal such as a foil.
There is no particular limitation.

【００１７】次に(b)のようにフィルム８の穴に、突起
形成用の電極材料9を充填する。電極材料としては、Ｃ
ｕ、Ａｇ、Ａｕ、Ｐｄ、Ａｔ、Ｗ、あるいはそれらの合
金などが使用されるが、導電性があればよく、特に金属
に限定するものではない。また、熱硬化性などの樹脂を
多く含んだものでも構わない。充填方法としては、例え
ば、電極材料をペーストに加工し、フィルムの上に置
き、ウレタンなどのスキージでペーストをさばくことで
行われるが、特に限定するものではない。Next, as shown in (b), the holes 8 of the film 8 are filled with an electrode material 9 for forming projections. As the electrode material, C
u, Ag, Au, Pd, At, W, or an alloy thereof may be used, as long as it has conductivity, and is not particularly limited to metal. Further, a material containing a large amount of a resin such as a thermosetting resin may be used. The filling method is performed by, for example, processing an electrode material into a paste, placing the paste on a film, and filtering the paste with a squeegee such as urethane, but is not particularly limited.

【００１８】次に(c)のように、電極材料を充填したフ
ィルムを、位置合わせしながらセラミック積層体１０に
圧着させ、フィルムをはがして電極材料のみをセラミッ
ク積層体の端子電極上に転写させる。セラミック積層体
としては、焼成後でも焼成前の状態でもよい。セラミッ
ク積層体が焼成前の状態の場合、突起部形成用の電極材
料と同時に熱処理して、焼結させる。セラミック積層体
が焼成後状態の場合、電極材料の種類によるが、熱処理
による焼き付けなどで突起部を形成する。Next, as shown in (c), the film filled with the electrode material is pressed against the ceramic laminate 10 while being aligned, the film is peeled off, and only the electrode material is transferred onto the terminal electrodes of the ceramic laminate. . The ceramic laminate may be in a state after firing or before firing. When the ceramic laminate is in a state before firing, it is heat-treated and sintered simultaneously with the electrode material for forming the protrusions. When the ceramic laminate is in a fired state, projections are formed by baking by heat treatment or the like, depending on the type of electrode material.

【００１９】以上のような方法により、(d)のようなマ
ザーボードに実装する面の少なくとも一部の電極におけ
る少なくとも一部に突起部が形成されたセラミック電子
部品を、きわめて簡便に、量産性よく製造することが可
能となる。According to the above-described method, the ceramic electronic component having at least a part of the electrode on at least a part of the surface to be mounted on the motherboard as shown in FIG. It can be manufactured.

【００２０】（実施の形態４）図４に、請求項４から６
に記載した本発明の一実施形態によるセラミック電子部
品の製造方法の断面図を示す。(Embodiment 4) FIG.
1 is a cross-sectional view of a method for manufacturing a ceramic electronic component according to an embodiment of the present invention described in FIG.

【００２１】セラミックグリーンシート積層体１０は、
所定の層にパターン電極あるいはビア電極を形成したグ
リーンシートを重ねて製造する。電極材料としては、Ｃ
ｕ、Ａｇ、Ａｕ、Ｐｄ、Ａｔ、Ｗ、あるいはそれらの合
金などが使用されるが、導電性があればよく、特に金属
に限定するものではない。また、熱硬化性などの樹脂を
多く含んだものでも構わない。The ceramic green sheet laminate 10 includes:
A green sheet in which a pattern electrode or a via electrode is formed on a predetermined layer is laminated and manufactured. As the electrode material, C
u, Ag, Au, Pd, At, W, or an alloy thereof may be used, as long as it has conductivity, and is not particularly limited to metal. Further, a material containing a large amount of a resin such as a thermosetting resin may be used.

【００２２】この積層体１０は、内部のビア電極３が、
素子のマザーボード実装面の端子電極４に接続した構造
を有する。(a)のように、この積層体１０を加圧圧着す
るが、その際、少なくとも素子の突起部を形成すべき面
には弾性体１１を置き、図４のような一軸加圧の場合、
その両側に固い金属金型１２などを配置し、加圧する。
弾性体としては、樹脂、ゴムなどが望ましいが、特に種
類を限定するのものではない。弾性体としてグリーンシ
ートを用いると、突起部の高さをそろえやすいので望ま
しい。弾性体としてグリーンシートを用いる場合、加圧
により前記グリーンシートが前記セラミックグリーンシ
ート積層体に密着する。そのまま焼成し、研磨などによ
り加圧時に密着した前記グリーンシートを除去してもよ
いが、焼成の前にはがしてもよい。グリーンシートとし
て、前記セラミックグリーンシート積層体の焼成温度で
は焼結しないセラミック材料を用いると、焼成後の除去
が容易でさらに望ましい。前記除去方法として、砥石や
研磨紙による研磨、あるいは研磨材や研磨材をスラリー
状にしたものを吹きつけるブラストなどがあるが、特に
限定しない。加圧方法として、等方加圧でもかまわな
い。In the laminated body 10, the internal via electrode 3
It has a structure connected to terminal electrodes 4 on the mother board mounting surface of the element. As shown in (a), the laminated body 10 is press-compressed. At this time, the elastic body 11 is placed on at least the surface of the element where the projections are to be formed.
A hard metal mold 12 and the like are arranged on both sides thereof and pressurized.
As the elastic body, a resin, rubber, or the like is desirable, but the kind is not particularly limited. It is desirable to use a green sheet as the elastic body because the heights of the protrusions can be easily adjusted. When a green sheet is used as the elastic body, the green sheet comes into close contact with the ceramic green sheet laminate by pressing. The green sheet may be baked as it is, and the green sheet adhered at the time of pressing may be removed by polishing or the like, but may be peeled off before calcination. If a ceramic material that does not sinter at the firing temperature of the ceramic green sheet laminate is used as the green sheet, removal after firing is easy and more desirable. Examples of the removing method include, but are not particularly limited to, polishing with a grindstone or abrasive paper, or blasting with an abrasive or a slurry of an abrasive. As a pressing method, isotropic pressing may be used.

【００２３】以上の方法により、(b)のようなマザーボ
ードに実装する面の少なくとも一部の電極における少な
くとも一部の突起部において、セラミック内部のビア電
極と接続した位置に前記突起部が形成されたセラミック
電子部品を、突起部形成のために余分な工程や材料を使
うことなく、安価な方法で製造できる。According to the method described above, at least some of the projections of at least some of the electrodes on the surface to be mounted on the motherboard as shown in FIG. The ceramic electronic component can be manufactured by an inexpensive method without using an extra step or material for forming the projection.

【００２４】[0024]

【発明の効果】以上の説明より明らかなように、本発明
のように、マザーボードに実装する面に突起部が形成さ
れた構造のセラミック電子部品とすることにより、セラ
ミック電子部品とマザーボードの距離が大きくなり、マ
ザーボードの変形による応力が緩和され、端子電極のは
がれやセラミック部分のひびなどの不具合の発生が抑制
される。As is apparent from the above description, by using a ceramic electronic component having a structure in which a projection is formed on the surface to be mounted on the motherboard as in the present invention, the distance between the ceramic electronic component and the motherboard can be reduced. As a result, stress due to deformation of the motherboard is alleviated, and occurrence of defects such as peeling of terminal electrodes and cracking of ceramic portions is suppressed.

【００２５】また、セラミック内部のビア電極と接続し
た位置に前記突起部を形成した構造を有するセラミック
電子部品突起部とすることにより、マザーボードの変形
による応力を直接ビア電極へ伝えることで、ビア部と端
子電極の接続部におけるクラックの発生を大幅に抑制す
ることができる。Also, by forming the ceramic electronic component protrusion having a structure in which the protrusion is formed at a position connected to the via electrode inside the ceramic, the stress due to the deformation of the motherboard is directly transmitted to the via electrode, thereby forming the via portion. Generation of a crack in a connection portion between the terminal and the terminal electrode can be largely suppressed.

【００２６】また、本発明におけるセラミック電子部品
の製造方法によれば、簡便に、量産性よく、かつ安価に
前記突起部を形成できる。Further, according to the method for manufacturing a ceramic electronic component of the present invention, the projection can be formed easily, with good mass productivity, and at low cost.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の一実施形態におけるセラミック電子部
品の断面図FIG. 1 is a sectional view of a ceramic electronic component according to an embodiment of the present invention.

【図２】本発明の一実施形態におけるセラミック電子部
品の断面図FIG. 2 is a sectional view of a ceramic electronic component according to an embodiment of the present invention.

【図３】本発明の一実施形態におけるセラミック電子部
品の製造方法を示す断面図FIG. 3 is a sectional view showing a method for manufacturing a ceramic electronic component according to an embodiment of the present invention.

【図４】本発明の一実施形態におけるセラミック電子部
品の製造方法を示す断面図FIG. 4 is a sectional view showing a method for manufacturing a ceramic electronic component according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１ 積層セラミック部 ２ パターン電極 ３ ビア電極 ４ 端子電極 ５ 突起部 ６ チップコンデンサ ７ 半導体デバイス ８ フィルム ９ 突起部形成用導体材料 １０ 積層セラミック部 １１ 弾性体 １２ プレス金型 DESCRIPTION OF SYMBOLS 1 Multilayer ceramic part 2 Pattern electrode 3 Via electrode 4 Terminal electrode 5 Projection part 6 Chip capacitor 7 Semiconductor device 8 Film 9 Conductor material for forming projection part 10 Multilayer ceramic part 11 Elastic body 12 Press mold

───────────────────────────────────────────────────── フロントページの続き (72)発明者 勝村 英則 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Ｆターム(参考） 5E336 AA04 CC33 CC36 CC37 GG16 5E346 AA15 AA42 AA43 BB16 CC16 CC31 CC32 CC36 CC38 CC39 DD34 DD42 EE24 FF01 GG06 HH11  ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hidenori Katsumura 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term in Matsushita Electric Industrial Co., Ltd. DD34 DD42 EE24 FF01 GG06 HH11

Claims (6)

【特許請求の範囲】[Claims] 【請求項１】マザーボードに実装する面の少なくとも一
部の電極における少なくとも一部に突起部があることを
特徴とするセラミック電子部品。1. A ceramic electronic component, wherein at least a part of at least a part of an electrode on a surface to be mounted on a motherboard has a projection. 【請求項２】マザーボードに実装する面の少なくとも一
部の電極における少なくとも一部に突起部があり、セラ
ミック内部のビア電極と接続した位置に前記突起部を形
成したことを特徴とするセラミック電子部品。2. A ceramic electronic component, wherein at least a part of at least a part of an electrode on a surface to be mounted on a motherboard has a projection, and the projection is formed at a position connected to a via electrode inside the ceramic. . 【請求項３】マザーボードに実装する面の少なくとも一
部の電極における少なくとも一部に突起部が形成された
セラミック電子部品の製造方法において、所定の導体パ
ターンあるいはビアが形成されたセラミックグリーンシ
ートの積層体の両面あるいは片面に、前記突起部形成用
の穴をあけ導体材料が充填されたフィルムを圧着し、前
記フィルムをはがすことにより前記突起部を形成する工
程を有することを特徴とするセラミック電子部品の製造
方法。3. A method of manufacturing a ceramic electronic component having at least a part of at least a part of an electrode on a surface to be mounted on a motherboard, comprising: laminating a ceramic green sheet having a predetermined conductor pattern or via formed thereon. A step of forming the protrusion by forming a hole for forming the protrusion on one or both surfaces of the body, pressing a film filled with a conductive material, and peeling the film to form the protrusion. Manufacturing method. 【請求項４】マザーボードに実装する面の少なくとも一
部の電極における少なくとも一部に突起部があり、セラ
ミック内部のビア電極と接続した位置に前記突起部が形
成されたセラミック電子部品の製造方法において、内部
に所定の導体パターンあるいはビアが形成されたセラミ
ックグリーンシートの積層体における前記突起部を形成
すべき面に弾性体を置き加圧する工程を有することを特
徴とするセラミック電子部品の製造方法。4. A method of manufacturing a ceramic electronic component in which at least a part of at least a part of an electrode on a surface to be mounted on a motherboard has a projection, and the projection is formed at a position connected to a via electrode inside the ceramic. A method of manufacturing a ceramic electronic component, comprising the steps of: placing an elastic body on a surface of the laminate of ceramic green sheets in which a predetermined conductor pattern or via is formed and on which the projection is to be formed, and pressing the elastic body. 【請求項５】前記弾性体がグリーンシートであることを
特徴とするセラミック電子部品の製造方法。5. A method for manufacturing a ceramic electronic component, wherein said elastic body is a green sheet. 【請求項６】前記グリーンシートが、前記セラミックの
焼成温度で焼結しないセラミック材料で構成されたこと
を特徴とするセラミック電子部品の製造方法。6. A method for manufacturing a ceramic electronic component, wherein the green sheet is made of a ceramic material that does not sinter at the firing temperature of the ceramic.
JP2001066332A 2001-03-09 2001-03-09 Ceramic electronic part and manufacturing method therefor Pending JP2002270989A (en)

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Publication Number Publication Date
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006100361A (en) * 2004-09-28 2006-04-13 Kyocera Corp High-frequency module
JP2007042893A (en) * 2005-08-03 2007-02-15 Murata Mfg Co Ltd Ceramic substrate and its manufacturing method
JP2009111307A (en) * 2007-11-01 2009-05-21 Dainippon Printing Co Ltd Wiring board with built-in components
US8350388B2 (en) 2007-11-01 2013-01-08 Dai Nippon Printing Co., Ltd. Component built-in wiring board and manufacturing method of component built-in wiring board
JP2013110441A (en) * 2013-03-11 2013-06-06 Dainippon Printing Co Ltd Component built-in wiring board manufacturing method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006100361A (en) * 2004-09-28 2006-04-13 Kyocera Corp High-frequency module
JP4583123B2 (en) * 2004-09-28 2010-11-17 京セラ株式会社 High frequency module
JP2007042893A (en) * 2005-08-03 2007-02-15 Murata Mfg Co Ltd Ceramic substrate and its manufacturing method
JP2009111307A (en) * 2007-11-01 2009-05-21 Dainippon Printing Co Ltd Wiring board with built-in components
US8350388B2 (en) 2007-11-01 2013-01-08 Dai Nippon Printing Co., Ltd. Component built-in wiring board and manufacturing method of component built-in wiring board
US8987901B2 (en) 2007-11-01 2015-03-24 Dai Nippon Printing Co., Ltd. Component built-in wiring board and manufacturing method of component built-in wiring board
JP2013110441A (en) * 2013-03-11 2013-06-06 Dainippon Printing Co Ltd Component built-in wiring board manufacturing method

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