JP2002261453A - Multilayer interconnection board - Google Patents
Multilayer interconnection boardInfo
- Publication number
- JP2002261453A JP2002261453A JP2001053834A JP2001053834A JP2002261453A JP 2002261453 A JP2002261453 A JP 2002261453A JP 2001053834 A JP2001053834 A JP 2001053834A JP 2001053834 A JP2001053834 A JP 2001053834A JP 2002261453 A JP2002261453 A JP 2002261453A
- Authority
- JP
- Japan
- Prior art keywords
- crystal polymer
- layer
- liquid crystal
- insulating
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、各種ＡＶ機器や家
電機器・通信機器・コンピュータやその周辺機器等の電
子機器に使用される多層配線基板に関するものであり、
特に絶縁層の一部に液晶ポリマー層を用いた多層配線基
板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board used for electronic devices such as various AV devices, home appliances, communication devices, computers and their peripheral devices, and the like.
In particular, the present invention relates to a multilayer wiring board using a liquid crystal polymer layer as a part of an insulating layer.
【０００２】[0002]
【従来の技術】従来、半導体素子等の能動部品や容量素
子・抵抗素子等の受動部品を多数搭載して所定の電子回
路を構成した混成集積回路を形成するための多層配線基
板は、通常、ガラスクロスにエポキシ樹脂を含浸させて
成る絶縁層にドリルによって上下に貫通孔を形成し、こ
の貫通孔内部および絶縁層表面に複数の配線導体を形成
した配線基板を、多数層積層することによって形成され
ている。2. Description of the Related Art Conventionally, a multilayer wiring board for forming a hybrid integrated circuit in which a predetermined electronic circuit is formed by mounting a large number of active parts such as semiconductor elements and passive parts such as capacitance elements and resistance elements is usually used. Formed by laminating multiple layers of wiring boards in which through holes are formed vertically by drilling in an insulating layer made of glass cloth impregnated with epoxy resin, and a plurality of wiring conductors are formed inside the through holes and on the surface of the insulating layer. Have been.
【０００３】一般に、現在の電子機器は、移動体通信機
器に代表されるように小型・薄型・軽量・高性能・高機
能・高品質・高信頼性が要求されており、このような電
子機器に搭載される混成集積回路等の電子部品も小型・
高密度化が要求されるようになってきており、このよう
な高密度化の要求に応えるために、電子部品を構成する
多層配線基板も、配線導体の微細化や絶縁層の薄層化・
貫通孔の微細化が必要となってきている。このため、近
年、貫通孔を微細化するために、ドリル加工より微細加
工が可能なレーザ加工が用いられるようになってきた。In general, current electronic devices are required to be small, thin, lightweight, high-performance, high-function, high-quality, and high-reliability, as typified by mobile communication devices. Electronic components such as hybrid integrated circuits mounted on
In order to respond to such demands for higher densities, multilayer wiring boards that make up electronic components are also required to have finer wiring conductors and thinner insulating layers.
It is becoming necessary to miniaturize the through holes. For this reason, in recent years, laser processing that can perform finer processing than drill processing has been used in order to make through holes finer.
【０００４】しかしながら、ガラスクロスにエポキシ樹
脂を含浸させて成る絶縁層は、ガラスクロスをレーザに
より穿設加工することが困難なために貫通孔の微細化に
は限界があり、また、ガラスクロスの厚みが不均一のた
めに均一な孔径の貫通孔を形成することが困難であると
いう問題点を有していた。However, an insulating layer formed by impregnating a glass cloth with an epoxy resin has a limitation in miniaturizing a through-hole because it is difficult to pierce the glass cloth with a laser. There is a problem that it is difficult to form a through-hole having a uniform diameter due to the uneven thickness.
【０００５】このような問題点を解決するために、アラ
ミド樹脂繊維で製作した不織布にエポキシ樹脂を含浸さ
せた絶縁基材や、ポリイミドフィルムにエポキシ系接着
剤を塗布した絶縁基材を絶縁層に用いた多層配線基板が
提案されている。In order to solve such problems, an insulating base material made by impregnating a non-woven fabric made of aramid resin fiber with an epoxy resin or an insulating base material obtained by applying an epoxy-based adhesive to a polyimide film is used as an insulating layer. A multilayer wiring board used has been proposed.
【０００６】しかしながら、アラミド不織布やポリイミ
ドフィルムを用いた絶縁基材は吸湿性が高く、吸湿した
状態で半田リフローを行なうと半田リフローの熱により
吸湿した水分が気化してガスが発生し、絶縁層間で剥離
してしまう等の問題点を有していた。However, an insulating substrate using an aramid nonwoven fabric or a polyimide film has high hygroscopicity. If solder reflow is performed in a state of absorbing moisture, the moisture absorbed by the heat of the solder reflow vaporizes to generate gas, and an insulating interlayer is generated. With the problem of peeling.
【０００７】このような問題点を解決するために、多層
配線基板の絶縁層の材料として液晶ポリマーを用いるこ
とが検討されている。液晶ポリマーから成る層は、剛直
な分子で構成されているとともに分子同士がある程度規
則的に並んだ構成をしており分子間力が強いことから、
高耐熱性・高弾性率・高寸法安定性・低吸湿性を示し、
ガラスクロスのような強化材を用いる必要がなく、ま
た、微細加工性にも優れるという特徴を有している。さ
らに、高周波領域においても、低誘電率・低誘電正接で
あり高周波特性に優れるという特徴を有している。In order to solve such problems, use of a liquid crystal polymer as a material for an insulating layer of a multilayer wiring board has been studied. The layer composed of the liquid crystal polymer is composed of rigid molecules and has a structure in which molecules are regularly arranged to some extent, and has a strong intermolecular force.
Shows high heat resistance, high elastic modulus, high dimensional stability, low moisture absorption,
There is no need to use a reinforcing material such as glass cloth, and it has features of being excellent in fine workability. Furthermore, even in a high-frequency region, it has a characteristic that it has a low dielectric constant and a low dielectric loss tangent, and has excellent high-frequency characteristics.
【０００８】このような液晶ポリマーの特徴を活かし、
特開平8-97565号公報には、回路層が第１の液晶ポリマ
ーを含み、この回路層間に第１の液晶ポリマーの融点よ
りも低い融点を有する第２の液晶ポリマーを含む接着剤
層を挿入して成る多層プリント回路基板が提案されてお
り、また、特開2000-269616号公報には熱可塑性液晶ポ
リマーフィルムと金属箔とをエポキシ系接着剤を用いて
接着させた高周波回路基板が提案されている。[0008] Utilizing the characteristics of such a liquid crystal polymer,
JP-A-8-97565 discloses that a circuit layer contains a first liquid crystal polymer and an adhesive layer containing a second liquid crystal polymer having a melting point lower than that of the first liquid crystal polymer is inserted between the circuit layers. A multilayer printed circuit board comprising: a high-frequency circuit board in which a thermoplastic liquid crystal polymer film and a metal foil are adhered to each other using an epoxy-based adhesive is proposed in JP-A-2000-269616. ing.
【０００９】[0009]
【発明が解決しようとする課題】しかしながら、特開平
8-97565号公報に提案された多層プリント回路基板は、
回路層を間に液晶ポリマーを含む接着剤層を挿入して熱
圧着により接着する際、液晶ポリマー分子が剛直で動き
難いために回路層表面の微細な凹部に入ることができ
ず、その結果、十分なアンカー効果を発揮することがで
きず、回路層と接着剤層との密着性が悪く高温バイアス
試験で絶縁不良が発生してしまうという問題点を有して
いた。SUMMARY OF THE INVENTION
The multilayer printed circuit board proposed in 8-97565 is
When an adhesive layer containing a liquid crystal polymer is inserted between the circuit layers and bonded by thermocompression bonding, the liquid crystal polymer molecules are rigid and difficult to move, so that they cannot enter the fine recesses on the surface of the circuit layer. There was a problem that a sufficient anchor effect could not be exerted, the adhesion between the circuit layer and the adhesive layer was poor, and insulation failure occurred in a high-temperature bias test.
【００１０】また、特開2000-269616号公報に提案され
た高周波回路基板は、エポキシ系接着剤の誘電率が液晶
ポリマーの誘電率と大きく異なることから、積層時の加
圧によって生じるわずかな厚みばらつきにより、高周波
領域、特に100ＭＨｚ以上の周波数領域においては伝送
特性が低下してしまうという問題点を有していた。The high-frequency circuit board proposed in Japanese Patent Application Laid-Open No. 2000-269616 has a small thickness caused by pressure during lamination since the dielectric constant of an epoxy-based adhesive is significantly different from that of a liquid crystal polymer. Due to the variation, there is a problem that transmission characteristics are degraded in a high frequency region, particularly in a frequency region of 100 MHz or higher.
【００１１】本発明はかかる従来技術の問題点に鑑み案
出されたものであり、その目的は、高密度な配線を有す
るとともに、半田耐熱性・絶縁性・高周波伝送特性に優
れた多層配線基板を提供することに有る。The present invention has been devised in view of the problems of the prior art, and has as its object to provide a multilayer wiring board having high-density wiring and excellent solder heat resistance, insulation and high-frequency transmission characteristics. It is in providing.
【００１２】[0012]
【課題を解決するための手段】本発明の多層配線基板
は、有機材料から成り、上下面の少なくとも１つの面に
金属箔から成る配線導体が配設された複数の絶縁層を積
層して成るとともに、この絶縁層を挟んで上下に位置す
る配線導体間を絶縁層に形成された貫通導体を介して電
気的に接続した多層配線基板であって、絶縁層は、液晶
ポリマー層の上下面にポリフェニレンエーテル系有機物
から成る被覆層を形成して成ることを特徴とするもので
ある。A multilayer wiring board according to the present invention is formed by laminating a plurality of insulating layers made of an organic material and having a wiring conductor made of a metal foil on at least one of upper and lower surfaces. A multilayer wiring board in which wiring conductors located above and below the insulating layer are electrically connected via through conductors formed in the insulating layer, and the insulating layer is provided on upper and lower surfaces of the liquid crystal polymer layer. It is characterized in that a coating layer made of a polyphenylene ether organic material is formed.
【００１３】本発明の多層配線基板によれば、絶縁層を
液晶ポリマー層の表面にポリフェニレンエーテル系有機
物から成る被覆層を形成して成るものとしたことから、
微細な貫通孔を穿設加工することが可能となり、その結
果、高密度な配線を有する多層配線基板とすることがで
き、また、液晶ポリマー層とポリフェニレンエーテル系
有機物から成る被覆層の誘電率の周波数挙動がほぼ等し
いことから、積層の際にわずかな厚みばらつきが生じた
としても高周波領域における伝送特性の低下を生じるこ
とのない高周波伝送特性に優れた多層配線基板とするこ
とできる。さらに、ポリフェニレンエーテル系有機物か
ら成る被覆層は、液晶ポリマー層と同程度の疎水性を示
すことから、両者の樹脂同士の馴染みが良好で接着性に
優れ、また、被覆層がランダムな分子構造で比較的熱運
動しやすい分子から成ることから、液晶ポリマー層表面
の微細な凹部に入り込み十分なアンカー効果を発揮する
ことができ、その結果、液晶ポリマー層と被覆層との密
着性が良好となり高温バイアス試験で絶縁不良が発生す
ることもない。さらにまた、液晶ポリマーが低吸湿性で
あることから、半田リフロー時に水分が気化してガスが
発生することもなく、絶縁層間で剥離してしまうことも
ない。According to the multilayer wiring board of the present invention, the insulating layer is formed by forming a coating layer made of a polyphenylene ether organic material on the surface of the liquid crystal polymer layer.
It is possible to form a fine through-hole, and as a result, it is possible to obtain a multilayer wiring board having high-density wiring, and to obtain a dielectric constant of a liquid crystal polymer layer and a coating layer made of a polyphenylene ether-based organic material. Since the frequency behaviors are substantially equal, a multilayer wiring board having excellent high-frequency transmission characteristics without causing a decrease in transmission characteristics in a high-frequency region even when slight thickness variations occur during lamination can be obtained. Furthermore, since the coating layer made of a polyphenylene ether-based organic material exhibits the same degree of hydrophobicity as the liquid crystal polymer layer, both resins have good compatibility and excellent adhesion, and the coating layer has a random molecular structure. Since it is composed of molecules that are relatively easily moved by heat, it can penetrate into fine recesses on the surface of the liquid crystal polymer layer and exhibit a sufficient anchoring effect, resulting in good adhesion between the liquid crystal polymer layer and the coating layer, No insulation failure occurs in the bias test. Furthermore, since the liquid crystal polymer has low hygroscopicity, no gas is generated due to moisture vaporization during solder reflow, and no separation occurs between the insulating layers.
【００１４】[0014]
【発明の実施の形態】次に本発明の多層配線基板を添付
の図面に基づいて詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a multilayer wiring board according to the present invention will be described in detail with reference to the accompanying drawings.
【００１５】図１は、本発明の多層配線基板に半導体素
子を搭載して成る混成集積回路の実施の形態の一例を示
す断面図であり、また、図２は、図１に示す多層配線基
板の要部断面図である。これらの図において１は絶縁
層、２は配線導体、３は貫通導体で、主にこれらで本発
明の多層配線基板４が構成されている。なお、本例で
は、絶縁層１を４層積層して成る多層配線基板４を示し
ている。FIG. 1 is a sectional view showing an example of an embodiment of a hybrid integrated circuit in which a semiconductor element is mounted on a multilayer wiring board according to the present invention. FIG. 2 is a sectional view showing the multilayer wiring board shown in FIG. It is principal part sectional drawing of. In these figures, reference numeral 1 denotes an insulating layer, 2 denotes a wiring conductor, and 3 denotes a through conductor, and these mainly constitute a multilayer wiring board 4 of the present invention. In this example, a multi-layer wiring board 4 formed by laminating four insulating layers 1 is shown.
【００１６】絶縁層１は、液晶ポリマー層５と、その表
面に被着形成されたポリフェニレンエーテル系有機物か
ら成る被覆層６とから構成されており、配線導体２や多
層配線基板４に搭載される電子部品７の支持体としての
機能を有する。The insulating layer 1 is composed of a liquid crystal polymer layer 5 and a covering layer 6 made of a polyphenylene ether-based organic substance formed on the surface thereof, and is mounted on the wiring conductor 2 and the multilayer wiring board 4. It has a function as a support for the electronic component 7.
【００１７】なお、ここで液晶ポリマーとは、溶融時に
液晶状態あるいは光学的に複屈折する性質を有するポリ
マーを指し、一般に溶液状態で液晶性を示すリオトロピ
ック液晶ポリマーや溶融時に液晶性を示すサーモトロピ
ック液晶ポリマー、あるいは、熱変形温度で分類される
１型・２型・３型すべての液晶ポリマーを含むものであ
る。また、ポリフェニレンエーテル系有機物とは、ポリ
フェニレンエーテル樹脂やポリフェニレンエーテルに種
々の官能基が結合した樹脂、あるいはこれらの誘導体・
重合体を意味するものである。Here, the liquid crystal polymer means a polymer having a liquid crystal state or an optically birefringent property when melted, and generally a lyotropic liquid crystal polymer which exhibits liquid crystallinity in a solution state or a thermotropic liquid crystal polymer which exhibits liquid crystallinity when melted. It includes a liquid crystal polymer or a liquid crystal polymer of all types 1, 2, and 3 classified by heat distortion temperature. The polyphenylene ether-based organic material is a polyphenylene ether resin or a resin in which various functional groups are bonded to polyphenylene ether, or a derivative or a derivative thereof.
It means a polymer.
【００１８】また、液晶ポリマーは、温度サイクル信頼
性・半田耐熱性・加工性の観点からは200〜400℃の温
度、特に250〜350℃の温度に融点を有するものが好まし
く、さらに、層としての物性を損なわない範囲内で、熱
安定性を改善するための酸化防止剤や耐光性を改善する
ための紫外線吸収剤等の光安定剤、難燃性を改善するた
めのハロゲン系もしくはリン酸系の難燃性剤、アンチモ
ン系化合物やホウ酸亜鉛・メタホウ酸バリウム・酸化ジ
ルコニウム等の難燃助剤、潤滑性を改善するための高級
脂肪酸や高級脂肪酸エステル・高級脂肪酸金属塩・フル
オロカーボン系界面活性剤等の滑剤、熱膨張係数を調整
するため、および／または機械的強度を向上するための
酸化アルミニウム・酸化珪素・酸化チタン・酸化バリウ
ム・酸化ストロンチウム・酸化ジルコニウム・酸化カル
シウム・ゼオライト・窒化珪素・窒化アルミニウム・炭
化珪素・チタン酸カリウム・チタン酸バリウム・チタン
酸ストロンチウム・チタン酸カルシウム・ホウ酸アルミ
ニウム・スズ酸バリウム・ジルコン酸バリウム・ジルコ
ン酸ストロンチウム等の充填材を含有してもよい。The liquid crystal polymer preferably has a melting point at a temperature of 200 to 400 ° C., particularly 250 to 350 ° C., from the viewpoint of temperature cycle reliability, solder heat resistance and workability. Light stabilizers such as an antioxidant for improving thermal stability and an ultraviolet absorber for improving light resistance, and a halogen or phosphoric acid for improving flame retardancy, as long as the physical properties of the compound are not impaired. -Based flame retardants, antimony-based compounds, flame-retardant aids such as zinc borate, barium metaborate, and zirconium oxide; higher fatty acids and higher fatty acid esters to improve lubricity; higher fatty acid metal salts; and fluorocarbon-based interfaces Lubricant such as activator, aluminum oxide / silicon oxide / titanium oxide / barium oxide / strontium oxide for adjusting thermal expansion coefficient and / or improving mechanical strength Zirconium oxide, calcium oxide, zeolite, silicon nitride, aluminum nitride, silicon carbide, potassium titanate, barium titanate, strontium titanate, calcium titanate, aluminum borate, barium stannate, barium zirconate, strontium zirconate, etc. It may contain a filler.
【００１９】なお、上記の充填材等の粒子形状は、略球
状・針状・フレーク状等があり、充填性の観点からは略
球状が好ましい。また、粒子径は、通常0.1〜15μｍ程
度であり、液晶ポリマー層５の厚みよりも小さい。The particle shape of the above-mentioned filler and the like includes a substantially spherical shape, a needle shape, a flake shape and the like, and a substantially spherical shape is preferable from the viewpoint of filling properties. The particle size is usually about 0.1 to 15 μm, which is smaller than the thickness of the liquid crystal polymer layer 5.
【００２０】さらに、液晶ポリマー層５は、ポリフェニ
レンエーテル系有機物から成る被覆層６との密着性を高
めるために、その表面をバフ研磨・ブラスト研磨・ブラ
シ研磨・プラズマ処理・コロナ処理・紫外線処理・薬品
処理等の方法を用いて中心線表面粗さＲａが0.05〜５μ
ｍの値となるように粗化しておくことが好ましい。中心
線表面粗さＲａは、半田リフローの際に液晶ポリマー層
５と被覆層６との剥離を防止するという観点からは0.05
μｍ以上であることが好ましく、表面に被覆層６を形成
する際に空気のかみ込みを防止するという観点からは５
μｍ以下であることが好ましい。従って、液晶ポリマー
層５は、その表面を中心線表面粗さＲａが0.05〜５μｍ
の粗面とすることが好ましい。Further, the liquid crystal polymer layer 5 has its surface buffed, blasted, brushed, plasma-treated, corona-treated, ultraviolet-treated in order to enhance the adhesion with the coating layer 6 made of a polyphenylene ether-based organic substance. The center line surface roughness Ra is 0.05 to 5μ by using a method such as chemical treatment.
It is preferable to roughen so as to have a value of m. The center line surface roughness Ra is 0.05 from the viewpoint of preventing peeling of the liquid crystal polymer layer 5 and the coating layer 6 during solder reflow.
μm or more, and from the viewpoint of preventing air entrapment when forming the coating layer 6 on the surface, it is 5 μm or more.
It is preferably not more than μm. Therefore, the liquid crystal polymer layer 5 has a center line surface roughness Ra of 0.05 to 5 μm.
It is preferable to have a rough surface.
【００２１】次に、液晶ポリマー層５の表面に形成され
るポリフェニレンエーテル系有機物から成る被覆層６
は、絶縁層１に配線導体２を被着形成する際の接着剤の
機能を有するとともに、絶縁層１同志を積層する際の接
着剤の役目を果たす。Next, a coating layer 6 made of a polyphenylene ether-based organic substance formed on the surface of the liquid crystal polymer layer 5
Has the function of an adhesive when the wiring conductor 2 is adhered to the insulating layer 1 and also functions as an adhesive when the insulating layers 1 are laminated.
【００２２】被覆層６は、ポリフェニレンエーテル樹脂
やその誘導体、または、これらのポリマーアロイ等のポ
リフェニレンエーテル系有機物を30〜90体積％含有して
おり、とりわけ熱サイクル信頼性や積層時の位置精度の
観点からは、アリル変性ポリフェニレンエーテル等の熱
硬化性ポリフェニレンエーテルを含有することが好まし
い。The coating layer 6 contains 30 to 90% by volume of a polyphenylene ether-based organic material such as a polyphenylene ether resin or a derivative thereof, or a polymer alloy thereof. From the viewpoint, it is preferable to contain a thermosetting polyphenylene ether such as an allyl-modified polyphenylene ether.
【００２３】なお、ポリフェニレンエーテル系有機物の
含有量が30体積％未満であると、後述する充填材との混
練性が低下する傾向があり、また、90体積％を超える
と、液晶ポリマー層５表面に被覆層６を形成する際に、
被覆層６の厚みバラツキが大きくなる傾向がある。従っ
て、ポリフェニレンエーテル系有機物の含有量は、30〜
90体積％の範囲が好ましい。When the content of the polyphenylene ether-based organic substance is less than 30% by volume, the kneadability with a filler described later tends to decrease. On the other hand, when the content exceeds 90% by volume, the surface of the liquid crystal polymer layer 5 is exposed. When forming the coating layer 6 on the
The thickness variation of the coating layer 6 tends to increase. Therefore, the content of the polyphenylene ether-based organic substance is 30 to
A range of 90% by volume is preferred.
【００２４】また、ポリフェニレンエーテル系有機物か
ら成る被覆層６は、液晶ポリマー層５との接着性や配線
導体２・貫通導体３との密着性を良好にするという観点
からは、重合反応可能な官能基を２個以上有する多官能
性モノマーあるいは多官能性重合体等の添加剤を含有す
ることが好ましく、例えば、トリアリルシアヌレートや
トリアリルイソシアヌレートおよびこれらの重合体等を
含有することが好ましい。The coating layer 6 made of a polyphenylene ether-based organic material has a functional property capable of undergoing a polymerization reaction from the viewpoint of improving the adhesion to the liquid crystal polymer layer 5 and the adhesion to the wiring conductor 2 and the through conductor 3. It is preferable to contain an additive such as a polyfunctional monomer or a polyfunctional polymer having two or more groups, for example, it is preferable to contain triallyl cyanurate, triallyl isocyanurate and a polymer thereof. .
【００２５】さらに、被覆層６は、弾性率を調整するた
めのゴム成分や熱安定性を改善するための酸化防止剤、
耐光性を改善するための紫外線吸収剤等の光安定剤、難
燃性を改善するためのハロゲン系もしくはリン酸系の難
燃性剤、アンチモン系化合物やホウ酸亜鉛・メタホウ酸
バリウム・酸化ジルコニウム等の難燃助剤、潤滑性を改
善するための高級脂肪酸や高級脂肪酸エステルや高級脂
肪酸金属塩・フルオロカーボン系界面活性剤等の滑剤、
熱膨張係数を調整したり機械的強度を向上するための酸
化アルミニウムや酸化珪素・酸化チタン・酸化バリウム
・酸化ストロンチウム・酸化ジルコニウム・酸化カルシ
ウム・ゼオライト・窒化珪素・窒化アルミニウム・炭化
珪素・チタン酸カリウム・チタン酸バリウム・チタン酸
ストロンチウム・チタン酸カルシウム・ホウ酸アルミニ
ウム・スズ酸バリウム・ジルコン酸バリウム・ジルコン
酸ストロンチウム等の充填材、あるいは、充填材との親
和性を高めこれらの接合性向上と機械的強度を高めるた
めのシラン系カップリング剤やチタネート系カップリン
グ剤等のカップリング剤を含有してもよい。Further, the coating layer 6 includes a rubber component for adjusting the elastic modulus, an antioxidant for improving thermal stability,
Light stabilizers such as ultraviolet absorbers to improve light resistance, halogen-based or phosphoric-based flame retardants to improve flame retardancy, antimony compounds, zinc borate, barium metaborate, and zirconium oxide. Such as flame retardant aids, lubricants such as higher fatty acids, higher fatty acid esters, higher fatty acid metal salts and fluorocarbon surfactants for improving lubricity;
Aluminum oxide, silicon oxide, titanium oxide, barium oxide, strontium oxide, zirconium oxide, calcium oxide, zeolite, silicon nitride, aluminum nitride, silicon carbide, potassium titanate for adjusting the thermal expansion coefficient and improving mechanical strength -Fillers such as barium titanate-strontium titanate-calcium titanate-aluminum borate-barium stannate-barium zirconate-strontium zirconate; A coupling agent such as a silane coupling agent or a titanate coupling agent for increasing the mechanical strength may be contained.
【００２６】特に絶縁層１を積層しプレスする際に、被
覆層６の流動性を抑制し、貫通導体３の位置ずれや被覆
層６の厚みばらつきを防止するという観点からは、被覆
層６は充填材として10体積％以上の無機絶縁粉末を含有
することが好ましい。また、液晶ポリマー層５との接着
界面および配線導体２との接着界面での半田リフロー時
の剥離を防止するという観点からは、充填材の含有量を
70体積％以下とすることが好ましい。従って、ポリフェ
ニレンエーテル系有機物から成る被覆層６に、10〜70体
積％の充填材を含有させておくことが好ましい。In particular, when the insulating layer 1 is laminated and pressed, from the viewpoint of suppressing the fluidity of the coating layer 6 and preventing the displacement of the through conductor 3 and the thickness variation of the coating layer 6, the coating layer 6 is formed. It is preferable to contain 10% by volume or more of an inorganic insulating powder as a filler. Further, from the viewpoint of preventing peeling during solder reflow at the bonding interface with the liquid crystal polymer layer 5 and the bonding interface with the wiring conductor 2, the content of the filler should be reduced.
It is preferable to be 70% by volume or less. Therefore, it is preferable that the coating layer 6 made of a polyphenylene ether-based organic substance contains 10 to 70% by volume of a filler.
【００２７】なお、上記の充填材等の形状は、略球状・
針状・フレーク状等があり、充填性の観点からは、略球
状が好ましい。また、粒子径は、0.1〜15μｍ程度であ
り、被覆層６の厚みよりも小さい。The shape of the above-mentioned filler and the like is substantially spherical.
There are a needle shape, a flake shape and the like, and a substantially spherical shape is preferable from the viewpoint of filling properties. The particle diameter is about 0.1 to 15 μm, which is smaller than the thickness of the coating layer 6.
【００２８】本発明の多層配線基板４によれば、液晶ポ
リマー層５とポリフェニレンエーテル系有機物から成る
被覆層６の誘電率とがほぼ等しいことから、積層の際に
わずかな厚みばらつきが生じても高周波領域における伝
送特性の低下を生じることのない高周波伝送特性に優れ
た多層配線基板４とすることできる。また、被覆層６が
液晶ポリマー層５と同程度の疎水性を示すことから樹脂
同士の馴染みが良好であるため接着性に優れるととも
に、被覆層６がランダムな分子構造で比較的熱運動しや
すい分子から成ることから液晶ポリマー層５表面の微細
な凹部に入り込み十分なアンカー効果を発揮することが
でき、その結果、液晶ポリマー層５と被覆層６との密着
性が良好となり高温バイアス試験で絶縁不良が発生する
ことのない耐熱性・絶縁性に優れた多層配線基板４とす
ることができる。According to the multilayer wiring board 4 of the present invention, since the dielectric constant of the liquid crystal polymer layer 5 and the covering layer 6 made of polyphenylene ether-based organic material are substantially equal, even if a slight thickness variation occurs during the lamination. The multilayer wiring board 4 having excellent high-frequency transmission characteristics without causing a decrease in transmission characteristics in a high-frequency region can be provided. In addition, since the coating layer 6 exhibits the same degree of hydrophobicity as the liquid crystal polymer layer 5, the resin is well-adapted to each other, so that the adhesive property is excellent, and the coating layer 6 has a random molecular structure and is relatively easily moved by heat. Since it is composed of molecules, it can penetrate into fine recesses on the surface of the liquid crystal polymer layer 5 and exhibit a sufficient anchor effect. As a result, the adhesion between the liquid crystal polymer layer 5 and the coating layer 6 becomes good, and the insulation is obtained in a high temperature bias test. The multilayer wiring board 4 which is excellent in heat resistance and insulation without causing defects can be obtained.
【００２９】このような絶縁層１は、例えば粒径が0.1
〜15μｍ程度の酸化珪素等の無機絶縁粉末に、熱硬化性
ポリフェニレンエーテル樹脂と溶剤・可塑剤・分散剤等
を添加して得たペーストを液晶ポリマー層５の上下表面
に従来周知のドクタブレード法等のシート成型法を採用
して被覆層６を形成した後、あるいは上記のペースト中
に液晶ポリマー層５を浸漬し垂直に引き上げることによ
って液晶ポリマー層５の表面に被覆層６を形成した後、
これを60〜100℃の温度で５分〜３時間加熱・乾燥する
ことにより製作される。The insulating layer 1 has, for example, a particle size of 0.1.
A paste obtained by adding a thermosetting polyphenylene ether resin, a solvent, a plasticizer, a dispersant, and the like to an inorganic insulating powder such as silicon oxide having a thickness of about 15 μm is applied to the upper and lower surfaces of the liquid crystal polymer layer 5 by a known doctor blade method. After forming the coating layer 6 by employing a sheet molding method such as that described above, or after forming the coating layer 6 on the surface of the liquid crystal polymer layer 5 by immersing the liquid crystal polymer layer 5 in the above paste and vertically pulling it up,
It is manufactured by heating and drying it at a temperature of 60 to 100 ° C. for 5 minutes to 3 hours.
【００３０】なお、絶縁層１の厚みは絶縁信頼性を確保
するという観点からは10〜200μｍであることが好まし
く、また、高耐熱性・低吸湿性・高寸法安定性を確保す
るという観点からは、液晶ポリマー層５の厚みを絶縁層
１の厚みの40〜90％の範囲としておくことが好ましい。The thickness of the insulating layer 1 is preferably from 10 to 200 μm from the viewpoint of securing insulation reliability, and from the viewpoint of securing high heat resistance, low moisture absorption and high dimensional stability. Preferably, the thickness of the liquid crystal polymer layer 5 is set in the range of 40 to 90% of the thickness of the insulating layer 1.
【００３１】また、絶縁層１には、上下面の少なくとも
１つの面に配線導体２が被着形成されている。配線導体
２は、その厚みが２〜30μｍ程度で銅・金等の良導電性
の金属箔から成り、多層配線基板４に搭載される電子部
品７を外部電気回路（図示せず）に電気的に接続する機
能を有する。In the insulating layer 1, a wiring conductor 2 is formed on at least one of the upper and lower surfaces. The wiring conductor 2 has a thickness of about 2 to 30 μm and is made of a highly conductive metal foil such as copper or gold, and electrically connects the electronic components 7 mounted on the multilayer wiring board 4 to an external electric circuit (not shown). It has the function of connecting to
【００３２】このような配線導体２は、絶縁層１を複数
層積層する際、配線導体２の周囲にボイドが発生するの
を防止するという観点から、被覆層６に少なくとも配線
導体２の表面と被覆層６の表面とが平坦となるように埋
設されていることが好ましい。また、配線導体２を被覆
層６に埋設する際に、被覆層６の乾燥状態での気孔率を
３〜40体積％としておくと、配線導体２周囲の被覆層６
の樹脂盛り上がりを生じさせず平坦化することができる
とともに配線導体２と被覆層６の間に挟まれる空気の排
出を容易にして気泡の巻き込みを防止することができ
る。なお、乾燥状態での気孔率が40体積％を超えると、
複数層積層した絶縁層１を加圧・加熱硬化した後に、被
覆層６内に気孔が残存し、この気孔が空気中の水分を吸
着して絶縁性が低下してしまうおそれがあるので、被覆
層６の乾燥状態での気孔率を３〜40体積％の範囲として
おくことが好ましい。In order to prevent the occurrence of voids around the wiring conductor 2 when a plurality of insulating layers 1 are laminated, such a wiring conductor 2 is provided at least on the surface of the wiring conductor 2 on the covering layer 6. It is preferable that the surface of the coating layer 6 is buried so as to be flat. When the porosity of the coating layer 6 in the dry state is set to 3 to 40% by volume when the wiring conductor 2 is embedded in the coating layer 6, the coating layer
The resin can be flattened without causing resin swelling, and the air trapped between the wiring conductor 2 and the coating layer 6 can be easily discharged to prevent air bubbles from being trapped. When the porosity in the dry state exceeds 40% by volume,
After pressurizing and heating and curing the laminated insulating layer 1, pores remain in the coating layer 6, and the pores may adsorb moisture in the air and the insulating property may be reduced. It is preferable that the porosity of the layer 6 in a dry state is in the range of 3 to 40% by volume.
【００３３】このような被覆層６の乾燥状態での気孔率
は、被覆層６を液晶ポリマー層５の表面上に塗布し乾燥
する際に、乾燥温度や昇温速度等の乾燥条件を適宜調整
することにより気孔率を所望の値とすることができる。The porosity of the coating layer 6 in the dry state can be adjusted by appropriately controlling drying conditions such as a drying temperature and a heating rate when the coating layer 6 is applied on the surface of the liquid crystal polymer layer 5 and dried. By doing so, the porosity can be set to a desired value.
【００３４】また、配線導体２と液晶ポリマー層５の間
に位置する被覆層６の厚みを３〜35μｍの厚みとしてお
くことが好ましい。配線導体２と液晶ポリマー層５の間
に位置する被覆層６の厚みを３〜35μｍの厚みとして、
配線導体２と誘電正接の低い液晶ポリマー層５とを近づ
けることにより、配線導体２周囲の誘電正接を低くする
ことができ、その結果、高周波領域、特に100ＭＨｚ以
上の周波数領域における伝送特性を向上させることがで
きる。なお、被覆層６の厚みが３μｍ未満であると、配
線導体２の熱膨張・熱収縮により発生する応力を被覆層
６で有効に緩和することができず、配線導体２のコーナ
ー部からクラックが発生してしまう傾向があり、35μｍ
を超えると配線導体２周囲の誘電正接を低くする効果が
低下してしまう傾向がある。従って、配線導体２と液晶
ポリマー層５の間に位置する被覆層６の厚みを３〜35μ
ｍの範囲としておくことが好ましい。It is preferable that the thickness of the coating layer 6 located between the wiring conductor 2 and the liquid crystal polymer layer 5 be 3 to 35 μm. Assuming that the thickness of the coating layer 6 located between the wiring conductor 2 and the liquid crystal polymer layer 5 is 3 to 35 μm,
By bringing the wiring conductor 2 and the liquid crystal polymer layer 5 having a low dielectric loss tangent close to each other, the dielectric loss tangent around the wiring conductor 2 can be reduced, and as a result, the transmission characteristics in a high frequency region, particularly in a frequency region of 100 MHz or more, are improved. be able to. If the thickness of the coating layer 6 is less than 3 μm, the stress generated by the thermal expansion and thermal contraction of the wiring conductor 2 cannot be effectively relieved by the coating layer 6, and cracks are formed from the corners of the wiring conductor 2. 35 μm
If it exceeds, the effect of lowering the dielectric loss tangent around the wiring conductor 2 tends to decrease. Accordingly, the thickness of the coating layer 6 located between the wiring conductor 2 and the liquid crystal polymer layer 5 is 3 to 35 μm.
It is preferable to set the range of m.
【００３５】さらに、絶縁層１に配設された配線導体２
の幅方向の断面形状を、絶縁層１側の底辺の長さが対向
する底辺の長さよりも短い台形状とするとともに、絶縁
層１側の底辺と側辺との成す角度を95〜150°とするこ
とが好ましい。絶縁層１に配設された配線導体２の幅方
向の断面形状を、絶縁層１側の底辺の長さが対向する底
辺の長さよりも短い台形状とするとともに、絶縁層１側
の底辺と側辺との成す角度を95〜150°とすることによ
り、配線導体２を被覆層６に埋設する際に、配線導体２
を被覆層６に容易に埋設することができる。なお、気泡
をかみ込むことなく埋設するという観点からは、絶縁層
１側の底辺と側辺との成す角度を95°以上とすることが
好ましく、配線導体２を微細化するという観点からは15
0°以下とすることが好ましい。Further, the wiring conductor 2 provided on the insulating layer 1
Has a trapezoidal shape in which the length of the base on the insulating layer 1 side is shorter than the length of the opposing base, and the angle between the base and the side on the insulating layer 1 side is 95 to 150 °. It is preferable that The cross-sectional shape in the width direction of the wiring conductor 2 disposed on the insulating layer 1 is trapezoidal in which the length of the base on the side of the insulating layer 1 is shorter than the length of the opposite base, and the width of the base on the side of the insulating layer 1 By setting the angle between the side and the side at 95 to 150 °, when the wiring conductor 2 is embedded in the coating layer 6, the wiring conductor 2
Can be easily embedded in the coating layer 6. In addition, from the viewpoint of burying without entrapping air bubbles, it is preferable that the angle between the bottom side and the side of the insulating layer 1 is 95 ° or more, and from the viewpoint of miniaturizing the wiring conductor 2, it is 15 °.
Preferably, it is 0 ° or less.
【００３６】また、絶縁層１の層間において、配線導体
２の長さの短い底辺と液晶ポリマー層５との間に位置す
る被覆層６の厚みｘ（μｍ）が、上下の液晶ポリマー層
５間の距離をＴ（μｍ）、配線導体２の厚みをｔ（μ
ｍ）としたときに、３μｍ≦0.5Ｔ−ｔ≦ｘ≦0.5Ｔ≦35
μｍ（ただし、８μｍ≦Ｔ≦70μｍ、１μｍ≦ｔ≦32μ
ｍ）であることが好ましい。The thickness x (μm) of the coating layer 6 located between the short base of the wiring conductor 2 and the liquid crystal polymer layer 5 between the insulating layers 1 is set between the upper and lower liquid crystal polymer layers 5. Is T (μm), and the thickness of the wiring conductor 2 is t (μm).
m), 3 μm ≦ 0.5T−t ≦ x ≦ 0.5T ≦ 35
μm (8 μm ≦ T ≦ 70 μm, 1 μm ≦ t ≦ 32 μm
m) is preferred.
【００３７】液晶ポリマー層６間の距離をＴ（μｍ）、
配線導体２の厚みをｔ（μｍ）としたときに、配線導体
２の長さの短い底辺と液晶ポリマー層５間のポリフェニ
レンエーテル系有機物から成る被覆層６の厚みｘ（μ
ｍ）を３μｍ≦0.5Ｔ−ｔ≦ｘ≦0.5Ｔ≦35μｍとするこ
とにより、配線導体２の長さの短い底辺と液晶ポリマー
層５間の距離および配線導体２の長さの長い底辺と隣接
する液晶ポリマー層５間の距離の差をt（μｍ）未満と
小さくでき、配線導体２周囲の誘電正接バラツキを小さ
なものとすることができ、その結果、伝送特性が低下す
ることを防止できる。従って、配線導体２の台形状の上
底側表面と液晶ポリマー層５の間に位置する、ポリフェ
ニレンエーテル系有機物から成る被覆層６の厚みｘ（μ
ｍ）を、液晶ポリマー層６間の距離をＴ（μｍ）、配線
導体２の厚みをｔ（μｍ）としたときに、３μｍ≦0.5
Ｔ−ｔ≦ｘ≦0.5Ｔ≦35μｍの範囲とすることが好まし
い。The distance between the liquid crystal polymer layers 6 is T (μm),
Assuming that the thickness of the wiring conductor 2 is t (μm), the thickness x (μ) of the covering layer 6 made of a polyphenylene ether-based organic material between the short base of the wiring conductor 2 and the liquid crystal polymer layer 5
m) is set to 3 μm ≦ 0.5T−t ≦ x ≦ 0.5T ≦ 35 μm, so that the distance between the short base of the wiring conductor 2 and the liquid crystal polymer layer 5 and the long base of the wiring conductor 2 are long. The difference in the distance between the liquid crystal polymer layers 5 can be reduced to less than t (μm), the variation in the dielectric loss tangent around the wiring conductor 2 can be reduced, and as a result, the transmission characteristics can be prevented from deteriorating. Accordingly, the thickness x (μ) of the coating layer 6 made of a polyphenylene ether-based organic substance and located between the trapezoidal upper bottom surface of the wiring conductor 2 and the liquid crystal polymer layer 5.
m), when the distance between the liquid crystal polymer layers 6 is T (μm) and the thickness of the wiring conductor 2 is t (μm), 3 μm ≦ 0.5
It is preferable that Tt ≦ x ≦ 0.5T ≦ 35 μm.
【００３８】このような配線導体２は、絶縁層１となる
前駆体シートに、公知のフォトレジストを用いたサブト
ラクティブ法によりパターン形成した例えば銅から成る
金属箔を転写法等により被着形成することにより形成さ
れる。先ず、支持体と成るフィルム上に銅から成る金属
箔を接着剤を介して接着した金属箔転写用フィルムを用
意し、次に、フィルム上の金属箔を公知のフォトレジス
トを用いたサブトラクティブ法を使用してパターン状に
エッチングする。この時、パターンの表面側の側面は、
フィルム側の側面に較べてエッチング液に接する時間が
長いためにエッチングされやすく、パターンの幅方向の
断面形状を台形状とすることができる。なお、台形の形
状は、エッチング液の濃度やエッチング時間を調整する
ことにより短い底辺と側辺とのなす角度を95〜150°の
台形状とすることができる。そして、この金属箔転写用
フィルムを絶縁層１と成る前駆体シートに積層し、温度
が100〜200℃で圧力が0.5〜10ＭＰａの条件で10分〜１
時間ホットプレスした後、支持体と成るフィルムを剥離
除去して金属箔を絶縁層１と成る前駆体シート表面に転
写させることにより、台形状の上底側がポリフェニレン
エーテル系有機物から成る被覆層６に埋設された配線導
体２を形成することができる。Such a wiring conductor 2 is formed by depositing a metal foil made of, for example, copper, which is patterned by a subtractive method using a known photoresist, on a precursor sheet to be the insulating layer 1 by a transfer method or the like. It is formed by this. First, a metal foil transfer film is prepared by bonding a metal foil made of copper on a film serving as a support with an adhesive, and then the metal foil on the film is subjected to a subtractive method using a known photoresist. Is used to etch in a pattern. At this time, the side surface on the front side of the pattern
Since the contact time with the etching solution is longer than that of the side surface on the film side, etching is easy, and the cross-sectional shape in the width direction of the pattern can be trapezoidal. The trapezoidal shape can be formed into a trapezoidal shape in which the angle between the short base and the side is 95 to 150 ° by adjusting the concentration of the etching solution and the etching time. Then, this metal foil transfer film is laminated on a precursor sheet to be the insulating layer 1, and the temperature is 100 to 200 ° C. and the pressure is 0.5 to 10 MPa for 10 minutes to 1 hour.
After hot pressing for a period of time, the film serving as the support is peeled off and the metal foil is transferred to the surface of the precursor sheet serving as the insulating layer 1, so that the trapezoidal upper and lower sides become the coating layer 6 made of a polyphenylene ether-based organic material. The buried wiring conductor 2 can be formed.
【００３９】なお、配線導体２の長さの短い底辺と対向
する液晶ポリマー層５間の被覆層６の厚みｘ（μｍ）
は、金属箔転写時のホットプレスの圧力を調整すること
により３〜35μｍの範囲とすることができる。また、配
線導体２は被覆層６との密着性を高めるためにその表面
にバフ研磨・ブラスト研磨・ブラシ研磨・薬品処理等の
処理で表面を粗化しておくことが好ましい。The thickness x (μm) of the coating layer 6 between the liquid crystal polymer layer 5 and the base having the shorter length of the wiring conductor 2.
Can be set in the range of 3 to 35 μm by adjusting the pressure of the hot press during the transfer of the metal foil. The surface of the wiring conductor 2 is preferably roughened by a process such as buffing, blasting, brushing, or chemical treatment in order to enhance the adhesion to the coating layer 6.
【００４０】また、絶縁層１には、直径が20〜150μｍ
程度の貫通導体３が形成されている。貫通導体３は、絶
縁層を挟んで上下に位置する配線導体２を電気的に接続
する機能を有し、絶縁層１にレーザにより穿設加工を施
すことにより貫通孔を形成した後、この貫通孔に銅・銀
・金・半田等から成る導電性ペーストを従来周知のスク
リーン印刷法により埋め込むことにより形成される。The insulating layer 1 has a diameter of 20 to 150 μm.
The through conductor 3 is formed to a degree. The penetrating conductor 3 has a function of electrically connecting the wiring conductors 2 positioned above and below the insulating layer with the insulating layer interposed therebetween. The hole is formed by embedding a conductive paste made of copper, silver, gold, solder, or the like by a conventionally known screen printing method.
【００４１】本発明の多層配線基板４によれば、絶縁層
１を液晶ポリマー層５の上下面にポリフェニレンエーテ
ル系有機物から成る被覆層６を有したものとしたことか
ら、液晶ポリマー層５が高耐熱性・高弾性率・高寸法安
定性・低吸湿性であり、ガラスクロスのような強化材を
用いなくとも絶縁層１を構成することが可能となり、そ
の結果、レーザによる穿設加工が容易となり微細で均一
な貫通孔を形成できる。According to the multilayer wiring board 4 of the present invention, since the insulating layer 1 has the coating layer 6 made of a polyphenylene ether-based organic material on the upper and lower surfaces of the liquid crystal polymer layer 5, the liquid crystal polymer layer 5 is high. It has heat resistance, high elastic modulus, high dimensional stability, and low hygroscopicity, making it possible to form the insulating layer 1 without using a reinforcing material such as glass cloth. As a result, laser drilling is easy. Thus, fine and uniform through holes can be formed.
【００４２】このような多層配線基板４は、上述したよ
うな方法で製作した絶縁層１と成る前駆体シートの所望
の位置に貫通導体３を形成した後、パターン形成した例
えば銅の金属箔を、温度が100〜200℃で圧力が0.5〜10
ＭＰａの条件で10分〜１時間ホットプレスして転写し、
これらを積層して最終的に温度が150〜300℃で圧力が0.
5〜10ＭＰａの条件で30分〜24時間ホットプレスして完
全硬化させることにより製作される。In such a multilayer wiring board 4, after forming the through conductor 3 at a desired position of the precursor sheet to be the insulating layer 1 manufactured by the method described above, a patterned metal foil of, for example, copper is formed. , Temperature is 100 ~ 200 ℃ and pressure is 0.5 ~ 10
Transfer by hot pressing under the condition of MPa for 10 minutes to 1 hour,
These are laminated and finally the temperature is 150-300 ° C and the pressure is 0.
It is manufactured by hot-pressing under conditions of 5 to 10 MPa for 30 minutes to 24 hours to completely cure.
【００４３】かくして、本発明の多層配線基板４によれ
ば、絶縁層１を液晶ポリマー層５の表面にポリフェニレ
ンエーテル系有機物から成る被覆層６を有したものとし
たしたことから、高周波伝送特性に優れるとともに耐湿
性・半田耐熱性・絶縁性に優れた多層配線基板４とする
ことができる。Thus, according to the multilayer wiring board 4 of the present invention, since the insulating layer 1 has the coating layer 6 made of a polyphenylene ether-based organic material on the surface of the liquid crystal polymer layer 5, the high-frequency transmission characteristics are improved. The multilayer wiring board 4 is excellent and has excellent moisture resistance, solder heat resistance, and insulation properties.
【００４４】なお、本発明の多層配線基板４は上述の実
施例に限定されるものではなく、本発明の要旨を逸脱し
ない範囲であれば種々の変更は可能であり、例えば、上
述の実施例では４層の絶縁層１を積層することによって
多層配線基板４を製作したが、２層や３層、あるいは５
層以上の絶縁層１を積層して多層配線基板４を製作して
もよい。また、本発明の多層配線基板４の上下表面に、
１層や２層、あるいは３層以上の有機樹脂を主成分とす
る絶縁層から成るビルドアップ層やソルダーレジスト層
を形成してもよい。The multilayer wiring board 4 of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. Manufactured the multilayer wiring board 4 by laminating the four insulating layers 1;
The multilayer wiring board 4 may be manufactured by laminating more than one insulating layer 1. Further, on the upper and lower surfaces of the multilayer wiring board 4 of the present invention,
One, two, or three or more build-up layers or solder resist layers composed of an insulating layer mainly containing an organic resin may be formed.
【００４５】[0045]
【実施例】次に本発明の多層配線基板を、以下のサンプ
ルを製作して評価した。 （実施例）先ず、熱硬化性ポリフェニレンエーテル樹脂
に平均粒径が0.6μｍの球状溶融シリカをその含有量が4
0体積％となるように加え、これに溶剤としてトルエ
ン、さらに有機樹脂の硬化を促進させるための触媒を添
加し、１時間混合してワニスを調整した。次に、融点が
320℃の液晶ポリマー層の表面をプラズマ処理して厚さ
が35μｍで中心線表面粗さＲａが0.10μｍの液晶ポリマ
ー層を用意し、この液晶ポリマー層の上面に上記ワニス
をドクターブレード法により塗布し、厚さ約20μｍの乾
燥状態の熱硬化性ポリフェニレンエーテル被覆層を成形
した。そして、この液晶ポリマー層の下面にも同様にポ
リフェニレンエーテル被覆層を成形し、絶縁層となる前
駆体シートを製作した。さらに、この前駆体シートに、
ＣＯ2レーザにより直径65μｍの貫通孔を形成し、この
貫通孔に銅粉末と有機バインダを含有する導体ペースト
をスクリーン印刷により埋め込むことにより貫通導体を
形成した。Next, the multilayer wiring board of the present invention was evaluated by producing the following samples. (Example) First, a spherical fused silica having an average particle diameter of 0.6 μm was added to a thermosetting polyphenylene ether resin having a content of 4 μm.
0% by volume, toluene as a solvent and a catalyst for accelerating the curing of the organic resin were added thereto, and mixed for 1 hour to prepare a varnish. Next, the melting point
A liquid crystal polymer layer having a thickness of 35 μm and a center line surface roughness Ra of 0.10 μm is prepared by performing a plasma treatment on the surface of the liquid crystal polymer layer at 320 ° C. The varnish is applied to the upper surface of the liquid crystal polymer layer by a doctor blade method. Then, a dried thermosetting polyphenylene ether coating layer having a thickness of about 20 μm was formed. Then, a polyphenylene ether coating layer was similarly formed on the lower surface of the liquid crystal polymer layer to produce a precursor sheet to be an insulating layer. Furthermore, in this precursor sheet,
A through hole having a diameter of 65 μm was formed by a CO 2 laser, and a conductive paste containing copper powder and an organic binder was embedded in the through hole by screen printing to form a through conductor.
【００４６】次に、回路状に形成した厚さ12μｍの銅箔
が付いた転写用支持フィルムと、貫通導体が形成された
絶縁層となる前駆体シートとを位置合わせして真空積層
機により３ＭＰａの圧力で30秒加圧した後、転写用支持
フィルムを剥離して配線導体を前駆体シート上に埋設し
た。最後に、この配線導体が形成された前駆体シートを
４枚重ね合わせ、３ＭＰａの圧力下で200℃の温度で５
時間加熱処理して完全硬化させて多層配線基板を得た。Next, a transfer supporting film having a 12 μm-thick copper foil formed in a circuit shape and a precursor sheet serving as an insulating layer having a through conductor formed thereon were aligned with each other, and were subjected to 3 MPa by a vacuum laminator. Then, the transfer support film was peeled off, and the wiring conductor was embedded on the precursor sheet. Finally, four precursor sheets on which the wiring conductors are formed are superimposed, and a pressure of 3 MPa and a temperature of 200 ° C.
A heating treatment was performed for a period of time to complete the curing, thereby obtaining a multilayer wiring board.
【００４７】なお、絶縁性の評価を行うためのテスト基
板は、配線幅50μｍ、配線間隔50μｍの櫛歯状パターン
の配線導体を多層配線基板内に形成し、また、伝送特性
の評価を行うためのテスト基板は、ストリップライン構
造の配線導体を多層配線基板内部に形成した。The test board for evaluating the insulating property is used for forming a wiring conductor having a comb-tooth pattern with a wiring width of 50 μm and a wiring interval of 50 μm in a multilayer wiring board, and for evaluating the transmission characteristics. In this test board, a wiring conductor having a strip line structure was formed inside a multilayer wiring board.
【００４８】（比較例１）比較例１用として用いた多層
配線基板は、まず、表面に銅箔を熱溶融により接着した
融点が320℃の液晶ポリマー層にフォトレジストを用い
て回路状の配線導体を形成し、次に、ＣＯ2レーザによ
り直径65μｍの貫通孔を形成し、さらにこの貫通孔に銅
粉末と有機バインダを含有する導体ペーストをスクリー
ン印刷により埋め込むことにより貫通導体を形成して回
路基板を作成した後、これらの回路基板を融点が280℃
の液晶ポリマー層を間に挟んで１ＭＰａの圧力下で285
℃の温度で５分間加熱プレスすることにより製作した。(Comparative Example 1) The multilayer wiring board used for Comparative Example 1 was prepared by first forming a circuit-like wiring using a photoresist on a liquid crystal polymer layer having a melting point of 320.degree. A conductor is formed, then a through hole having a diameter of 65 μm is formed by a CO 2 laser, and a conductor paste containing copper powder and an organic binder is further embedded in the through hole by screen printing to form a through conductor. After making the boards, these circuit boards are melted at 280 ° C.
285 under a pressure of 1 MPa with a liquid crystal polymer layer of
It was manufactured by hot pressing at a temperature of 5 ° C. for 5 minutes.
【００４９】（比較例２）比較例２用として用いた多層
配線基板は、表面に銅箔をエポキシ樹脂製接着剤を介し
て接着した、融点が320℃の液晶ポリマー層を用いるこ
と以外は、比較例１用の多層配線基板と同様の方法で製
作した。(Comparative Example 2) The multilayer wiring board used for Comparative Example 2 was prepared by using a liquid crystal polymer layer having a melting point of 320 ° C. and a copper foil bonded to the surface thereof via an epoxy resin adhesive. It was manufactured in the same manner as the multilayer wiring board for Comparative Example 1.
【００５０】絶縁性の評価は、試料を温度が130℃、相
対湿度が85％の条件で、印加電圧5.5Ｖの高温バイアス
試験を行い、168時間後の配線導体間の絶縁抵抗を測定
し、試験前後の変化量を比較することにより評価した。
また、伝送特性の評価は、ストリップ構造を有する試料
を用いて、周波数が100ＭＨｚ〜40ＧＨｚの範囲で伝送
特性を測定することにより評価した。The insulation was evaluated by subjecting the sample to a high-temperature bias test at an applied voltage of 5.5 V at a temperature of 130 ° C. and a relative humidity of 85%, and measuring the insulation resistance between the wiring conductors after 168 hours. Evaluation was made by comparing the amount of change before and after the test.
The transmission characteristics were evaluated by measuring the transmission characteristics in a frequency range of 100 MHz to 40 GHz using a sample having a strip structure.
【００５１】表１に絶縁性の評価結果を、表２に伝送特
性の評価結果を示す。Table 1 shows the evaluation results of the insulating properties, and Table 2 shows the evaluation results of the transmission characteristics.
【００５２】[0052]
【表１】 [Table 1]
【００５３】[0053]
【表２】 [Table 2]
【００５４】表１からは、比較例１の多層配線基板が高
温バイアス試験後の絶縁抵抗が3.5×106Ωと小さくな
り、耐熱性に劣ることがわかった。また、表２からは、
比較例２の多層配線基板が20ＧＨｚ以上の高周波領域で
伝送特性が-1.0ｄＢ以下と劣化し、高周波伝送特性に劣
ることがわかった。From Table 1, it was found that the insulation resistance of the multilayer wiring board of Comparative Example 1 after the high-temperature bias test was as small as 3.5 × 10 6 Ω, and was inferior in heat resistance. Also, from Table 2,
It was found that the transmission characteristics of the multilayer wiring board of Comparative Example 2 were degraded to -1.0 dB or less in a high frequency region of 20 GHz or more, and were inferior to the high frequency transmission characteristics.
【００５５】それらに対して本発明の多層配線基板は、
高温バイアス試験後でも絶縁抵抗は4.3×1010Ωと大き
く、また、伝送特性も40ＧＨｚの高周波領域においても
‐0.51dＢと小さいという優れたものであった。On the other hand, the multilayer wiring board of the present invention
Even after the high-temperature bias test, the insulation resistance was as large as 4.3 × 10 10 Ω, and the transmission characteristics were as small as -0.51 dB even in the high frequency region of 40 GHz.
【００５６】[0056]
【発明の効果】本発明の多層配線基板によれば、絶縁層
を液晶ポリマー層の表面にポリフェニレンエーテル系有
機物から成る被覆層を形成して成るものとしたことか
ら、微細な貫通孔を穿設加工することが可能となり、そ
の結果、高密度な配線を有する多層配線基板とすること
ができ、また、液晶ポリマー層とポリフェニレンエーテ
ル系有機物から成る被覆層の誘電率の周波数挙動がほぼ
等しいことから、積層の際にわずかな厚みばらつきが生
じたとしても高周波領域における伝送特性の低下を生じ
ることのない高周波伝送特性に優れた多層配線基板とす
ることできる。さらに、ポリフェニレンエーテル系有機
物から成る被覆層は、液晶ポリマー層と同程度の疎水性
を示すことから、両者の樹脂同士の馴染みが良好で接着
性に優れ、また、被覆層がランダムな分子構造で比較的
熱運動しやすい分子から成ることから液晶ポリマー層表
面の微細な凹部に入り込み十分なアンカー効果を発揮す
ることができ、その結果、液晶ポリマー層と被覆層との
密着性が良好となり高温バイアス試験で絶縁不良が発生
することもない。さらにまた、液晶ポリマーが低吸湿性
であることから、半田リフロー時に水分が気化してガス
が発生することもなく、絶縁層間で剥離してしまうこと
もない。According to the multilayer wiring board of the present invention, since the insulating layer is formed by forming a coating layer made of a polyphenylene ether-based organic material on the surface of the liquid crystal polymer layer, fine through holes are formed. Processing becomes possible, and as a result, a multilayer wiring board having high-density wiring can be obtained. In addition, since the frequency behavior of the dielectric constant of the liquid crystal polymer layer and the covering layer made of polyphenylene ether-based organic material are substantially equal, Further, a multilayer wiring board having excellent high-frequency transmission characteristics without causing a decrease in transmission characteristics in a high-frequency region even if slight thickness variations occur during lamination. Furthermore, the coating layer made of a polyphenylene ether-based organic material exhibits the same degree of hydrophobicity as the liquid crystal polymer layer, so that both resins are compatible and have excellent adhesion, and the coating layer has a random molecular structure. Since it is composed of molecules that are relatively easily moved by heat, it can penetrate into fine concaves on the surface of the liquid crystal polymer layer and exhibit a sufficient anchor effect. As a result, the adhesion between the liquid crystal polymer layer and the coating layer becomes good, and high-temperature bias No insulation failure occurs in the test. Furthermore, since the liquid crystal polymer has low hygroscopicity, no gas is generated due to moisture vaporization during solder reflow, and no separation occurs between the insulating layers.
【図１】本発明の多層配線基板に半導体素子を搭載して
成る混成集積回路の実施の形態の一例を示す断面図であ
る。FIG. 1 is a cross-sectional view showing an example of an embodiment of a hybrid integrated circuit in which a semiconductor element is mounted on a multilayer wiring board of the present invention.
【図２】本発明の多層配線基板の要部断面図である。FIG. 2 is a sectional view of a main part of the multilayer wiring board of the present invention.
１・・・・・絶縁層 ２・・・・・配線導体 ３・・・・・貫通導体 ４・・・・・多層配線基板 ５・・・・・液晶ポリマー層 ６・・・・・ポリフェニレンエーテル系有機物から成る
被覆層 Ｔ・・・・・液晶ポリマー層間の距離 ｔ・・・・・配線導体の厚み ｘ・・・・・台形状の配線導体の上底側表面と液晶ポリ
マー層の間に位置する、ポリフェニレンエーテル系有機
物から成る被覆層の厚み1 ... insulating layer 2 ... wiring conductor 3 ... through conductor 4 ... multilayer wiring board 5 ... liquid crystal polymer layer 6 ... polyphenylene ether Coating layer composed of organic organic substance T · · · · · · Distance between liquid crystal polymer layers t · · · · · · thickness of wiring conductor x · · · · between the top and bottom surface of trapezoidal wiring conductor and liquid crystal polymer layer The thickness of the coating layer made of polyphenylene ether organic material
───────────────────────────────────────────────────── フロントページの続き Ｆターム(参考） 5E338 AA03 BB02 BB25 CC01 CD05 CD22 EE11 EE27 5E346 AA12 AA15 CC08 CC32 DD12 DD32 EE08 EE14 EE19 FF18 GG15 GG22 HH06 HH11 HH26 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E338 AA03 BB02 BB25 CC01 CD05 CD22 EE11 EE27 5E346 AA12 AA15 CC08 CC32 DD12 DD32 EE08 EE14 EE19 FF18 GG15 GG22 HH06 HH11 HH26
Claims (7)
１つの面に金属箔から成る配線導体が配設された複数の
絶縁層を積層して成るとともに、該絶縁層を挟んで上下
に位置する前記配線導体間を前記絶縁層に形成された貫
通導体を介して電気的に接続した多層配線基板であっ
て、前記絶縁層は、液晶ポリマー層の上下面にポリフェ
ニレンエーテル系有機物から成る被覆層を形成して成る
ことを特徴とする多層配線基板。1. An insulating material comprising a plurality of insulating layers made of an organic material and having a wiring conductor made of a metal foil disposed on at least one of upper and lower surfaces, and located above and below the insulating layer. A multilayer wiring board in which the wiring conductors are electrically connected via a through conductor formed in the insulating layer, wherein the insulating layer has a coating layer made of a polyphenylene ether-based organic material on upper and lower surfaces of a liquid crystal polymer layer. A multilayer wiring board characterized by being formed.
面粗さＲａが０．０５〜５μｍの粗面としたことを特徴
とする請求項１記載の多層配線基板。2. The multilayer wiring board according to claim 1, wherein the upper and lower surfaces of the liquid crystal polymer layer are rough surfaces having a center line surface roughness Ra of 0.05 to 5 μm.
縁粉末を含有することを特徴とする請求項１または請求
項２記載の多層配線基板。3. The multilayer wiring board according to claim 1, wherein said coating layer contains 10 to 70% by volume of an inorganic insulating powder.
熱硬化性ポリフェニレンエーテルであることを特徴とす
る請求項１乃至請求項３のいずれかに記載の多層配線基
板。4. The multilayer wiring board according to claim 1, wherein the polyphenylene ether-based organic substance is a thermosetting polyphenylene ether.
間に位置する前記被覆層の厚みが３〜３５μｍであるこ
とを特徴とする請求項１乃至請求項４のいずれかに記載
の多層配線基板。5. The multilayer wiring according to claim 1, wherein the thickness of the coating layer located between the liquid crystal polymer layer and the wiring conductor is 3 to 35 μm. substrate.
向の断面形状は、前記絶縁層側の底辺の長さが対向する
底辺の長さよりも短い台形状であり、かつ、前記絶縁層
側の底辺と側辺との成す角度が９５〜１５０°であるこ
とを特徴とする請求項１乃至請求項５のいずれかに記載
の多層配線基板。6. A cross-sectional shape in a width direction of the wiring conductor provided on the insulating layer is a trapezoid in which a length of a base on the side of the insulating layer is shorter than a length of an opposite base. The multilayer wiring board according to any one of claims 1 to 5, wherein the angle formed between the bottom side and the side of the layer is 95 to 150 °.
体の長さの短い底辺と前記液晶ポリマー層との間に位置
する前記被覆層の厚みｘ（μｍ）が、上下の前記液晶ポ
リマー層間の距離をＴ（μｍ）、前記配線導体の厚みを
ｔ（μｍ）としたときに、３μｍ≦０．５Ｔ−ｔ≦ｘ≦
０．５Ｔ≦３５μｍ（ただし、８μｍ≦Ｔ≦７０μｍ、
１μｍ≦ｔ≦３２μｍ）であることを特徴とする請求項
６記載の多層配線基板。7. A thickness x (μm) of the coating layer located between the short bottom of the wiring conductor and the liquid crystal polymer layer between the insulating layers, and a thickness x (μm) between the upper and lower liquid crystal polymer layers. When the distance is T (μm) and the thickness of the wiring conductor is t (μm), 3 μm ≦ 0.5T−t ≦ x ≦
0.5T ≦ 35 μm (however, 8 μm ≦ T ≦ 70 μm,
7. The multilayer wiring board according to claim 6, wherein 1 μm ≦ t ≦ 32 μm).
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001053834A JP2002261453A (en) | 2001-02-28 | 2001-02-28 | Multilayer interconnection board |
| US10/091,114 US6663946B2 (en) | 2001-02-28 | 2002-02-28 | Multi-layer wiring substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001053834A JP2002261453A (en) | 2001-02-28 | 2001-02-28 | Multilayer interconnection board |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006076655A Division JP2006191146A (en) | 2006-03-20 | 2006-03-20 | Method of manufacturing multilayer wiring board |
| JP2006076654A Division JP2006191145A (en) | 2006-03-20 | 2006-03-20 | Multilayer wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002261453A true JP2002261453A (en) | 2002-09-13 |
Family
ID=18914256
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001053834A Pending JP2002261453A (en) | 2001-02-28 | 2001-02-28 | Multilayer interconnection board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002261453A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003001763A (en) * | 2001-06-27 | 2003-01-08 | Kyocera Corp | Insulating film and multilayered wiring board using the same |
| JP2010219552A (en) * | 2010-06-03 | 2010-09-30 | Nippon Mektron Ltd | Method of manufacturing wiring board |
| JP2014060357A (en) * | 2012-09-19 | 2014-04-03 | Hitachi Chemical Co Ltd | Manufacturing method of connector |
| US8835768B2 (en) | 2010-11-30 | 2014-09-16 | Yamaichi Electronics Co. Ltd. | Flexible circuit board |
| CN104663007A (en) * | 2012-09-20 | 2015-05-27 | 株式会社可乐丽 | Circuit board and method for manufacturing same |
| CN112165767A (en) * | 2020-10-27 | 2021-01-01 | 惠州市特创电子科技有限公司 | Multilayer circuit board and mobile communication device |
-
2001
- 2001-02-28 JP JP2001053834A patent/JP2002261453A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003001763A (en) * | 2001-06-27 | 2003-01-08 | Kyocera Corp | Insulating film and multilayered wiring board using the same |
| JP2010219552A (en) * | 2010-06-03 | 2010-09-30 | Nippon Mektron Ltd | Method of manufacturing wiring board |
| US8835768B2 (en) | 2010-11-30 | 2014-09-16 | Yamaichi Electronics Co. Ltd. | Flexible circuit board |
| JP2014060357A (en) * | 2012-09-19 | 2014-04-03 | Hitachi Chemical Co Ltd | Manufacturing method of connector |
| CN104663007A (en) * | 2012-09-20 | 2015-05-27 | 株式会社可乐丽 | Circuit board and method for manufacturing same |
| KR20150058352A (en) * | 2012-09-20 | 2015-05-28 | 가부시키가이샤 구라레 | Circuit board and method for manufacturing same |
| JPWO2014046014A1 (en) * | 2012-09-20 | 2016-08-18 | 株式会社クラレ | Circuit board and manufacturing method thereof |
| KR102082536B1 (en) * | 2012-09-20 | 2020-02-27 | 주식회사 쿠라레 | Circuit board and method for manufacturing same |
| CN112165767A (en) * | 2020-10-27 | 2021-01-01 | 惠州市特创电子科技有限公司 | Multilayer circuit board and mobile communication device |
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