JP2002208448A - Anisotropic conductive film - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an anisotropic conductive film, having relatively wide pitch between conductive paths of which, end parts protrude from the film base board with sufficient height, enabled to tightly join with chips and a circuit board with low bonding pressure, enabled to form an electric connection with sufficiently low connection resistance with chips and terminals of the circuit board, suitable for such a mass-production that manufactures within a short time. SOLUTION: A plurality of conductive paths, insulated from each other, are made to penetrate through a film base board 2 made of resin with insulation property in the direction of the thickness of the film base board, and both end parts 3a, 3b of respective conduction paths are exposed at the front and back surfaces 2a, 2b of the film base board. Some of the conduction paths are formed so as to have a Ni layer 5 and a Cu layer 6 deposited in this sequence on both end surfaces 4a, 4b of both or one end surface of a conduction path 3 embedded inside the film base board, and one or both end parts of the conduction paths are made to protrude from one or either of the front and back surfaces of the film base board, and a solder layer 7 is formed on the Cu layer 6 of the conduction path.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は異方導電性フィルム
に関し、詳しくは、半導体素子を回路基板に実装する際
に半導体素子と回路基板間に介在させる半導体素子の実
装用コネクタとして特に好適な異方導電性フィルムに関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an anisotropic conductive film, and more particularly, to an anisotropic conductive film which is particularly suitable as a connector for mounting a semiconductor element between semiconductor elements when the semiconductor element is mounted on the circuit board. The present invention relates to a conductive film.

【０００２】[0002]

【従来の技術】異方導電性フィルムは、導電性について
異方性を示すフィルムであり、フィルムの表裏を貫通す
る方向には導電性を示すが、フィルム面が広がる方向に
は絶縁性を示すものである。従って、ウエハ状態から切
り出した裸の半導体素子（以下、チップとも称す）と外
部回路基板（以下、単に回路基板と称す）との間に異方
導電性フィルムを挿入し、これら３者を接合する、すな
わち、チップを異方導電性フィルムを介して回路基板上
に実装することで、チップと回路基板とが異方導電性フ
ィルムの導通路を介して電気的に接続された半導体装置
を得ることができる。ここで、回路基板とは、具体的に
は、例えば、チップのためのパッケージ用基板やチップ
を他のデバイスと共に実装するための一般的なプリント
回路基板などである。近年の半導体集積回路の大規模な
集積化、接続端子（電極パッド等）のファインピッチ化
に伴い、チップの実装における異方導電性フィルムの使
用は増大しつつある。2. Description of the Related Art An anisotropic conductive film is a film exhibiting anisotropy in conductivity. The film exhibits conductivity in a direction penetrating the front and back of the film, but exhibits insulation in a direction in which the film surface spreads. Things. Therefore, an anisotropic conductive film is inserted between a bare semiconductor element (hereinafter, also referred to as a chip) cut from a wafer state and an external circuit board (hereinafter, simply referred to as a circuit board), and these three members are joined. That is, to obtain a semiconductor device in which the chip and the circuit board are electrically connected to each other through the conductive path of the anisotropic conductive film by mounting the chip on the circuit board via the anisotropic conductive film. Can be. Here, the circuit board is specifically, for example, a package substrate for a chip or a general printed circuit board for mounting the chip together with other devices. With the recent large-scale integration of semiconductor integrated circuits and fine pitch of connection terminals (electrode pads and the like), the use of anisotropic conductive films in chip mounting is increasing.

【０００３】従来の異方導電性フィルムとしては、接着
性の絶縁材料からなるフィルム中に導電性微粒子を分散
させて形成したものが知られている。しかし、この従来
の異方導電性フィルムは、構造上、ファインピッチ化し
た対象物との接続が難しいという問題や、チップの電極
形状を凸状（バンプ状）にしなければならないという問
題がある。そこで、本件出願人は国際公開公報ＷＯ９８
／０７２１６で、ファインピッチかつバンプレス化に対
応し得る異方導電性フィルムを提案している。この異方
導電性フィルムは、複数の導通路が互いに絶縁されなが
ら、各々がフィルム基板を貫通し、各導通路の両端部が
絶縁性樹脂からなるフィルム基板の表裏面に露出した構
造を有している。この構造によって、上記のファインピ
ッチ化の問題およびチップの電極形状の問題を解決して
いる。[0003] As a conventional anisotropic conductive film, a film formed by dispersing conductive fine particles in a film made of an adhesive insulating material is known. However, this conventional anisotropic conductive film has a problem that it is difficult to connect to an object having a fine pitch due to its structure, and a problem that the electrode shape of the chip must be convex (bump shape). Therefore, the present applicant has filed International Publication WO98 / 98.
/ 07216 proposes an anisotropic conductive film capable of coping with fine pitch and bumpless processing. This anisotropic conductive film has a structure in which a plurality of conductive paths are insulated from each other, each penetrates the film substrate, and both ends of each conductive path are exposed on the front and back surfaces of the film substrate made of an insulating resin. ing. This structure solves the problem of fine pitch and the problem of the electrode shape of the chip.

【０００４】ところで、かかる導通路の両端部が絶縁性
樹脂からなるフィルム基板の表裏面に露出した構造の異
方導電性フィルムを用いてチップを回路基板上に実装す
る場合、異方導電性フィルムの導通路の端部（端面）が
フィルム基板の面と同一高さ、または、フィルム基板の
面よりも奥まった位置にある場合、信頼性の高い電気的
接続状態を形成するには、概ねチップを異方導電性フィ
ルムを介して回路基板に高圧力でボンディングしなけれ
ばならず、チップおよび／または回路基板にダメージが
加わることがある。そこで、比較的低圧力のボンディン
グによってチップと回路基板間に信頼性の高い電気的接
続状態が得られるように、異方導電性フィルムにおける
導通路の端部をフィルム基板の面（表面および裏面の少
なくとも一方の面）から突出させた構造の異方導電性フ
ィルムを用いることがある。すなわち、異方導電性フィ
ルム中の導通路の端部がフィルム基板の表裏面の少なく
とも一方の面よりも高く突出した構造であることで、導
通路の端面がフィルム基板の面よりも先に接続対象物の
端子（チップの電極、回路基板の回路（配線））に接触
し得、比較的低圧力のボンディングで、導通路と接続対
象物の端子間を確実に導通させることができる。When a chip is mounted on a circuit board using an anisotropic conductive film having a structure in which both ends of the conductive path are exposed on the front and back surfaces of a film substrate made of an insulating resin, the anisotropic conductive film is used. When the end (end face) of the conduction path of the above is at the same height as the surface of the film substrate or at a position deeper than the surface of the film substrate, it is generally necessary to use a chip to form a highly reliable electrical connection state. Must be bonded to the circuit board with high pressure via the anisotropic conductive film, and the chip and / or the circuit board may be damaged. Therefore, in order to obtain a highly reliable electrical connection between the chip and the circuit board by bonding at a relatively low pressure, the end of the conductive path in the anisotropic conductive film should be connected to the surface of the film substrate (the front and back surfaces). An anisotropic conductive film having a structure protruding from at least one surface) may be used. In other words, the end of the conductive path in the anisotropic conductive film has a structure protruding higher than at least one of the front and back surfaces of the film substrate, so that the end of the conductive path is connected earlier than the surface of the film substrate. It can come into contact with the terminal of the object (electrode of the chip, circuit (wiring) of the circuit board), and the conduction between the conduction path and the terminal of the object to be connected can be ensured by relatively low pressure bonding.

【０００５】一方、ボンディング（熱圧着）時にフィル
ム基板は溶融して接続対象物に接着（接合）する。よっ
て、異方導電性フィルム中の導通路の占める割合が少な
い程、異方導電性フィルム中のフィルム基板（絶縁性樹
脂）の占める割合は多くなって異方導電性フィルムがチ
ップおよび／または回路基板に強固に接着する。このた
め、異方導電性フィルム中の導通路は、接続対象物の端
子との間に良好な導通性が得られる範囲で、できるだけ
少ない存在量であることが好ましく、かかる観点から、
異方導電性フィルム中の導通路の太さ（径）を小さくし
たり、隣接する導通路間の間隔を大きくすることが行わ
れる。On the other hand, at the time of bonding (thermocompression bonding), the film substrate melts and adheres (joins) to the connection object. Therefore, as the proportion of the conductive path in the anisotropic conductive film is smaller, the proportion of the film substrate (insulating resin) in the anisotropic conductive film is larger, and the anisotropic conductive film becomes a chip and / or a circuit. Strongly adheres to the substrate. For this reason, the conductive path in the anisotropic conductive film is preferably as small as possible in the range where good conductivity is obtained between the terminal of the connection object and the terminal.
The thickness (diameter) of the conductive path in the anisotropic conductive film is reduced, or the interval between adjacent conductive paths is increased.

【０００６】[0006]

【発明が解決しようとする課題】本発明者等は導通路の
端部（端面）がフィルム基板の面と同一高さ、または、
フィルム基板の面よりも奥まった位置にある異方導電性
フィルムに対し、導通路の端部がフィルム基板の面より
も高く突出した構造にするべく、フィルム基板の面に露
出した導通路の端部（端面）にメッキによって金属を堆
積して導通路を伸長させることを試みた。なお、前記国
際公開公報ＷＯ９８／０７２１６には、導通路の端部
（端面）がフィルム基板の面と実質的に同じ高さの異方
導電性フィルムに対し、フィルム基板はエッチングされ
るが、導通路はエッチングされない選択性のエッチング
を施して、導通路の端部をフィルム基板の面から露出さ
せる方法が記載されているが、このエッチングによる方
法は、導通路はエッチングされないものの、導通路がエ
ッチング雰囲気（エッチャント）に曝されることにより
ダメージを受けて導通路の電気抵抗が上昇する等の問題
を生じやすい。これに対し、上記本発明者が行った導通
路の端部に金属を堆積して導通路を伸長させる方法で
は、このような問題を生じない。SUMMARY OF THE INVENTION The present inventors have found that the end (end face) of the conduction path is flush with the surface of the film substrate, or
The end of the conductive path exposed on the surface of the film substrate, so that the end of the conductive path protrudes higher than the surface of the film substrate for the anisotropic conductive film located deeper than the surface of the film substrate. An attempt was made to extend the conduction path by depositing metal on the portion (end face) by plating. In addition, in WO98 / 07216, the film substrate is etched with respect to an anisotropic conductive film in which an end portion (end surface) of a conduction path is substantially the same height as the surface of the film substrate. A method is described in which the passages are selectively etched so as not to be etched so that the ends of the conductive paths are exposed from the surface of the film substrate.In this etching method, the conductive paths are not etched, but the conductive paths are etched. Exposure to an atmosphere (etchant) tends to cause a problem such as an increase in electrical resistance of the conduction path due to damage. On the other hand, the above-described method of extending the conductive path by depositing metal on the end of the conductive path performed by the inventor does not cause such a problem.

【０００７】しかし、フィルム基板内に存在する導通路
の端面に良導体のＣｕをメッキで堆積して導通路を伸長
させる場合、導通路間ピッチ（以下、単にピッチとも称
す）が大きいと、Ｃｕが堆積しずらく、導通路の端部が
フィルム基板の面から十分に突出するよう導通路を伸長
させるには長時間を必要とし、効率が非常に悪く、量産
化には適さないことが分かった。ここで、「導通路間ピ
ッチ」とは、「２個の隣り合う導通路の側面（フィルム
基板と接する面）間の最短距離」を意味し、以下の記載
中の「導通路間ピッチ」もこれと同義である。However, when a good conductor Cu is deposited on the end face of the conductive path in the film substrate by plating to extend the conductive path, if the pitch between the conductive paths (hereinafter, also simply referred to as pitch) is large, Cu is reduced. It was found that it was difficult to accumulate, and it took a long time to extend the conductive path so that the end of the conductive path protruded sufficiently from the surface of the film substrate. . Here, the “pitch between conductive paths” means “the shortest distance between the side surfaces of two adjacent conductive paths (the surface in contact with the film substrate)”, and the “pitch between conductive paths” in the following description is also used. It is synonymous with this.

【０００８】一方、近時、半導体装置の性能（具体的に
は、軽薄短小化、低コスト化等）を一層向上させるため
に、異方導電性フィルムの導通路と接続対象物の端子
（チップの電極、回路基板の回路（配線））間の接続抵
抗（電気的な抵抗）の低減が望まれているが、これにつ
いては、未だ十分な対策が図られていないのが実情であ
る。On the other hand, recently, in order to further improve the performance of the semiconductor device (specifically, reduction in size, weight, and cost), the conductive path of the anisotropic conductive film and the terminal (chip) It has been desired to reduce the connection resistance (electrical resistance) between the electrodes and the circuit (wiring) of the circuit board), but in reality, sufficient measures have not yet been taken.

【０００９】本発明は、上記事情に鑑み、導通路間ピッ
チが比較的大きく、しかも、導通路の端部（端面）がフ
ィルム基板の面から十分高く突出し、低圧力のボンディ
ングでチップおよび回路基板と強固に接合し得るととも
に、チップおよび回路基板の端子と十分に低い接続抵抗
の電気的接続を形成し得る異方導電性フィルムであっ
て、特に量産化に適した異方導電性フィルムを提供する
ことを目的としている。In view of the above circumstances, the present invention has a relatively large pitch between conductive paths, and furthermore, the ends (end faces) of the conductive paths protrude sufficiently high from the surface of the film substrate. Anisotropically conductive film that can be firmly bonded to the chip and can form an electrical connection with sufficiently low connection resistance with the terminals of the chip and the circuit board, and is particularly suitable for mass production. It is intended to be.

【００１０】[0010]

【課題を解決するための手段】本発明者は、上記目的を
達成すべく研究を進めた結果、導通路の端面をＮｉメッ
キ処理し、これに続けてＣｕメッキを行うと、短時間で
フィルム基板の面からＣｕ層が十分高い高さに突出し得
ること、また、該Ｃｕ層上に更に半田層（特にＳｎ層）
を形成すれば、接続対象物の端子に導通路の端部（Ｃｕ
層）を半田層を介して接合でき、電気的にも機械的にも
極めて良好な接続構造が得られることを見出し、本発明
を完成させた。Means for Solving the Problems As a result of studying to achieve the above object, the present inventor has found that when the end face of the conduction path is plated with Ni and subsequently plated with Cu, the film can be formed in a short time. That the Cu layer can protrude to a sufficiently high height from the surface of the substrate, and further a solder layer (particularly a Sn layer)
Is formed, the end of the conduction path (Cu
The present inventors have found that the layers can be joined via a solder layer, and a very good connection structure can be obtained both electrically and mechanically, and the present invention has been completed.

【００１１】すなわち、本発明は以下の特徴を有してい
る。 （１）絶縁性樹脂からなるフィルム基板中に複数の導通
路が互いに絶縁されて該フィルム基板の厚み方向に貫通
し、各導通路の両端部が該フィルム基板の表裏面にそれ
ぞれ露出するとともに、少なくとも一部の導通路の一方
または両方の端部がフィルム基板の表裏面の一方または
両方の面から突出した異方導電性フィルムであって、当
該フィルム基板の表裏面の一方または両方の面からその
一方または両方の端部が突出した構造の導通路が、フィ
ルム基板内に存在する導通路本体の一方または両方の端
面にＮｉ層とＣｕ層がこの順にそれぞれ堆積形成されて
構成されたものであり、さらに、当該導通路のＣｕ層上
に半田層が設けられていることを特徴とする異方導電性
フィルム。 （２）当該異方導電性フィルムは、これを介して半導体
素子を回路基板に実装する、半導体素子の実装用の異方
導電性フィルムであり、複数の導通路のうちの、半導体
素子の電極および回路基板の回路と相対する位置に在る
導通路、または、該導通路を含む全ての導通路が、フィ
ルム基板内に存在する導通路本体の一方または両方の端
面にＮｉ層とＣｕ層がこの順にそれぞれ堆積形成され
て、フィルム基板の表裏面の一方または両方の面からそ
の一方または両方の端部が突出してなるものであり、さ
らに、当該導通路のＣｕ層上に半田層が設けらているこ
とを特徴とする上記（１）記載の異方導電性フィルム。 （３）Ｎｉ層とＣｕ層が無電解メッキで形成されたもの
である上記（１）または（２）記載の異方導電性フィル
ム。 （４）Ｎｉ層、Ｃｕ層および半田層が無電解メッキで形
成されたものである上記（１）または（２）記載の異方
導電性フィルム。 （５）半田層がＳｎ層である上記（１）〜（４）のいず
れかに記載の異方導電性フィルム。 （６）フィルム中の平均の導通路間ピッチが２５μｍ以
上である上記（１）〜（５）のいずれかに記載の異方導
電性フィルム。That is, the present invention has the following features. (1) A plurality of conductive paths are insulated from each other in a film substrate made of an insulating resin, penetrate in the thickness direction of the film substrate, and both ends of each conductive path are exposed on the front and back surfaces of the film substrate, respectively. One or both ends of at least some of the conductive paths are anisotropic conductive films protruding from one or both surfaces of the front and back surfaces of the film substrate, and from one or both surfaces of the front and back surfaces of the film substrate. The conductive path having a structure in which one or both ends protrude is formed by depositing a Ni layer and a Cu layer in this order on one or both end faces of the conductive path main body existing in the film substrate. An anisotropic conductive film, wherein a solder layer is provided on the Cu layer of the conductive path. (2) The anisotropic conductive film is an anisotropic conductive film for mounting a semiconductor element through which the semiconductor element is mounted on a circuit board, and includes an electrode of the semiconductor element among a plurality of conductive paths. And a conductive path located at a position opposite to the circuit of the circuit board, or all the conductive paths including the conductive path, a Ni layer and a Cu layer on one or both end faces of the conductive path main body present in the film substrate. In this order, one or both ends protrude from one or both surfaces of the front and back surfaces of the film substrate, and further, a solder layer is provided on the Cu layer of the conduction path. The anisotropic conductive film according to the above (1), wherein: (3) The anisotropic conductive film according to the above (1) or (2), wherein the Ni layer and the Cu layer are formed by electroless plating. (4) The anisotropic conductive film according to the above (1) or (2), wherein the Ni layer, the Cu layer and the solder layer are formed by electroless plating. (5) The anisotropic conductive film according to any one of (1) to (4), wherein the solder layer is a Sn layer. (6) The anisotropic conductive film according to any one of (1) to (5), wherein the average pitch between conductive paths in the film is 25 μm or more.

【００１２】[0012]

【発明の実施の形態】以下、本発明の異方導電性フィル
ムを図面を参照して説明する。図１は本発明の異方導電
性フィルムの一例の要部断面図である。本発明の異方導
電性フィルムは、当該一例の異方導電性フィルム１に示
されるように、絶縁性樹脂からなるフィルム基板２中に
複数の導通路３が互いに絶縁されてフィルム基板２の厚
み方向に貫通し、各導通路３の両端部３ａ、３ｂが該フ
ィルム基板２の表裏面２ａ、２ｂにそれぞれ露出すると
ともに、少なくとも一部の導通路３（図１では図示され
ている全ての導通路）の端部（両端部３ａ、３ｂのうち
の一方または両方）がフィルム基板の面（表裏面２ａ、
２ｂのうちの一方または両方）から突出した構造（図１
では両端部３ａ、３ｂがフィルム基板２の表裏面２ａ、
２ｂからそれぞれ突出している）であって、当該フィル
ム基板２の一方または両方の面から一方または両方の端
部が突出した構造の導通路３が、フィルム基板２内に存
在する導通路本体４の一方または両方の端面（両端面４
ａ、４ｂのうちの一方または両方）にＮｉ層５とＣｕ層
６がこの順にそれぞれ堆積形成されて構成され、かつ、
該Ｃｕ層６上にさらに半田層７が設けられてなることを
特徴としている。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an anisotropic conductive film of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a main part of an example of the anisotropic conductive film of the present invention. In the anisotropic conductive film of the present invention, as shown in the anisotropic conductive film 1 of the example, a plurality of conductive paths 3 are insulated from each other in a film substrate 2 made of an insulating resin. The end portions 3a, 3b of each conductive path 3 are exposed on the front and back surfaces 2a, 2b of the film substrate 2, respectively, and at least a part of the conductive path 3 (all conductive paths illustrated in FIG. 1). The end (one or both of both ends 3a and 3b) of the passage is connected to the surface (front and back 2a,
2b) (FIG. 1)
Then, both ends 3a and 3b are the front and back surfaces 2a of the film substrate 2,
2b), and the conductive path 3 having a structure in which one or both ends protrude from one or both surfaces of the film substrate 2 is formed of the conductive path main body 4 existing in the film substrate 2. One or both end faces (both end faces 4
a and 4b), a Ni layer 5 and a Cu layer 6 are deposited and formed in this order, respectively, and
It is characterized in that a solder layer 7 is further provided on the Cu layer 6.

【００１３】すなわち、本発明の異方導電性フィルム
は、フィルム基板２の面（表裏面２ａ、２ｂの少なくと
も一方の面）からその端部（両端部３ａ、３ｂの少なく
とも一方）を突出させる導通路３を、フィルム基板内に
存在する導通路本体４の端面（両端面４ａ、４ｂの少な
くとも一方）にＮｉ層５とＣｕ層６をこの順にそれぞれ
堆積形成して（Ｎｉ、Ｃｕをこの順に堆積して）構成し
たことが第１の特徴であり、これによって、フィルム中
の導通路間ピッチを比較的大きく設定しても、比較的短
時間でＣｕ層６を厚く形成することができ、フィルム基
板２の面（表裏面２ａ、２ｂの少なくとも一方の面）か
ら、導通路３の端部（両端部３ａ、３ｂの少なくとも一
方）を比較的短時間で十分高い高さに突出させることが
できる。That is, in the anisotropic conductive film of the present invention, a conductive film whose end (at least one of both ends 3a, 3b) protrudes from the surface of the film substrate 2 (at least one of the front and back surfaces 2a, 2b). The passage 3 is formed by depositing a Ni layer 5 and a Cu layer 6 on the end face (at least one of both end faces 4a and 4b) of the conductive path main body 4 existing in the film substrate in this order (Ni and Cu are deposited in this order). The first feature is that the Cu layer 6 can be formed thicker in a relatively short time even if the pitch between the conductive paths in the film is set relatively large. From the surface of the substrate 2 (at least one of the front and back surfaces 2a, 2b), the end of the conduction path 3 (at least one of both ends 3a, 3b) can be protruded to a sufficiently high height in a relatively short time. .

【００１４】かかる効果は、フィルム中の平均の導通路
間ピッチ（すなわち、図１中のＤ１）が２５μｍ以上の
場合に顕著に現れ、該ピッチが６０μｍ以上であればよ
り顕著であり、１００μｍ以上であればとりわけ顕著に
現れる。ここで、導通路３の端部３ａ、３ｂを十分高い
高さに突出させるとは、フィルム基板の面から導通路３
の端面３Ａ、３Ｂまでの高さ（図１中のＨ１）で、０．
１〜７μｍの範囲内、好ましくは０．１〜４μｍの範囲
内で突出させることである。This effect is remarkable when the average pitch between conductive paths in the film (that is, D1 in FIG. 1) is 25 μm or more, and is more remarkable when the pitch is 60 μm or more, and 100 μm or more. This is especially noticeable. Here, projecting the ends 3a and 3b of the conductive path 3 to a sufficiently high height means that the conductive path 3 is projected from the surface of the film substrate.
At the height (H1 in FIG. 1) up to the end faces 3A and 3B of FIG.
The protrusion is in the range of 1 to 7 μm, preferably in the range of 0.1 to 4 μm.

【００１５】本発明の異方導電性フィルムは、上記のよ
うに、導通路本体４の端面にＮｉ層５とＣｕ層６をこの
順に堆積形成して、フィルム基板の面から導通路３の端
部３ａ、３ｂを十分高い高さに突出させ、さらにその端
面３Ａ、３Ｂ（すなわち、Ｃｕ層６の表面６ａ）にさら
に半田層７を形成した点が第２の特徴である。すなわ
ち、フィルム基板の面から端部が十分高い高さに突出し
た導通路３の端面３Ａ、３Ｂ（Ｃｕ層６の表面６ａ）と
接続対象物の端子（チップの電極および／または回路基
板の回路（配線））とが半田層７の溶着によって接合さ
れるように構成している。半田層７は溶融流動して導通
路３の端面と接続対象物の端子の面間を隙間なく満た
し、この状態で固化するので、導通路と端子との間に十
分に低い接続抵抗の電気的接続が形成され、かつ、導通
路と端子とが高い接合力で接合される。In the anisotropic conductive film of the present invention, as described above, the Ni layer 5 and the Cu layer 6 are formed in this order on the end surface of the conductive path main body 4, and the end of the conductive path 3 is formed from the surface of the film substrate. The second feature is that the portions 3a and 3b are protruded to a sufficiently high height, and the solder layers 7 are further formed on the end surfaces 3A and 3B (that is, the surface 6a of the Cu layer 6). That is, the end surfaces 3A and 3B (the surface 6a of the Cu layer 6) of the conduction path 3 whose ends protrude from the surface of the film substrate to a sufficiently high height and the terminals of the connection target (the electrodes of the chip and / or the circuit of the circuit board). (Wiring)) are joined by welding of the solder layer 7. The solder layer 7 melts and flows to fill the gap between the end face of the conductive path 3 and the surface of the terminal to be connected without a gap, and solidifies in this state. A connection is formed, and the conduction path and the terminal are joined with a high joining force.

【００１６】本発明の異方導電性フィルムでは、かかる
第１および第２の特徴を有することから、これを介在さ
せてチップを回路基板に実装する際、チップおよび／ま
たは回路基板にダメージが加わるような高圧力を必要と
せず、比較的低圧力のボンディングで、導通路と接続対
象物の端子（チップの電極、回路基板の回路（配線））
とが確実に導通して、十分に低い接続抵抗で接続するこ
とができ、しかも、異方導電性フィルムとチップおよび
回路基板とが強固に接合（接着）する。特に、フィルム
中の平均の導通路間ピッチを３５μｍ以上に設定した場
合、チップおよび回路基板とより強固に接合（接着）し
たものとなる。Since the anisotropic conductive film of the present invention has the first and second features, when the chip is mounted on the circuit board with the first and second features interposed therebetween, the chip and / or the circuit board are damaged. Such high pressure is not required, and the connection path and the terminal of the object to be connected (chip electrode, circuit board circuit (wiring)) by relatively low pressure bonding
Are reliably conducted, connection can be made with a sufficiently low connection resistance, and the anisotropic conductive film and the chip and the circuit board are firmly joined (adhered). In particular, when the average pitch between the conductive paths in the film is set to 35 μm or more, the film is more firmly bonded (adhered) to the chip and the circuit board.

【００１７】上記の比較的低圧力のボンディングとは、
フィルム基板の材料、接続対象物の端子形成面の状態等
によっても異なるが、概ね０．３〜３ＭＰａ程度、好ま
しくは０．５〜２．５ＭＰａ程度の圧力で行うボンディ
ングである。また、十分に低い接続抵抗とは、概ね０．
５〜５ｍΩ程度、好ましくは０．５〜３ｍΩ程度の接続
抵抗を意味する。The relatively low pressure bonding described above is
The bonding is performed at a pressure of about 0.3 to 3 MPa, preferably about 0.5 to 2.5 MPa, although it varies depending on the material of the film substrate, the state of the terminal formation surface of the connection target, and the like. In addition, a sufficiently low connection resistance is approximately 0.1.
It means a connection resistance of about 5 to 5 mΩ, preferably about 0.5 to 3 mΩ.

【００１８】本発明の異方導電性フィルムでは、異方導
電性フィルム中の実質的に全ての導通路をその端部がフ
ィルム基板の面から突出した構造にしてもよいし、異方
導電性フィルム中の一部の導通路（例えば、異方導電性
フィルムをチップと回路基板間に所定の位置合わせでセ
ットして、その両端部がそれぞれチップの電極および回
路基板の回路（配線）と相対する位置となる導通路）
を、その端部がフィルム基板の面から突出した構造にし
てもよい。また、導通路の端部をフィルム基板の面から
突出させる場合、一方の端部をフィルム基板の表裏面の
いずれか一方の面から突出させても、両方の端部をフィ
ルム基板の表裏面からそれぞれ突出させてもよい。ま
た、両方の端部をフィルム基板の表裏面からそれぞれ突
出させる場合、突出高さをフィルム基板の表面側と裏面
側で異ならせてもよい。また、フィルム基板の同じ面側
に端部が突出する複数の導通路間の端部の突出高さは同
一でも異なっていてもよい。すなわち、これら種々の突
出の態様は、接続対象物（チップ、回路基板）におけ
る、端子（電極、回路）のサイズ、高さ、形状、端子の
配置間隔（ピッチ）、パッシベーション膜の有無等の、
端子形成面の状態に応じて、適宜設定される。なお、異
方導電性フィルムの製造のし易さ、また、チップおよび
回路基板の両方に対して、電気的にも機械的にも良好な
接続構造が得られ易い点から、異方導電性フィルム中の
全ての導通路における両端部をフィルム基板の表裏面か
らそれぞれ突出させ、全ての導通路におけるフィルム基
板の一方の面側に突出する端部を略同一の突出高さと
し、他方の面側に突出する端部を略同一の突出高さとす
る、またさらにかかる一方の面側と他方の面側の突出高
さも略同じするのが好ましい。In the anisotropically conductive film of the present invention, substantially all of the conductive paths in the anisotropically conductive film may have a structure in which the ends protrude from the surface of the film substrate. A part of the conductive path in the film (for example, an anisotropic conductive film is set between the chip and the circuit board at a predetermined position, and both ends of the conductive path are opposed to the electrodes of the chip and the circuit (wiring) of the circuit board, respectively). Path that is the position where
May have a structure in which the end protrudes from the surface of the film substrate. Also, when projecting the end of the conduction path from the surface of the film substrate, even if one end protrudes from one of the front and back surfaces of the film substrate, both ends are projected from the front and back surfaces of the film substrate. Each may be projected. Further, when projecting both ends from the front and back surfaces of the film substrate, the protrusion height may be different between the front surface side and the back surface side of the film substrate. Further, the protruding heights of the ends between the plurality of conductive paths whose ends protrude on the same surface side of the film substrate may be the same or different. In other words, these various aspects of the projection include the size, height, and shape of the terminals (electrodes, circuits), the arrangement interval (pitch) of the terminals, the presence or absence of the passivation film, and the like on the connection target (chip, circuit board).
It is set appropriately according to the state of the terminal formation surface. It should be noted that the anisotropic conductive film is easy to manufacture, and it is easy to obtain a good electrical and mechanical connection structure for both the chip and the circuit board. Both end portions of all the conductive paths inside are protruded from the front and back surfaces of the film substrate, and the end portions of all the conductive paths protruding on one surface side of the film substrate have substantially the same protruding height, and on the other surface side It is preferable that the protruding end portions have substantially the same protruding height, and that the protruding heights of the one surface side and the other surface side are also substantially the same.

【００１９】本発明の異方導電性フィルムにおける導通
路本体４とは、Ｎｉ層、Ｃｕ層の堆積を行う前の状態、
すなわち、フィルム基板内に導通路全体が存在し、導通
路の端部が単にフィルム基板の表裏面に露出している状
態にあるときの導通路であり、その端面はフィルム基板
２の面と同一面内に存在する、または、フィルム基板の
面よりも若干奥まった位置ある（図１）。該導通路本体
４の端面４ａ、４ｂがフィルム基板の面よりも若干奥ま
った位置ある場合、図１に示すように、Ｎｉ層５をその
表面がフィルム基板２の面２ａ、２ｂよりも高くなるよ
うに形成した場合、導通路３の突出した端部３ａ、３ｂ
はＮｉ層５とＣｕ層６で構成される。また、図示しない
が、Ｎｉ層５をその表面がフィルム基板２の面２ａ、２
ｂと同一面またはフィルム基板の面よりも奥まった位置
となるように形成した場合は、導通路３の突出した端部
３ａ，３ｂはＣｕ層６のみで構成される。The conductive path main body 4 in the anisotropic conductive film of the present invention is a state before the Ni layer and the Cu layer are deposited,
That is, the conductive path is a conductive path when the entire conductive path exists in the film substrate, and the end of the conductive path is simply exposed on the front and back surfaces of the film substrate. It is located in the plane or slightly back from the plane of the film substrate (FIG. 1). When the end surfaces 4a and 4b of the conduction path main body 4 are located slightly deeper than the surface of the film substrate, the surface of the Ni layer 5 is higher than the surfaces 2a and 2b of the film substrate 2 as shown in FIG. End portions 3a, 3b of the conductive path 3
Is composed of a Ni layer 5 and a Cu layer 6. Although not shown, the surface of the Ni layer 5 is
When the conductive path 3 is formed so as to be on the same surface as b or a position deeper than the surface of the film substrate, the protruding ends 3 a and 3 b of the conduction path 3 are formed only of the Cu layer 6.

【００２０】該導通路本体４を構成する材料としては、
電気伝導性の点で、銅（Ｃｕ）、金（Ａｕ）、アルミニ
ウム（Ａｌ）等が好ましく、特に好ましくは銅、金であ
る。さらに、電気伝導性とコストの点から銅がとりわけ
好ましい。また、フィルム基板中に貫通した構造の形成
のし易さから、前記銅、金、アルミニウム等の金属導線
が好ましく、特に好ましくは例えばＪＩＳ Ｃ ３１０
３に規定された銅線などのように電気を伝導すべく製造
された金属導線が好ましい。The material constituting the conductive path main body 4 includes:
In terms of electrical conductivity, copper (Cu), gold (Au), aluminum (Al), and the like are preferable, and copper and gold are particularly preferable. Furthermore, copper is particularly preferred in terms of electrical conductivity and cost. Further, from the viewpoint of easy formation of a structure penetrating into the film substrate, the metal conductor such as copper, gold, aluminum or the like is preferable, and particularly preferable is, for example, JIS C310.
Metal conductors manufactured to conduct electricity, such as the copper wires specified in 3, are preferred.

【００２１】前記のＮｉ層、Ｃｕ層の堆積を行う前の状
態（フィルム基板内に導通路全体が存在し、導通路の端
部が単にフィルム基板の表裏面に露出している状態）の
異方導電性フィルムは、従来公知の異方導電性フィルム
の製造方法によって作製される。好ましい例としては、
多数の絶縁導線を密に束ねた状態で互いに分離できない
ように固定し、各絶縁導線と角度をなす面を切断面とし
て、所望のフィルム厚さにスライスする方法が挙げられ
る。また、該方法でも次の〜の工程を有する方法が
特に好ましい。 金属導線の表面に、絶縁性樹脂からなる被覆層を１層
以上形成して絶縁導線とし、これを芯材に巻線する工
程。 上記巻線によって得られたコイルを加熱および／また
は加圧して、巻き付けられた絶縁導線の被覆層どうしを
融着および／または圧着させて一体化しコイルブロック
を形成する工程。 前記の工程で得られたコイルブロックを、巻きつけ
られた絶縁導線と角度をなして交差する平面を断面とし
て所定のフィルム厚さに切断する工程。 この方法は、絶縁導線を効率よく束ねることができ、し
かも、導通路のピッチを拡大させながらも、接続対象物
の端子への導通路の接触ムラ（端子毎に接触する導通路
の本数が変動する）を軽減できる導通路の最密な集合パ
ターンを容易に得ることができる。なお、この方法は、
国際公開公報ＷＯ９８／０７２１６「異方導電性フィル
ムおよびその製造方法」に詳しく記載されている。The state before the deposition of the Ni layer and the Cu layer (the state in which the entire conductive path exists in the film substrate and the end of the conductive path is simply exposed on the front and back surfaces of the film substrate) is different. The anisotropic conductive film is produced by a conventionally known method for producing an anisotropic conductive film. A preferred example is
There is a method in which a large number of insulated conductors are fixed in a tightly bundled state so that they cannot be separated from each other, and sliced to a desired film thickness by using a surface that forms an angle with each insulated conductor as a cut surface. In addition, a method having the following steps (1) to (3) is particularly preferable. A step of forming at least one coating layer made of an insulating resin on the surface of the metal conductive wire to form an insulated conductive wire, and winding this around a core material. A step of heating and / or pressurizing the coil obtained by the winding, and fusing and / or crimping the wound coating layers of the insulated conductor to integrate them to form a coil block. A step of cutting the coil block obtained in the above step into a predetermined film thickness with a plane intersecting at an angle with the wound insulated conducting wire as a cross section. According to this method, the insulated conducting wires can be efficiently bundled, and while the pitch of the conducting paths is increased, the contact unevenness of the conducting paths to the terminals of the connection object (the number of conducting paths that contact each terminal varies) ) Can be easily obtained. Note that this method
It is described in detail in International Publication WO98 / 07216 “Anisotropic conductive film and method for producing the same”.

【００２２】また、他の好ましい例としては、芯材に絶
縁導線を巻きつけ、加熱、場合によっては、加熱および
加圧によって、絶縁導線の絶縁性樹脂からなる被覆層
（樹脂材料）を互い接合させたものから複数のブロック
を切り出して、これらを所望の異方導電性フィルムの大
きさに併せて適宜積み重ねて互いに接合させ、この接合
物から異方導電性フィルムを得る方法が挙げられる。As another preferred example, an insulated conductor is wound around a core material, and a coating layer (resin material) made of an insulating resin of the insulated conductor is joined to each other by heating, and in some cases, heating and pressing. A method in which a plurality of blocks are cut out from the resulting material, stacked appropriately according to a desired size of the anisotropic conductive film, and bonded to each other to obtain an anisotropic conductive film from the bonded product.

【００２３】本発明の異方導電性フィルムでは、導通路
本体部４の両端面４ａ、４ｂのいずれか一方、または、
両方の端面にＮｉ層、Ｃｕ層がこの順に堆積したもので
あるが、かかるＮｉ、Ｃｕの堆積はメッキで行うのが好
ましく、無電解メッキが特に好ましい。また、Ｎｉ層５
の厚みは通常０．１〜４μｍ程度、好ましくは０．１〜
１μｍ程度である。かかる厚みにすることにより、次の
Ｃｕが効率よく堆積し、概ね０．５〜１時間の堆積時間
（メッキ時間）で、目的の導通路端部の十分高い突出高
さ、すなわち、フィルム基板の面からの突出高さが前記
の０．１〜７μｍ程度（好ましくは０．１〜４μｍ程
度）となるようにＣｕ層６を形成することができる。In the anisotropic conductive film of the present invention, either one of both end faces 4a and 4b of the conductive path main body 4 or
A Ni layer and a Cu layer are deposited on both end surfaces in this order, and it is preferable that such deposition of Ni and Cu is performed by plating, and electroless plating is particularly preferable. Also, the Ni layer 5
Is usually about 0.1 to 4 μm, preferably 0.1 to 4 μm.
It is about 1 μm. With such a thickness, the next Cu is efficiently deposited, and the deposition time (plating time) of about 0.5 to 1 hour is sufficient, and a sufficiently high protruding height of the end of the intended conductive path, that is, the film substrate The Cu layer 6 can be formed so that the protruding height from the surface is about 0.1 to 7 μm (preferably about 0.1 to 4 μm).

【００２４】Ｃｕ層６の表面６ａ、６ｂに設ける半田層
７としては、Ｓｎ、ＳｎとＰｂ、Ｓｂ、ＩｎおよびＢｉ
から選ばれる少なくとも一種の金属との合金等が好まし
いが、Ｓｎが特に好ましい。また、半田層の形成方法と
しては、スクリーン、メッキ（電解メッキ、無電解メッ
キ）等を使用できるが、Ｎｉ、Ｃｕの堆積方法と同じ堆
積方法によって形成するのが、半田層のＣｕ層への接合
性、生産効率の点で好ましい。半田層の厚みは通常０．
１〜５．０μｍ程度が好ましく、特に好ましくは０．４
〜４．０μｍ程度である。The solder layers 7 provided on the surfaces 6a and 6b of the Cu layer 6 include Sn, Sn and Pb, Sb, In and Bi.
An alloy with at least one metal selected from the group consisting of Sn and the like is preferred, and Sn is particularly preferred. As a method for forming the solder layer, a screen, plating (electrolytic plating, electroless plating), or the like can be used. However, the same deposition method as that for depositing Ni and Cu is used to form the solder layer on the Cu layer. It is preferable from the viewpoint of joining properties and production efficiency. The thickness of the solder layer is usually 0.
It is preferably about 1 to 5.0 μm, particularly preferably 0.4 μm.
About 4.0 μm.

【００２５】本発明の異方導電性フィルムにおいて、導
通路３（導通路本体部４）の太さ（外径）は特に限定は
されず、通常、５〜１００μｍ程度の範囲から、接続対
象物の端子の大きさ、端子の配置間隔（ピッチ）等に応
じて、好ましい値を決定する。例えば、チップの１つの
電極の大きさが、１００μｍ×１００μｍの場合、チッ
プの１つの電極には、１個〜２５個程度の導通路を対応
させるのが一般的である。In the anisotropic conductive film of the present invention, the thickness (outer diameter) of the conductive path 3 (conductive path main body portion 4) is not particularly limited, and is usually in the range of about 5 to 100 μm. A preferred value is determined according to the terminal size, the terminal arrangement interval (pitch), and the like. For example, when the size of one electrode of the chip is 100 μm × 100 μm, it is general that about 1 to 25 conductive paths correspond to one electrode of the chip.

【００２６】導通路の断面形状（通路方向と垂直に切断
した断面の形状）は、円形、多角形（好ましくは正多角
形）等の種々の形状が許容されるが、円形が好ましい。
また、フィルム面を見たときの導通路の配列のパターン
は、正方行列状、最密状、その他、ランダムな密集状態
であってもよいが、微細な半導体素子の電極に対応する
には最密状が好ましい。Various shapes such as a circular shape and a polygonal shape (preferably a regular polygonal shape) are acceptable as the cross-sectional shape of the conductive path (the cross-sectional shape cut perpendicularly to the direction of the passage), but a circular shape is preferable.
Further, the pattern of the arrangement of the conductive paths when the film surface is viewed may be a square matrix, a close-packed shape, or a random dense state, but is most suitable for a fine semiconductor element electrode. A dense state is preferred.

【００２７】絶縁性樹脂からなるフィルム基板２に用い
る絶縁性樹脂は、従来より異方導電性フィルムで用いら
れているものが利用できる。但し、導通路の抜け落ちを
防止でき、且つ、半導体素子及び回路基板との接合性を
高め得る点からは接着性を有する絶縁性樹脂が好まし
い。このような接着性を有する絶縁性樹脂としては、フ
ェノール系、ビフェニル系などのエポキシ樹脂、ポリエ
ステル樹脂、アクリル樹脂、ポリカルボジイミド樹脂な
どといった熱硬化性樹脂や、フェノキシ樹脂、ナイロン
６やナイロン６，６などのポリアミド樹脂、ＰＥＴ系、
ＰＢＴ系などの飽和ポリエステル樹脂、ポリアミドイミ
ド樹脂等のポリイミド樹脂などといった熱可塑性樹脂、
これらを二種以上混合してなる樹脂が挙げられる。これ
らのうち、耐熱性と低吸湿性の点から、ポリカルボジイ
ミド樹脂やポリイミド樹脂等が好ましいものとして挙げ
られる。As the insulating resin used for the film substrate 2 made of an insulating resin, those conventionally used for anisotropic conductive films can be used. However, an insulating resin having adhesiveness is preferable in that it can prevent the conductive path from falling off and can enhance the bonding property between the semiconductor element and the circuit board. Examples of the insulating resin having such adhesiveness include thermosetting resins such as phenol-based and biphenyl-based epoxy resins, polyester resins, acrylic resins, and polycarbodiimide resins; phenoxy resins; nylon 6 and nylon 6,6. Such as polyamide resin, PET,
Thermoplastic resins such as saturated polyester resins such as PBT, polyimide resins such as polyamide imide resin,
Resins obtained by mixing two or more of these are exemplified. Among these, polycarbodiimide resin and polyimide resin are preferred from the viewpoint of heat resistance and low hygroscopicity.

【００２８】フィルム基板の厚みは一般に１０〜２００
μｍ程度、好ましくは２０〜１００μｍである。厚みが
１０μｍ未満の場合、異方導電性フィルムの接着力が低
下する傾向にあり、厚みが２００μｍを越えると導通路
本体が倒れる場合がある。The thickness of the film substrate is generally from 10 to 200
It is about μm, preferably 20 to 100 μm. When the thickness is less than 10 μm, the adhesive strength of the anisotropic conductive film tends to decrease, and when the thickness exceeds 200 μm, the conductive path main body may fall.

【００２９】異方導電性フィルム全体の弾性率、線膨張
係数等が異方導電性フィルムのチップおよび回路基板と
の接合性や接合して得られる製品（半導体装置）の性能
に影響を与えるが、本発明の異方導電性フィルムにおけ
る好ましい弾性率は、フィルム面の拡張する方向での弾
性率で規定するとして、温度範囲２５〜４０℃において
１〜５ＧＰａであり、特に好ましくは１〜４ＧＰａであ
る。また、好ましい線膨張係数は温度範囲３０〜５０℃
において１０〜１５０ｐｐｍであり、特に好ましくは１
０〜８０ｐｐｍである。弾性率が上記範囲内にあれば特
に低温、低圧下でのボンディングにおいてより好ましい
結果が得られ、また、線膨張係数が上記範囲内であれ
ば、半導体装置の高温高湿度試験（例えば、８５℃、８
５％Ｒ．Ｈ．、１０００時間以上）においてより好まし
い結果が得られる。Although the elastic modulus, coefficient of linear expansion, etc. of the entire anisotropically conductive film affect the bonding properties of the anisotropically conductive film with the chip and the circuit board, and the performance of a product (semiconductor device) obtained by bonding. The preferable elastic modulus in the anisotropic conductive film of the present invention is 1 to 5 GPa in a temperature range of 25 to 40 ° C., particularly preferably 1 to 4 GPa, as defined by the elastic modulus in the direction in which the film surface expands. is there. Further, a preferable linear expansion coefficient is in a temperature range of 30 to 50 ° C.
At 10 to 150 ppm, particularly preferably 1 to
0 to 80 ppm. If the elastic modulus is within the above range, more preferable results can be obtained particularly in bonding at a low temperature and a low pressure, and when the coefficient of linear expansion is within the above range, a high temperature and high humidity test of the semiconductor device (for example, 85 ° C.) , 8
5% R. H. , 1000 hours or more).

【００３０】本発明の異方導電性フィルムを用いて回路
基板上への実装を行う半導体素子（チップ）としては、
半導体結晶層と電極とを含んで構成される一種の回路で
あって、発光素子のような単純な構造のもの、ＣＰＵ、
メモリー、種々の演算回路を集積したプロセッサ等が挙
げられる。また、チップを構成する半導体結晶（半導体
基板）はＳｉの他、ＧａＡｓ、ＧａＮなどの化合物半導
体が挙げられ、また、チップにはＧａＮ系半導体結晶を
成長させるためのサファイヤ結晶基板などの半導体結晶
を成長させ得る結晶基板を含むものも包含される。As a semiconductor element (chip) mounted on a circuit board using the anisotropic conductive film of the present invention,
A kind of circuit including a semiconductor crystal layer and an electrode, which has a simple structure such as a light emitting element, a CPU,
Examples include a memory and a processor in which various arithmetic circuits are integrated. The semiconductor crystal (semiconductor substrate) constituting the chip includes, in addition to Si, a compound semiconductor such as GaAs or GaN. The chip includes a semiconductor crystal such as a sapphire crystal substrate for growing a GaN-based semiconductor crystal. Those that include a crystal substrate that can be grown are also included.

【００３１】回路基板は特に限定されないが、例えば、
ガラスエポキシ基板、ポリイミド基板等に、Ｃｕ、Ｎ
ｉ、Ａｕ等の金属による回路（配線）を形成したもの等
が挙げられる。Although the circuit board is not particularly limited, for example,
Cu, N on glass epoxy substrate, polyimide substrate, etc.
A circuit (wiring) formed of a metal such as i or Au may be used.

【００３２】本発明の異方導電性フィルムを用いたチッ
プの回路基板上への実装（ボンディング）は、異方導電
性フィルムとチップおよび回路基板を互いに位置合わせ
して重ねこれらを加熱・加圧することにより行われる
が、かかる加熱・加圧装置としては、例えば、オートク
レーブ、フリップチップボンダー、プレス装置（所望の
加熱手段（ヒータ手段、熱風送風機等）が付加されたも
の）が使用される。加熱温度は、フィルム基板の材料
や、接続対象物（チップ、回路基板）の構成材料によっ
ても異なるが、一般に１４０〜３５０℃程度、好ましく
は１４０〜２８０℃程度である。In mounting (bonding) a chip using the anisotropic conductive film of the present invention on a circuit board, the anisotropic conductive film, the chip and the circuit board are aligned with each other, and they are heated and pressed. As such a heating / pressing device, for example, an autoclave, a flip chip bonder, and a press device (to which a desired heating means (a heater means, a hot air blower, etc.) is added) are used. The heating temperature varies depending on the material of the film substrate and the constituent material of the connection object (chip, circuit board), but is generally about 140 to 350 ° C, preferably about 140 to 280 ° C.

【００３３】また、加熱・加圧工程において、先ず導通
路の先端の半田層７が溶融しない温度で異方導電性フィ
ルムのフィルム基板（絶縁性樹脂）を軟化乃至溶融させ
てこれをチップおよび回路基板に接合させ、該フィルム
基板（絶縁性樹脂）が固化した後、半田層７が溶融する
温度まで加熱して、半田層をチップおよび回路基板に溶
融接合するようにするのが好ましい。かかる２段の加熱
を行うことで、異方導電性フィルムの導通路の端部の半
田層はフィルム基板の壁で区画された状態で溶融固化す
ることとなり、隣接する導通路が溶融固化した半田層を
介して短絡するといった不具合を確実に防止でき、より
信頼性の高い電気的接続を形成することができる。In the heating and pressurizing step, first, the film substrate (insulating resin) of the anisotropic conductive film is softened or melted at a temperature at which the solder layer 7 at the end of the conductive path does not melt, and this is melted into a chip and a circuit. After bonding to the substrate and solidifying the film substrate (insulating resin), it is preferable that the solder layer is heated to a temperature at which the solder layer 7 is melted so that the solder layer is melt-bonded to the chip and the circuit board. By performing such two-stage heating, the solder layer at the end of the conductive path of the anisotropic conductive film is melted and solidified in a state partitioned by the wall of the film substrate, and the adjacent conductive path is melted and solidified. A defect such as a short circuit through the layer can be reliably prevented, and a more reliable electrical connection can be formed.

【００３４】かかる２段の加熱を行う場合の第１段階の
加熱の温度は、フィルム基板の材料、半田層の材料等に
よっても異なるが、１４０〜２２０℃程度が好ましく、
特に好ましくは１４０〜１８０℃程度である。１４０℃
より低い場合はフィルム基板２のチップ及び回路基板へ
の接着力が十分に得られなくなる虞があり、２２０℃よ
り高い場合は半田が流動する虞がある。一方、半田層７
を溶融させる第２段階の加熱の温度は、半田が溶融する
温度であればよいが、１８３〜３５０℃が好ましく、特
に好ましくは２２０〜２８０℃である。１８３℃より低
い場合、半田層の溶融が不十分になって十分な接合強度
が得られなくなる虞があり、３５０℃より高い場合は導
通路の倒れ（傾き）が生じる虞がある。The temperature of the first stage of heating in such two-stage heating varies depending on the material of the film substrate, the material of the solder layer and the like, but is preferably about 140 to 220 ° C.
Particularly preferably, it is about 140 to 180 ° C. 140 ° C
If the temperature is lower than the above, there is a possibility that the adhesive strength of the film substrate 2 to the chip and the circuit board may not be sufficiently obtained. If the temperature is higher than 220 ° C., the solder may flow. On the other hand, the solder layer 7
The temperature of the heating in the second stage for melting the solder may be a temperature at which the solder is melted, but is preferably 183 to 350 ° C, particularly preferably 220 to 280 ° C. When the temperature is lower than 183 ° C., there is a possibility that the melting of the solder layer becomes insufficient and a sufficient bonding strength cannot be obtained.

【００３５】また、かかる２段の加熱を行う場合、異方
導電性フィルムにおけるフィルム基板（絶縁性樹脂）
が、半田の融点よりも低温（通常、１４０〜２２０℃、
好ましくは１４０〜１８０℃）で軟化乃至溶融すること
が必要であり、軟化点が１００〜２００℃の範囲にある
絶縁性樹脂が好ましい。ここでの軟化点は、熱機械分析
（ＴＭＡ）で、次の条件で測定した時の、ＴＭＡチャー
トの屈曲点の温度である。 モード：引張モード、サンプルサイズ：４ｍｍ幅、チャ
ック間距離：１０ｍｍ、引張荷重：１ｇ、昇温速度：１
０℃／分 具体的には、ポリエステル樹脂（１８０〜２２０℃）、
ポリアミド樹脂（１５０〜２１０℃）、ポリカルボジイ
ミド樹脂（１４０〜１８０℃）、フェノキシ樹脂（１３
０〜１６０℃）、エポキシ樹脂（１００〜１５０℃）等
が好ましい。When such two-stage heating is performed, the film substrate (insulating resin) in the anisotropic conductive film is used.
However, the temperature is lower than the melting point of the solder (normally, 140 to 220 ° C.,
It is necessary to soften or melt at 140 to 180 ° C), and an insulating resin having a softening point in the range of 100 to 200 ° C is preferable. The softening point here is the temperature at the inflection point of the TMA chart measured by thermomechanical analysis (TMA) under the following conditions. Mode: tensile mode, sample size: 4 mm width, distance between chucks: 10 mm, tensile load: 1 g, temperature rising rate: 1
0 ° C / min. Specifically, polyester resin (180-220 ° C),
Polyamide resin (150-210 ° C), polycarbodiimide resin (140-180 ° C), phenoxy resin (13
0 to 160 ° C), epoxy resin (100 to 150 ° C) and the like.

【００３６】[0036]

【実施例】以下、本発明の実施例を記載して本発明をよ
り具体的に説明するが、本発明はこの実施例によって限
定されるものではない。EXAMPLES Hereinafter, the present invention will be described more specifically with reference to Examples of the present invention, but the present invention is not limited to these Examples.

【００３７】実施例１ 太さ（線径）３０μｍの銅線にポリカルボジイミド樹脂
からなる被覆層を形成した絶縁導線を芯材に巻きつけ、
加熱および加圧によって、絶縁導線の被覆層を互い接合
させたものから複数のブロックを切り出して、該複数の
ブロックを所望の異方導電性フィルムの大きさに併せて
適宜積み重ねて互いに接合させ、この接合物を切断し
て、導通路の両端面がそれぞれフィルム基板の表裏面か
ら若干（０．５μｍ程度）奥まった位置にあり、フィル
ムの外形が８０ｍｍ×８０ｍｍの正方形、フィルムの厚
さ（フィルム基板の厚さ）が７０μｍ、導通路間ピッチ
（平均）が６５μｍの異方導電性フィルムを作製した。
そして、この異方導電性フィルムに下記の無電解Ｎｉメ
ッキ処理、無電解Ｃｕメッキ処理および無電解Ｓｎメッ
キ処理を順次行った。 無電解Ｎｉメッキ：奥野製薬株式会社製のメッキ液を用
い、メッキ浴温度８３℃、浸漬時間２０分行った。 無電解Ｃｕメッキ：石原薬品株式会社製のメッキ液を用
い、メッキ浴温度７０℃、浸漬時間６０分行った。 無電解Ｓｎメッキ：石原薬品株式会社製のメッキ液を用
い、メッキ浴温度６０℃、浸漬時間２０分行った。 かかるメッキ処理により図１に示す構成の異方導電性フ
ィルムが得られた。次に、この異方導電性フィルムを、
エポキシ樹脂を用いて、抱埋後、研磨を行いＳＥＭを用
いた断面観察によって導通路の突出高さ（各メッキ層の
厚さ）を測定した。その結果、銅線からなる導通路本体
４の端面４ａ、４ｂにＮｉ層５とＣｕ層６がこの順に堆
積し、導通路３の端部３ａ、３ｂがフィルム基板２の表
裏面２ａ、２ｂからそれぞれ１μｍ突出していた。な
お、Ｎｉ層５の厚みは１μｍ、Ｃｕ層６の厚みは０．５
μｍであった。また、半田層であるＳｎ層７の厚みは３
μｍであった。Example 1 An insulated conductor in which a coating layer made of a polycarbodiimide resin was formed on a copper wire having a thickness (wire diameter) of 30 μm was wound around a core material.
By heating and pressurizing, a plurality of blocks are cut out of the insulated conductive wire coating layers bonded to each other, and the plurality of blocks are appropriately stacked in accordance with a desired anisotropic conductive film size and bonded to each other, This joint is cut, and both end surfaces of the conduction path are slightly recessed (about 0.5 μm) from the front and back surfaces of the film substrate, the outer shape of the film is 80 mm × 80 mm square, and the thickness of the film (film) An anisotropic conductive film having a thickness of the substrate of 70 μm and a pitch between conductive paths (average) of 65 μm was prepared.
Then, the following electroless Ni plating, electroless Cu plating, and electroless Sn plating were sequentially performed on the anisotropic conductive film. Electroless Ni plating: Using a plating solution manufactured by Okuno Pharmaceutical Co., Ltd., plating bath temperature was 83 ° C., and immersion time was 20 minutes. Electroless Cu plating: Plating bath temperature was 70 ° C., immersion time was 60 minutes using a plating solution manufactured by Ishihara Chemical Co., Ltd. Electroless Sn plating: Using a plating solution manufactured by Ishihara Chemical Co., Ltd., plating was performed at a plating bath temperature of 60 ° C. and immersion time was 20 minutes. An anisotropic conductive film having the structure shown in FIG. 1 was obtained by such plating. Next, this anisotropic conductive film is
After embedding using an epoxy resin, polishing was performed, and the protruding height of the conduction path (thickness of each plating layer) was measured by cross-sectional observation using an SEM. As a result, the Ni layer 5 and the Cu layer 6 are deposited in this order on the end faces 4a and 4b of the conductive path main body 4 made of copper wire, and the ends 3a and 3b of the conductive path 3 are separated from the front and back surfaces 2a and 2b of the film substrate 2. Each protruded 1 μm. The thickness of the Ni layer 5 is 1 μm, and the thickness of the Cu layer 6 is 0.5
μm. The thickness of the Sn layer 7 as a solder layer is 3
μm.

【００３８】図３（ａ）、（ｂ）に示すチップ１１を用
意した。該チップ１１は、外形が８ｍｍ×８ｍｍの正方
形、厚さが３００μｍのシリコンウエハ１５に所定の回
路を形成したものであり、回路形成面には厚さ１μｍの
窒化珪素１６、その上に厚さ３μｍのポリイミド１７が
積層してある。パッド１４のサイズは１００μｍ×１０
０μｍで、パッド配列は２００μｍピッチ（パッド間の
隙間が２００μｍ）のペリフェラル配列（図３（ａ））
である。パッド１４の表面はＮｉ／Ａｕメッキ処理が施
されている。また、パッド１４の高さはチップに積層し
たポリイミドと同じ高さである（図３（ｂ））。A chip 11 shown in FIGS. 3A and 3B was prepared. The chip 11 is formed by forming a predetermined circuit on a silicon wafer 15 having a square shape of 8 mm × 8 mm and a thickness of 300 μm, a silicon nitride 16 having a thickness of 1 μm on a circuit forming surface, and a thickness of 3 μm of polyimide 17 is laminated. The size of the pad 14 is 100 μm × 10
Peripheral arrangement of 0 μm and pad arrangement of 200 μm pitch (a gap between pads is 200 μm) (FIG. 3A)
It is. The surface of the pad 14 is subjected to Ni / Au plating. The height of the pad 14 is the same as the height of the polyimide laminated on the chip (FIG. 3B).

【００３９】回路基板として、外形が４０ｍｍ×４０ｍ
ｍの正方形、厚さが２５μｍのポリイミド１２上に、厚
さ１５μｍの配線パターン１３が形成された回路基板２
０を用意した（図２（ａ）参照）。なお、配線パターン
の表面にはＮｉ／Ａｕメッキ処理が施されている。The outer shape of the circuit board is 40 mm × 40 m.
Circuit board 2 in which a 15 μm thick wiring pattern 13 is formed on a polyimide square 12 having a thickness of 25 μm and a thickness of 25 μm.
0 (see FIG. 2A). The surface of the wiring pattern is subjected to Ni / Au plating.

【００４０】回路基板２０を１５０℃の加熱したステー
ジ上に吸着させ、その後チップ１１をフリップチップボ
ンダーツールに吸着させた。チップ１１と回路基板２０
を位置合わせを行った後、異方導電性フィルム１を回路
基板２０上に配置した（図２（ａ））。The circuit board 20 was adsorbed on a heated stage at 150 ° C., and then the chip 11 was adsorbed on a flip chip bonder tool. Chip 11 and circuit board 20
After positioning, the anisotropic conductive film 1 was disposed on the circuit board 20 (FIG. 2A).

【００４１】ボンディングは、圧力０．４９ＭＰａ、温
度２８０℃で、３０秒間行い、チップ１１／異方導電性
フィルム１／回路基板２０となるように接合した（図２
（ｂ））。The bonding was performed at a pressure of 0.49 MPa and a temperature of 280 ° C. for 30 seconds, and the bonding was performed so as to be a chip 11 / anisotropic conductive film 1 / circuit board 20 (FIG. 2).
(B)).

【００４２】接合後の半導体装置における異方導電性フ
ィルムの導通路とチップの電極（パッド）間および導通
路と回路基板の配線パターン間の接続抵抗はそれぞれ
１．５ｍΩであった。次に、この半導体装置をプレッシ
ャークッカー装置内に設置し、装置内温度１２１℃、湿
度１００％に設定し、ＰＣＴ（プレッシャークッカーテ
スト）を行った。その結果、初期接続抵抗１．５ｍΩと
同様の接続抵抗を維持し、接続抵抗は殆ど変化しなかっ
た。よって、本発明の異方導電性フィルムはチップを回
路基板上に実装するための実装用コネクタとして極めて
有用なものであることがわかった。In the semiconductor device after bonding, the connection resistance between the conductive path of the anisotropic conductive film and the electrode (pad) of the chip and the connection resistance between the conductive path and the wiring pattern of the circuit board were 1.5 mΩ, respectively. Next, the semiconductor device was set in a pressure cooker, the temperature in the device was set to 121 ° C. and the humidity was set to 100%, and a PCT (pressure cooker test) was performed. As a result, the same connection resistance as the initial connection resistance of 1.5 mΩ was maintained, and the connection resistance hardly changed. Therefore, it was found that the anisotropic conductive film of the present invention was extremely useful as a mounting connector for mounting a chip on a circuit board.

【００４３】比較例１ 上記実施例１で作製した、フィルムの外形が８０ｍｍ×
８０ｍｍ、フィルムの厚さ（フィルム基板厚さ）が７０
μｍ、導通路間ピッチ（平均）が６５μｍの異方導電性
フィルムに対して、無電解Ｎｉメッキを行わず、無電解
Ｃｕメッキのみを行って、実施例１と同じ１μｍの突出
高さとなるように、導通路を伸長させたが、その作業時
間（メッキ時間）は、実施例の４倍であった。Comparative Example 1 The film produced in Example 1 had an outer shape of 80 mm ×
80 mm, film thickness (film substrate thickness) 70
An anisotropic conductive film having a pitch of 65 μm (average) between conductive paths was subjected to only electroless Cu plating without performing electroless Ni plating so as to have a protrusion height of 1 μm as in Example 1. Then, the conduction path was extended, but the working time (plating time) was four times that of the example.

【００４４】[0044]

【発明の効果】以上の説明により明らかなように、本発
明によれば、低圧力のボンディングによってチップおよ
び回路基板との間に十分に低い接続抵抗の電気的接続を
形成するとともに、チップおよび回路基板に強固に接合
し得る異方導電性フィルムを短時間で製造することがで
きる。また、該異方導電性フィルムを用いてチップを回
路基板上に実装して得られる半導体装置は十分に低い接
続抵抗の電気的接続によって互いに導通し、しかも、高
温、高湿下に置いてもこの十分に低い接続抵抗が維持さ
れる、高性能かつ高信頼性の半導体装置となる。As is apparent from the above description, according to the present invention, an electric connection having a sufficiently low connection resistance is formed between a chip and a circuit board by low-pressure bonding, and the chip and the circuit are formed. An anisotropic conductive film that can be firmly bonded to a substrate can be manufactured in a short time. Further, a semiconductor device obtained by mounting a chip on a circuit board using the anisotropic conductive film conducts with each other by an electrical connection having a sufficiently low connection resistance, and can be placed under high temperature and high humidity. A high-performance and high-reliability semiconductor device in which this sufficiently low connection resistance is maintained.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の異方導電性フィルムの一例の要部断面
図である。FIG. 1 is a sectional view of a main part of an example of an anisotropic conductive film of the present invention.

【図２】（ａ）および（ｂ）は図１の構成の異方導電性
フィルムを用いてチップを回路基板上に実装する際の工
程別断面図である。2 (a) and 2 (b) are cross-sectional views for respective steps when a chip is mounted on a circuit board using the anisotropic conductive film having the configuration of FIG.

【図３】本発明の実施例で用いたチップの平面図（ａ）
と要部断面図（ｂ）である。FIG. 3 is a plan view of a chip used in an embodiment of the present invention (a).
And FIG.

【符号の説明】[Explanation of symbols]

１ 異方導電性フィルム ２ 絶縁性樹脂からなるフィルム基板 ２ａ、２ｂ フィルム基板の面 ３ 導通路 ３ａ、３ｂ 導通路のフィルム基板の面から突出した端
部 ４ 導通路本体 ５ Ｎｉ層（Ｎｉ堆積層） ６ Ｃｕ層（Ｃｕ堆積層） ７ 半田層REFERENCE SIGNS LIST 1 anisotropic conductive film 2 film substrate 2a, 2b made of insulating resin 3a surface of film substrate 3 conductive path 3a, 3b end of conductive path protruding from film substrate surface 4 conductive path main body 5 Ni layer (Ni deposition layer) 6 Cu layer (Cu deposition layer) 7 Solder layer

Claims (6)

【特許請求の範囲】[Claims] 【請求項１】 絶縁性樹脂からなるフィルム基板中に複
数の導通路が互いに絶縁されて該フィルム基板の厚み方
向に貫通し、各導通路の両端部が該フィルム基板の表裏
面にそれぞれ露出するとともに、少なくとも一部の導通
路の一方または両方の端部がフィルム基板の表裏面の一
方または両方の面から突出した異方導電性フィルムであ
って、当該フィルム基板の表裏面の一方または両方の面
からその一方または両方の端部が突出した構造の導通路
が、フィルム基板内に存在する導通路本体の一方または
両方の端面にＮｉ層とＣｕ層がこの順にそれぞれ堆積形
成されて構成されたものであり、さらに、当該導通路の
Ｃｕ層上に半田層が設けられていることを特徴とする異
方導電性フィルム。A plurality of conductive paths are insulated from each other in a film substrate made of an insulating resin and penetrate in a thickness direction of the film substrate, and both ends of each conductive path are exposed on the front and back surfaces of the film substrate, respectively. With, one or both ends of at least some of the conductive paths is an anisotropic conductive film protruding from one or both surfaces of the front and back surfaces of the film substrate, and one or both of the front and back surfaces of the film substrate The conductive path has a structure in which one or both ends protrude from the surface, and a Ni layer and a Cu layer are formed in this order on one or both end faces of the conductive path body present in the film substrate, respectively. An anisotropic conductive film, further comprising a solder layer provided on the Cu layer of the conductive path. 【請求項２】 当該異方導電性フィルムは、これを介し
て半導体素子を回路基板に実装する、半導体素子の実装
用の異方導電性フィルムであり、複数の導通路のうち
の、半導体素子の電極および回路基板の回路と相対する
位置に在る導通路、または、該導通路を含む全ての導通
路が、フィルム基板内に存在する導通路本体の一方また
は両方の端面にＮｉ層とＣｕ層がこの順にそれぞれ堆積
形成されて、フィルム基板の表裏面の一方または両方の
面からその一方または両方の端部が突出してなるもので
あり、さらに、当該導通路のＣｕ層上に半田層が設けら
ていることを特徴とする請求項１記載の異方導電性フィ
ルム。2. The anisotropic conductive film according to claim 1, wherein the anisotropic conductive film is a semiconductor element mounted on a circuit board through which the semiconductor element is mounted. The conductive path located at a position opposite to the electrode and the circuit of the circuit board, or all the conductive paths including the conductive path are provided on one or both end faces of the conductive path main body existing in the film substrate with a Ni layer and a Cu layer. Layers are formed in this order, and one or both ends protrude from one or both surfaces of the front and back surfaces of the film substrate, and further, a solder layer is formed on the Cu layer of the conductive path. The anisotropic conductive film according to claim 1, wherein the conductive film is provided. 【請求項３】 Ｎｉ層とＣｕ層が無電解メッキで形成さ
れたものである請求項１または２記載の異方導電性フィ
ルム。3. The anisotropic conductive film according to claim 1, wherein the Ni layer and the Cu layer are formed by electroless plating. 【請求項４】 Ｎｉ層、Ｃｕ層および半田層が無電解メ
ッキで形成されたものである請求項１または２記載の異
方導電性フィルム。4. The anisotropic conductive film according to claim 1, wherein the Ni layer, the Cu layer and the solder layer are formed by electroless plating. 【請求項５】 半田層がＳｎ層である請求項１〜４のい
ずれかに記載の異方導電性フィルム。5. The anisotropic conductive film according to claim 1, wherein the solder layer is a Sn layer. 【請求項６】 フィルム中の平均の導通路間ピッチが２
５μｍ以上である請求項１〜５のいずれかに記載の異方
導電性フィルム。6. An average pitch between conductive paths in a film is 2
The anisotropic conductive film according to any one of claims 1 to 5, which has a thickness of 5 µm or more.