JP2002151845A - Method of pretreatment for plating - Google Patents
Method of pretreatment for platingInfo
- Publication number
- JP2002151845A JP2002151845A JP2000348935A JP2000348935A JP2002151845A JP 2002151845 A JP2002151845 A JP 2002151845A JP 2000348935 A JP2000348935 A JP 2000348935A JP 2000348935 A JP2000348935 A JP 2000348935A JP 2002151845 A JP2002151845 A JP 2002151845A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- polymer film
- plating
- forming
- conductive polymer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、プリント配線板の
スルーホールめっき前処理方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pre-processing method for through-hole plating of a printed wiring board.
【０００２】[0002]
【従来の技術】多層プリント配線板のスルーホール内に
電気めっきを行い金属化する際に、予めスルーホール内
を導通させる手段として、パラジウム等の触媒を使用し
て、無電解めっきを行う方法が一般的な方法として知ら
れている。しかし本方法は、ホルマリンやＥＤＴＡを使
用することから、製造上の作業者環境や廃液処理で問題
がある。そのため、新しい処理方法として、特開平４−
１８８６９６号公報及び特開平５−２８７５８２号公報
に示されているように、従来のような無電解めっきによ
らず、酸化重合により導電性高分子膜を形成する有機モ
ノマーと溶媒又は可溶化材を含む処理液、例えばピロー
ルとＮ−メチル−２−ピロリドンとの混合物を用い、ス
ルーホール内壁の絶縁物表面に導電性高分子膜を形成し
た後、電気銅めっきを行う方法が提案されている。2. Description of the Related Art A method of performing electroless plating using a catalyst such as palladium as a means for conducting in the through holes in advance when metallizing by performing electroplating in the through holes of a multilayer printed wiring board is known. It is known as a general method. However, since this method uses formalin or EDTA, there is a problem in a worker environment in manufacturing and waste liquid treatment. Therefore, a new processing method is disclosed in
As shown in JP-A-188696 and JP-A-5-287852, an organic monomer and a solvent or a solubilizing agent that form a conductive polymer film by oxidative polymerization are used instead of conventional electroless plating. A method has been proposed in which a conductive polymer film is formed on the surface of an insulator on the inner wall of a through hole using a treatment solution containing a mixture of, for example, pyrrole and N-methyl-2-pyrrolidone, followed by electrolytic copper plating.
【０００３】例えば、絶縁基板の所定個所にドリルで穴
あけし、次いで研磨、洗浄等を含む洗浄活性工程（デア
ミス工程）、さらに、銅箔表面の粗化を行うエッチング
工程、被めっき物表面の改質を行うコンディショニング
工程、重合触媒となるマンガン酸化物を形成する過マン
ガン酸処理工程、導電性高分子膜となる有機モノマーの
付与工程、酸化重合工程からなる導電化処理を経た後、
直接電気めっきを行い、絶縁基板のスルーホールを形成
する方法である。これらの工程のうち、酸化重合工程
は、マンガン酸化物を重合触媒として、酸化物質を含む
酸性溶液中において、化学反応により導電性高分子膜を
絶縁物表面に形成する工程である。For example, a hole is drilled at a predetermined position on an insulating substrate, and then a cleaning activation step (deamis step) including polishing and cleaning, an etching step for roughening the copper foil surface, and a modification of the surface of the object to be plated. After passing through a conditioning step of performing the quality, a permanganic acid treatment step of forming a manganese oxide serving as a polymerization catalyst, a step of applying an organic monomer serving as a conductive polymer film, and an oxidative polymerization step,
In this method, direct electroplating is performed to form through holes in an insulating substrate. Among these steps, the oxidative polymerization step is a step of forming a conductive polymer film on an insulator surface by a chemical reaction in an acidic solution containing an oxidizing substance using manganese oxide as a polymerization catalyst.
【０００４】[0004]
【発明が解決しようとする課題】このような工程におい
て形成される導電性高分子膜は、多層プリント配線板に
おけるスルーホール内の内層銅表面にも形成される。内
層銅表面に形成された高分子膜は、電気めっき工程で除
去されることなく、電気めっきが行われるため、電気銅
と内層銅の間に残存する。その結果、電気銅と内層銅間
の密着性が低下し、部品実装リフロー時における高温処
理において、電気銅と内層銅間で剥がれが生じるという
課題があった。本発明は、導電性高分子膜を形成して電
気めっきを行う処理において、電気銅と内層銅間の密着
性に優れた処理方法及び処理液を提供することを目的と
する。The conductive polymer film formed in such a process is also formed on the surface of an inner copper layer in a through hole in a multilayer printed wiring board. The polymer film formed on the surface of the inner layer copper is not removed in the electroplating step and is subjected to electroplating, and thus remains between the electrolytic copper and the inner layer copper. As a result, there has been a problem that the adhesion between the electrolytic copper and the inner layer copper is reduced, and peeling occurs between the electrolytic copper and the inner layer copper in high-temperature processing during component mounting reflow. An object of the present invention is to provide a processing method and a processing solution having excellent adhesion between electrolytic copper and an inner layer copper in a process of forming a conductive polymer film and performing electroplating.
【０００５】[0005]
【課題を解決するための手段】本発明は、以下のことを
特徴とする。 （１）多層プリント配線板のスルーホール内に導電性高
分子膜を形成し、直接電気めっきを行うめっき処理方法
において、導電性高分子膜を形成する前に、内層銅上に
保護膜を形成するめっき前処理方法。 （２）銅に対して吸着性を持つ物質を少なくとも１種類
以上を含有する水溶液で、スルーホール内層銅上に保護
膜を形成する（１）に記載のめっき前処理方法。The present invention is characterized by the following. (1) In a plating method in which a conductive polymer film is formed in a through hole of a multilayer printed wiring board and direct electroplating is performed, a protective film is formed on the inner copper layer before forming the conductive polymer film. Pretreatment method. (2) The plating pretreatment method according to (1), wherein a protective film is formed on the copper inside the through-hole with an aqueous solution containing at least one or more substances having an adsorptivity to copper.
【０００６】[0006]
【発明の実施の形態】本発明者は、上記目的が、導電性
高分子膜を形成する前に、スルーホール内層銅表面に保
護膜を形成することにより、達成できることを見出し
た。保護膜を形成する成分の特徴としては、銅に対して
高い吸着性を持つことが挙げられる。代表的なものとし
て、イミダゾール、ヘンゾトリアゾール、メルカプトベ
ンゾチアゾール、チアゾールが挙げられる。これら物質
の使用濃度は、０．００１〜０．１ｍｏｌ／ｌ、好まし
くは０．００５〜０．０５ｍｏｌ／ｌで良好な保護効果
が得られる。濃度が０．００１ｍｏｌ／ｌより低下する
と、十分な保護効果が得られなくなる。また、濃度を
０．１ｍｏｌ／ｌより濃くした場合、表面保護効果につ
いては問題ないが、生産活動上において経済的に好まし
くない。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present inventor has found that the above object can be achieved by forming a protective film on the surface of the copper inside the through hole before forming the conductive polymer film. A feature of the component forming the protective film is that it has a high adsorptivity to copper. Representative examples include imidazole, henzotriazole, mercaptobenzothiazole, and thiazole. A good protective effect is obtained when the concentration of these substances used is 0.001 to 0.1 mol / l, preferably 0.005 to 0.05 mol / l. If the concentration is lower than 0.001 mol / l, a sufficient protective effect cannot be obtained. When the concentration is higher than 0.1 mol / l, there is no problem in the surface protection effect, but it is not economically preferable in production activities.
【０００７】本発明を有効に達成するためには、高分子
膜形成前に予めスルーホール内の内層銅に酸化銅が形成
するのを防止し、かつ、内層銅表面に保護膜を形成する
ことが必要である。従って、導電性高分子膜を形成する
処理においては、酸化重合工程前、好ましくは、過マン
ガン酸処理工程と有機モノマーの付与工程の間での実施
が極めて有効である。In order to effectively achieve the present invention, it is necessary to prevent the formation of copper oxide on the inner layer copper in the through-hole before forming the polymer film and to form a protective film on the surface of the inner layer copper. is necessary. Therefore, in the treatment for forming the conductive polymer film, it is extremely effective to carry out the treatment before the oxidative polymerization step, preferably between the permanganic acid treatment step and the organic monomer application step.
【０００８】[0008]
【作用】内層銅表面への高分子膜の形成は、基板の処理
によって有機モノマー付与工程から酸化重合工程に持ち
込まれた有機モノマーが、浴中で２〜３重合体（オリコ
マー）へと変化し、内層銅表面に付着することが原因と
して挙げられる。In the formation of a polymer film on the surface of the inner layer copper, the organic monomer brought into the oxidative polymerization step from the step of applying the organic monomer by the treatment of the substrate is changed into a 2-3 polymer (oricomer) in the bath. As a cause of adhesion to the copper surface of the inner layer.
【０００９】本発明を適用して内層銅表面に予め保護膜
を形成した場合、酸化重合工程で内層銅表面に膜が形成
しても、酸化重合工程や電気めっき前の酸洗浄工程等の
酸性液中で保護剤と共に銅表面から脱落して除去され
る。When a protective film is previously formed on the inner copper surface by applying the present invention, even if a film is formed on the inner copper surface in the oxidative polymerization step, the protective film may be formed in an acidic polymerization step or an acid washing step before electroplating. Removed from the copper surface together with the protective agent in the solution.
【００１０】本発明を適用して酸化重合工程前に内層銅
表面の表面保護を行い、導電性高分子膜を形成し、電気
めっきを行った多層板では、本発明を適用しない場合に
比べ、電気銅と内層銅間の密着性に優れる。The present invention is applied to a multilayer board in which the surface of the inner layer copper surface is protected before the oxidation polymerization step, a conductive polymer film is formed, and electroplating is performed, as compared with a case where the present invention is not applied. Excellent adhesion between electrolytic copper and inner layer copper.
【００１１】[0011]
【実施例】２５ｃｍ×５０ｃｍの銅張積層板（６層、厚
み１．６ｍｍ）の所定位置をドリル加工により、直径
０．３、０．６、０．９、１．３、２．０ｍｍのスルー
ホールを形成した。次いで、表面研磨によりバリを除去
した後、膨潤、デスミア、粗化からなるデスミア工程に
より、スルーホール内のデスミア処理を行った基板を被
めっき材とした。EXAMPLE A predetermined position of a copper-clad laminate (6 layers, thickness 1.6 mm) of 25 cm × 50 cm was drilled to have diameters of 0.3, 0.6, 0.9, 1.3 and 2.0 mm. A through hole was formed. Next, after removing burrs by surface polishing, the substrate subjected to desmear treatment in the through holes by a desmear process including swelling, desmearing, and roughening was used as a material to be plated.
【００１２】スルーホール内への導電性高分子膜の形成
は、図１に示す工程からなる、ヘルミュラー社製のダイ
レクトメタライゼーションラインＣＳ−６５−Ｒ水平装
置を用いて行った。有機モノマーは、チオフェン誘導体
からなるブラスバーグ製のＣＡＴ−Ｖ１０を用いた。導
電性膜形成剤は、スルホン化合物からなる同社のプロダ
クトＦを用いた。The formation of the conductive polymer film in the through-hole was carried out using a direct metallization line CS-65-R horizontal device manufactured by Hermüller, comprising the steps shown in FIG. The organic monomer used was CAT-V10 manufactured by Blasberg and made of a thiophene derivative. As the conductive film forming agent, a product F of the company consisting of a sulfone compound was used.
【００１３】検討した表面保護剤は、和光純薬工業製の
ベンゾトリアゾール、メルカプトベンゾチアゾール、イ
ミダゾール、チアゾールを用いた。使用時の濃度は、
０．０５ｍｏｌ／ｌとした。また、内層銅の表面保護処
理は、過マンガン酸工程と有機モノマー付与工程の間で
行った。As the surface protective agents studied, benzotriazole, mercaptobenzothiazole, imidazole and thiazole manufactured by Wako Pure Chemical Industries, Ltd. were used. The concentration at the time of use,
0.05 mol / l. The surface protection treatment of the inner layer copper was performed between the permanganate step and the organic monomer application step.
【００１４】被めっき材への導電性処理は、予め水洗に
より脱泡した被めっき材を、水平装置の基板投入口よ
り、０．６ｍ／分の搬送速度で流し、表２に示した組成
濃度及び温度に設定した各工程を通過させて行った。処
理完了後の被めっき材は、６０℃に設定した乾燥器で１
０分間乾燥した。The conductive treatment of the material to be plated is carried out by flowing the material to be plated, which has been previously defoamed by washing with water, from the substrate inlet of the horizontal device at a transport speed of 0.6 m / min. And each process set to the temperature. The material to be plated after the treatment is completed is dried in a dryer set at 60 ° C. for 1 hour.
Dry for 0 minutes.
【００１５】この被めっき材を８ｃｍ×１２ｃｍに切断
し、荏原ユージライト製のＰＢ２４２Ｄ５０ｍｌ／ｌ、
ＰＢ２４２ＤＫ５０ｍｌ／ｌからなる脱脂浴に５分間浸
漬し、次いで１０％硫酸に１分間浸漬した後、山本鍍金
製の２０ｌ電気めっき試験浴で３０μｍ電気めっきを施
した。このときの電流密度は、２Ａ／ｄｍ2 とした。The material to be plated was cut into 8 cm × 12 cm, and Ebara Uzilite PB242D 50 ml / l,
After being immersed in a degreasing bath composed of PB242DK 50 ml / l for 5 minutes and then immersed in 10% sulfuric acid for 1 minute, 30 μm electroplating was performed in a 20-liter electroplating test bath made by Yamamoto. The current density at this time was 2 A / dm 2 .
【００１６】内層銅と電気銅の密着製の評価は、はんだ
耐熱性で行った。電気めっきを施した被めっき材は、予
め１３０℃、２時間で乾燥した。耐熱試験を実施するは
んだ浴の温度は２６０℃とし、フラックスに浸漬した被
めっき材を、はんだ浴に２０秒フロートさせた後取り出
し、自然放冷により常温まで冷却した。これを１サイク
ルとし、３サイクル実施後の電気銅と内層銅の剥がれの
状況をクロスセクションで観察した。The evaluation of the adhesion between the inner layer copper and the electrolytic copper was performed based on the solder heat resistance. The electroplated material was previously dried at 130 ° C. for 2 hours. The temperature of the solder bath for performing the heat resistance test was set to 260 ° C., and the material to be plated immersed in the flux was floated in the solder bath for 20 seconds, taken out, and cooled to room temperature by natural cooling. This was defined as one cycle, and the state of peeling of the electrolytic copper and the inner layer copper after the execution of the three cycles was observed in a cross section.
【００１７】比較例 次に、比較例として、実施例１で示した工程から、表面
保護工程を除いて同様の処理を行った。はんだ耐熱試験
後の電気銅と内層銅の剥がれの状況をクロスセクション
で観察した。Comparative Example Next, as a comparative example, the same processing as in Example 1 was performed except for the surface protection step. The state of peeling of the electrolytic copper and the inner layer copper after the solder heat resistance test was observed in a cross section.
【００１８】実施例及び比較例の電気銅と内層銅の剥が
れ観察結果を表１に示す。Table 1 shows the observation results of the peeling of the electrolytic copper and the inner layer copper of the examples and the comparative examples.
【００１９】[0019]
【表１】 [Table 1]
【００２０】表１より、表面保護工程を実施することに
より、電気銅と内層銅の密着性が向上することが明らか
となった。From Table 1, it was clarified that the adhesion between the electrolytic copper and the inner layer copper was improved by performing the surface protection step.
【００２１】[0021]
【発明の効果】以上説明したとおり、本発明により、多
層プリント配線板のスルーホール内に導電性高分子膜を
形成し、直接電気めっきを行うめっき処理方法におい
て、スルーホール内の電気銅と内層銅の密着強度を向上
させることができる。As described above, according to the present invention, in a plating method for forming a conductive polymer film in a through hole of a multilayer printed wiring board and performing electroplating directly, the present invention relates to a method of forming a conductive polymer film in a through hole and an inner layer. The adhesion strength of copper can be improved.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） // Ｈ０５Ｋ 3/28 Ｈ０５Ｋ 3/28 Ｂ (72)発明者 荻沼 薫 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館事業所内 (72)発明者 山本 弘 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館事業所内 (72)発明者 渡部 千世喜 茨城県下館市大字小川1500番地 日立化成 エレクトロニクス株式会社内 (72)発明者 酒井 武 茨城県下館市大字小川1500番地 下館産業 株式会社内 Ｆターム(参考） 4K024 AA09 AB01 BA09 BA12 BB11 BC10 DA10 GA01 5E314 AA24 FF08 FF19 GG12 5E317 AA24 BB12 CC32 CD23 CD27 GG17 5E343 AA07 BB24 BB67 GG01 5E346 AA41 CC32 FF07 FF14 HH11──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification FI FI Theme Court ゛ (Reference) // H05K 3/28 H05K 3/28 B (72) Inventor Kaoru Oginuma 1500 Ogawa Oji, Shimodate-shi, Ibaraki Pref. Hitachi Chemical Industry Co., Ltd. Shimodate Office (72) Inventor Hiroshi Yamamoto 1500 Odai Ogawa, Shimodate City, Ibaraki Prefecture Hitachi Chemical Industry Co., Ltd. Incorporated (72) Inventor Takeshi Sakai 1500 Oji, Shimodate, Ibaraki Pref. AA07 BB24 BB67 GG01 5E346 AA41 CC32 FF07 FF14 HH11
Claims (3)
電性高分子膜を形成し、直接電気めっきを行うめっき処
理方法において、導電性高分子膜を形成する前に、内層
銅上に保護膜を形成することを特徴とするめっき前処理
方法。In a plating method for forming a conductive polymer film in a through hole of a multilayer printed wiring board and directly performing electroplating, a protective film is formed on an inner copper layer before forming the conductive polymer film. A plating pre-treatment method, characterized by forming a layer.
１種類以上を含有する水溶液で、スルーホール内層銅上
に保護膜を形成することを特徴とする請求項１に記載の
めっき前処理方法。2. A pretreatment for plating according to claim 1, wherein a protective film is formed on the copper in the through-hole inner layer with an aqueous solution containing at least one or more substances having an adsorptivity to copper. Method.
トリアゾール、メルカプトベンゾチアゾール、チアゾー
ルであることを特徴とする請求項１に記載のめっき前処
理方法。3. The plating pretreatment method according to claim 1, wherein the substance according to claim 2 is imidazole, benzotriazole, mercaptobenzothiazole, or thiazole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000348935A JP2002151845A (en) | 2000-11-16 | 2000-11-16 | Method of pretreatment for plating |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000348935A JP2002151845A (en) | 2000-11-16 | 2000-11-16 | Method of pretreatment for plating |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002151845A true JP2002151845A (en) | 2002-05-24 |
Family
ID=18822422
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000348935A Pending JP2002151845A (en) | 2000-11-16 | 2000-11-16 | Method of pretreatment for plating |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002151845A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010087285A (en) * | 2008-09-30 | 2010-04-15 | Fujitsu Ltd | Method for manufacturing multilayer circuit board |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04188696A (en) * | 1990-11-19 | 1992-07-07 | Toppan Printing Co Ltd | Manufacture of printed wiring board |
| JPH05506125A (en) * | 1988-03-03 | 1993-09-02 | ブラスベルク・オーベルフレヒェンテヒニーク・ゲー・エム・ベー・ハー | Novel through-hole plated printed circuit board and its manufacturing method |
| JPH05287582A (en) * | 1992-04-13 | 1993-11-02 | Okuno Chem Ind Co Ltd | Method for directly forming electroplating layer on non-conductive material surface |
| JPH06310852A (en) * | 1993-04-23 | 1994-11-04 | Hitachi Chem Co Ltd | Manufacture of printed-wiring board |
-
2000
- 2000-11-16 JP JP2000348935A patent/JP2002151845A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05506125A (en) * | 1988-03-03 | 1993-09-02 | ブラスベルク・オーベルフレヒェンテヒニーク・ゲー・エム・ベー・ハー | Novel through-hole plated printed circuit board and its manufacturing method |
| JP2657423B2 (en) * | 1988-03-03 | 1997-09-24 | ブラスベルク・オーベルフレヒェンテヒニーク・ゲー・エム・ベー・ハー | Novel through-hole plated printed circuit board and manufacturing method thereof |
| JPH04188696A (en) * | 1990-11-19 | 1992-07-07 | Toppan Printing Co Ltd | Manufacture of printed wiring board |
| JPH05287582A (en) * | 1992-04-13 | 1993-11-02 | Okuno Chem Ind Co Ltd | Method for directly forming electroplating layer on non-conductive material surface |
| JPH06310852A (en) * | 1993-04-23 | 1994-11-04 | Hitachi Chem Co Ltd | Manufacture of printed-wiring board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010087285A (en) * | 2008-09-30 | 2010-04-15 | Fujitsu Ltd | Method for manufacturing multilayer circuit board |
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