JP2002076250A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2002076250A
JP2002076250A JP2000259227A JP2000259227A JP2002076250A JP 2002076250 A JP2002076250 A JP 2002076250A JP 2000259227 A JP2000259227 A JP 2000259227A JP 2000259227 A JP2000259227 A JP 2000259227A JP 2002076250 A JP2002076250 A JP 2002076250A
Authority
JP
Japan
Prior art keywords
semiconductor device
wiring layer
semiconductor chip
semiconductor
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000259227A
Other languages
English (en)
Inventor
Koji Furusawa
宏治 古澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2000259227A priority Critical patent/JP2002076250A/ja
Priority to US09/939,761 priority patent/US6812575B2/en
Publication of JP2002076250A publication Critical patent/JP2002076250A/ja
Pending legal-status Critical Current

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    • H01—ELECTRIC ELEMENTS
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Abstract

(57)【要約】 【課題】 １ループあたりのワイヤーの長さを短くし、
以て、自重によるワイヤーの垂れや、封止時のワイヤー
の倒れなどの不具合をなくした半導体装置を提供する。 【解決手段】 基板１上に複数の半導体チップ２、３を
積層した半導体装置において、前記半導体チップ２、３
間に、ワイヤーボンディング用のワイヤーを中継配線す
るための配線層７を設けたことを特徴とする。

Description

【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明は、半導体装置に係わ
り、特に、複数の半導体チップを積層した半導体装置に
関する。
【０００２】
【従来の技術】図７に従来の技術を示す。高密度実装技
術の一つとして、基板上に複数の半導体チップを積層実
装するスタック実装と呼ばれる技術が用いられている。
【０００３】スタック実装では、通常、基板と積層され
た半導体チップとの接続は、ワイヤーボンディングによ
り行われる。このため、上に積み重ねた半導体チップ
が、下の半導体チップのボンディングパッドに干渉しな
いように、チップサイズの大きい順に半導体チップが積
層される。
【０００４】基板上のボンディングパッドは、最下層の
半導体チップの周囲に設けられるので、チップサイズが
小さい上層の半導体チップほど、基板上のボンディング
パッドまでの距離が長くなる。このため、上層と下層の
チップサイズが異なるほど、上層の半導体チップのボン
ディングパッドと基板上のボンディングパッドとの距離
が長くなる。特に、１ループあたりのワイヤーが長くな
るとワイヤーの強度が低下し、自重によるワイヤーの垂
れや、封止時のワイヤーの倒れなどの不具合が発生し、
歩留まりが悪化するという欠点があった。
【０００５】
【発明が解決しようとする課題】本発明の目的は、上記
した従来技術の欠点を改良し、特に、１ループあたりの
ワイヤーの長さを短くし、以て、自重によるワイヤーの
垂れや、封止時のワイヤーの倒れなどの不具合をなくし
て、歩留まりを向上せしめた新規な半導体装置を提供す
ることにある。
【０００６】
【課題を解決するための手段】本発明は上記した目的を
達成するため、基本的には、以下に記載されたような技
術構成を採用するものである。
【０００７】即ち、本発明に係わる半導体装置の第１態
様は、基板上に複数の半導体チップを積層した半導体装
置において、前記半導体チップ間に、ワイヤーボンディ
ング用のワイヤーを中継配線するための配線層を設けた
ことを特徴とするものであり、叉、第２態様は、前記配
線層には、中継用のボンディングパッドが設けられてい
ることを特徴とするものであり、叉、第３態様は、前記
配線層には、少なくとも二つの中継用のボンディングパ
ッドと、前記二つの中継用のボンディングパッド間を接
続する接続配線とが設けられていることを特徴とするも
のであり、叉、第４態様は、前記配線層に設けられた二
つの中継用のボンディングパッドは、この配線層の上部
に積層された半導体チップを挟むようにして配設されて
いることを特徴とするものであり、叉、第５態様は、前
記配線層には、中継用のボンディングパッドと、この中
継用のボンディングパッドに接続し、且つ、この配線層
を貫通するビヤホールとが設けられていることを特徴と
するものであり、叉、第６態様は、前記配線層のビヤホ
ールと前記配線層の下側に設けられた半導体チップのボ
ンディングパッドとが接続されていることを特徴とする
ものであり、叉、第７態様は、前記配線層は、半導体チ
ップ上に形成した再配線層であることを特徴とするもの
である。
【０００８】
【発明の実施の形態】本発明に係わる半導体装置は、基
板上に複数の半導体チップを積層した半導体装置におい
て、前記半導体チップ間に、ワイヤーボンディング用の
ワイヤーを中継配線するための配線層を設けたことを特
徴とするものである。
【０００９】本発明は、このように構成したので、１ル
ープあたりのワイヤーの長さを短くする事ができ、その
結果、ワイヤーの強度低下を防ぐことができ、不具合の
発生を防止することが可能になった。
【００１０】
【実施例】以下に、本発明に係わる半導体装置の具体例
を図面を参照しながら詳細に説明する。
【００１１】（第１の具体例）図１は、本発明に係わる
半導体装置の第１の具体例を示す断面図であって、この
図１には、基板１上に複数の半導体チップ２、３を積層
した半導体装置において、前記半導体チップ２、３間
に、ワイヤーボンディング用のワイヤー１４ａ、１４ｂ
を中継配線するための配線層７を設けたことを特徴とす
る半導体装置が示され、又、前記配線層７には、中継用
のボンディングパッド７１ａ、７１ｂが設けられている
ことを特徴とする半導体装置が示されている。
【００１２】以下に、第１の具体例を更に詳細に説明す
る。
【００１３】第１の具体例では、樹脂を基材として銅配
線による電気回路を内蔵したプリント配線基板１上に、
集積回路を内蔵した半導体チップ２、銅箔層をポリイミ
ドで挟んだポリイミドテープ７、同じく集積回路を内蔵
した半導体チップ３の順に、それぞれ接着剤４で積層し
て実装される。
【００１４】プリント配線基板１、半導体チップ２、半
導体チップ３は、それぞれ内蔵された回路と外部回路と
の接続用として、ワイヤーボンディングが可能なボンデ
ィングパッド１１ａ〜１１ｄ、ボンディングパッド２１
ａ、２１ｂ、ボンディングパッド３１ａ、３１ｂをそれ
ぞれ有する。また、ポリイミドテープ７には、内蔵した
銅箔層により、ワイヤーボンディング用の中継パッド７
１ａ、７１ｂが設けられている。
【００１５】そして、プリント配線基板１、半導体チッ
プ２、半導体チップ３にそれぞれ内蔵された回路を電気
的に相互に接続することで、所望の動作が得られる。
【００１６】このように構成された半導体装置におい
て、プリント配線基板１と半導体チップ２は、それぞれ
ボンディングパッド１１ｂ、１１ｃとボンディングパッ
ド２１ａ、２１ｂとをワイヤー１２ａ、１２ｂとでそれ
ぞれ接続することでり、内蔵された回路が電気的に接続
される。
【００１７】プリント配線基板１と半導体チップ３も同
様に、それぞれボンディングパッド１１ａ、１１ｄとボ
ンディングパッド３１ａ、３１ｂとをワイヤー１４ａ、
１４ｂでそれぞれ接続することにより、内蔵された回路
が電気的に接続される。この場合、ワイヤー１４ａ、１
４ｂは、半導体チップ３のボンディングパッド３１ａ、
３１ｂからポリイミドテープ７の中継パッド７１ａ、７
１ｂに一旦接続し、更に、プリント配線基板１のボンデ
ィングパッド１１ａ、１１ｄへそれぞれ接続するように
配線する。
【００１８】なお、３個以上のボンディングパッドを飛
び石状に接続するワイヤーの配線はステッチングと呼ば
れ、ワイヤーボンディングにおいては、一般的な技術で
ある。
【００１９】（第２の具体例）図２は、本発明に係わる
半導体装置の第２の具体例を示す断面図であって、この
図２には、配線層７には、少なくとも二つの中継用のボ
ンディングパッド７１ａ、７１ｂと、前記二つの中継用
のボンディングパッド７１ａ、７１ｂ間を接続する接続
配線７２とが設けられていることを特徴とする半導体装
置が示され、又、前記配線層７設けられた二つの中継用
のボンディングパッド７１ａ、７１ｂは、この配線層７
の上部に積層された半導体チップ３を挟むようにして配
設されていることを特徴とする半導体装置が示されてい
る。
【００２０】以下に、第２の具体例を更に詳細に説明す
る。
【００２１】この第２の具体例は、図１の半導体装置に
おいて、ポリイミドテープ７の内層に配線７２を設ける
ことで、任意の中継パッド７１同士を電気的に接続でき
るようにしたものである。
【００２２】第２の具体例では、例えば、半導体チップ
３のボンディングパッド３１ａと、半導体チップ３を挟
んで反対側のプリント配線基板１上のボンディングパッ
ド１１ｄとを、ポリイミドテープ７の内層配線７２を通
して接続する。このように構成することで、第１の具体
例で得られる効果に加えて、プリント配線基板１と半導
体チップ３間のワイヤー配線（この場合、７３ａ、１４
ｂ）の引き回しの自由度が向上するという効果が得られ
る。
【００２３】（第３の具体例）図３、図４は、本発明に
係わる半導体装置の第３の具体例を示す断面図であっ
て、これらの図には、配線層８には、中継用のボンディ
ングパッド８１ｃ、８１ｄと、この中継用のボンディン
グパッド８１ｃ、８１ｄに接続し、且つ、この配線層８
を貫通するビヤホール８２ａ、８２ｂとが設けられてい
ることを特徴とする半導体装置が示され、又、前記配線
層８のビヤホール８２ａ、８２ｂと前記配線層８の下側
に設けられた半導体チップ２のボンディングパッド２１
ａ、２１ｂとが接続されていることを特徴とする半導体
装置が示され、又、前記配線層８は、半導体チップ２上
に形成した再配線層であることを特徴とする半導体装置
が示されている。
【００２４】以下に、第３の具体例を更に詳細に説明す
る。
【００２５】図３の具体例は、再配線技術により半導体
チップ２上に、新たにポリイミドとアルミの層を積層し
て形成した再配線層８を設け、ポリイミドテープ７の代
わりとした例である。
【００２６】この第３の具体例では、第１の具体例と同
様に、再配線層８上に中継パッド８１ａ〜８１ｄを設け
ると共に、半導体チップ２のボンディングパッド２１
ａ、２１ｂ上の再配線層８にビアホール８２ａ、８２ｂ
を設けて、ボンディングパッド２１ａ、２１ｂの配線を
それぞれ再配線層８の表面に引き出すようにし、再配線
層８上のボンディングパッド８１ｃ、８１ｄからボンデ
ィングワイヤー１２ａ、１２ｂでそれぞれプリント配線
板１上のボンディングパッド１１ｂ、２１ｃに配線する
ようにしたものである。
【００２７】再配線層８は、半導体チップ２がウェハの
状態で行うので、第１の具体例の半導体装置に比べて後
工程の組立作業が簡単になるという効果がある。
【００２８】図４は、再配線層８の内層に配線８３を設
けることで、任意の中継パッド８１ａ、８１ｂ同士を電
気的に接続できるようにした例である。
【００２９】このように構成すること、上記した効果に
加えて、プリント配線基板１と半導体チップ３間のワイ
ヤー配線の引き回しの自由度を向上させることが出来
る。
【００３０】（第４の具体例）図５、図６は、本発明の
半導体装置の第４の具体例を示す断面図である。
【００３１】図５は、半導体チップ２がセルベースＩＣ
である場合の例である。
【００３２】セルベースＩＣは、予め半導体チップ内に
メモリやゲートアレイなどの汎用的な集積回路を設けて
おき、用途に応じて回路間やボンディングパッドへの接
続を後から行うことができるセミカスタムＬＳＩであ
る。内部の集積回路とボンディングパッドとの接続には
自由度があるため、ある程度任意の位置に、未使用のボ
ンディングパッドを設けることができる。図５は、そう
した未使用のボンディングパッド２１ａ、２１ｂを中継
パッドとして使用した例であり、図１〜図４に示したも
のに比べて構造が簡易で、組立作業が簡単になるという
効果がある。
【００３３】図６は、図５の半導体装置において、半導
体チップ２の任意の未使用ボンディングパッド２１ａ、
２１ｂ同士を接続配線２２で接続した例である。この場
合も、プリント配線基板１と半導体チップ３間のワイヤ
ー配線の引き回しの自由度が向上する効果が得られる。
【００３４】
【発明の効果】本発明に係わる半導体装置は、上述のよ
うに構成したので、１ループあたりのワイヤー長さを短
くできるから、ワイヤーの強度が低下することを防ぐこ
とができ、従って、従来発生したような不具合がなくな
り、歩留まりが向上する。
【図面の簡単な説明】
【図１】本発明に係わる半導体装置の第１の具体例を示
す断面図である。
【図２】本発明に係わる半導体装置の第２の具体例を示
す断面図である。
【図３】本発明に係わる半導体装置の第３の具体例を示
す断面図である。
【図４】第２の具体例の変形例を示す断面図である。
【図５】本発明に係わる半導体装置の第４の具体例を示
す断面図である。
【図６】第４の具体例の変形例を示す断面図である。
【図７】従来例を示す断面図である。
【符号の説明】
１ プリント配線基板 ２、３ 半導体チップ ４ 接着剤 ７ ポリイミドテープ（配線層） ８ 再配線層（配線層） １１ａ〜１１ｄ プリント配線基板のボンディングパッ
ド １２ａ、１２ｂ、１４ａ、１４ｂ、７３ａ ワイヤー ２１ａ、２１ｂ、３１ａ、３１ｂ 半導体チップのボン
ディングパッド ７１ａ、７１ｂ、８１ａ、８１ｂ、８１ｃ、８１ｄ 配
線層のボンディングパッド ７２ 配線層の接続配線 ８３ 再配線層の接続配線 ８２ａ、８２ｂ 配線層のビヤホール
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０１Ｌ 23/12

Claims (7)

    【特許請求の範囲】
  1. 【請求項１】 基板上に複数の半導体チップを積層した
    半導体装置において、 前記半導体チップ間に、ワイヤーボンディング用のワイ
    ヤーを中継配線するための配線層を設けたことを特徴と
    する半導体装置。
  2. 【請求項２】 前記配線層には、中継用のボンディング
    パッドが設けられていることを特徴とする請求項１記載
    の半導体装置。
  3. 【請求項３】 前記配線層には、少なくとも二つの中継
    用のボンディングパッドと、前記二つの中継用のボンデ
    ィングパッド間を接続する接続配線とが設けられている
    ことを特徴とする請求項１記載の半導体装置。
  4. 【請求項４】 前記配線層に設けられた二つの中継用の
    ボンディングパッドは、この配線層の上部に積層された
    半導体チップを挟むようにして配設されていることを特
    徴とする請求項３記載の半導体装置。
  5. 【請求項５】 前記配線層には、中継用のボンディング
    パッドと、この中継用のボンディングパッドに接続し、
    且つ、この配線層を貫通するビヤホールとが設けられて
    いることを特徴とする請求項１乃至４のいずれかに記載
    の半導体装置。
  6. 【請求項６】 前記配線層のビヤホールと前記配線層の
    下側に設けられた半導体チップのボンディングパッドと
    が接続されていることを特徴とする請求項５記載の半導
    体装置。
  7. 【請求項７】 前記配線層は、半導体チップ上に形成し
    た再配線層であることを特徴とする請求項１乃至６のい
    ずれかに記載の半導体装置。
JP2000259227A 2000-08-29 2000-08-29 半導体装置 Pending JP2002076250A (ja)

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