JP2002029827A - Insulator porcelain composition - Google Patents

Insulator porcelain composition

Info

Publication number
JP2002029827A
JP2002029827A JP2000220869A JP2000220869A JP2002029827A JP 2002029827 A JP2002029827 A JP 2002029827A JP 2000220869 A JP2000220869 A JP 2000220869A JP 2000220869 A JP2000220869 A JP 2000220869A JP 2002029827 A JP2002029827 A JP 2002029827A
Authority
JP
Japan
Prior art keywords
ceramic
electronic component
multilayer
insulating
porcelain composition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000220869A
Other languages
Japanese (ja)
Other versions
JP3680715B2 (en
Inventor
Osamu Chikagawa
修 近川
Naoya Mori
直哉 森
Yasutaka Sugimoto
安隆 杉本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2000220869A priority Critical patent/JP3680715B2/en
Priority to GB0116582A priority patent/GB2365007B/en
Priority to US09/909,337 priority patent/US6713417B2/en
Priority to CNB011227990A priority patent/CN1197822C/en
Priority to CNB2004100434581A priority patent/CN1266062C/en
Priority to KR10-2001-0043994A priority patent/KR100434415B1/en
Publication of JP2002029827A publication Critical patent/JP2002029827A/en
Application granted granted Critical
Publication of JP3680715B2 publication Critical patent/JP3680715B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Abstract

PROBLEM TO BE SOLVED: To obtain an insulator porcelain composition which can be calcined at a law temperature of <=1,000 deg.C and can be sintered with Ag or Cu and from which a sintered body having low dielectric constant and high Q value and suitable for high frequency use can be obtained. SOLUTION: The insulator porcelain composition is prepared by mixing and calcining (A) MgAl2O4 ceramic powder and (B) glass powder containing 13 to 50 wt.% silicon oxide in terms of SiO2, 8 to 60 wt.% boron oxide in terms of B2O3, <=20 wt.% aluminum oxide in terms of Al2O3 and 10 to 55 wt.% magnesium oxide in terms of MgO.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、例えば多層回路基
板に用いられる絶縁体磁器組成物に関し、より詳細に
は、半導体素子や各種電子部品を搭載するための複合多
層回路基板に好適に用いることができ、銅や銀などの導
体材料と同時焼成可能な絶縁体磁器組成物に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating porcelain composition used for, for example, a multilayer circuit board, and more particularly to a composite ceramic circuit board for mounting semiconductor elements and various electronic components. The present invention relates to an insulator porcelain composition which can be co-fired with a conductive material such as copper or silver.

【０００２】[0002]

【従来の技術】近年、電子機器の高速化及び高周波化が
進んでいる。また、電子機器に搭載される電子部品にお
いても、高速化及び高集積化が求められており、さらに
高密度実装化が要求されている。上記のような要求に応
えるために、従来より、半導体素子や各種電子部品を搭
載するための基板として、多層回路基板が用いられてい
る。多層回路基板では、基板内に導体回路や電子部品機
能素子が内臓されており、電子機器の小型化を進めるこ
とができる。2. Description of the Related Art In recent years, the speed and frequency of electronic devices have been increasing. In addition, high speed and high integration are also required for electronic components mounted on electronic devices, and higher density mounting is also required. In order to meet the above demands, a multilayer circuit board has conventionally been used as a board for mounting semiconductor elements and various electronic components. In a multilayer circuit board, a conductor circuit and an electronic component functional element are incorporated in the board, and the size of an electronic device can be reduced.

【０００３】上記多層回路基板を構成する材料として
は、従来、アルミナが多用されている。アルミナの焼成
温度は１５００〜１６００℃と比較的高い。従って、ア
ルミナからなる多層回路基板に内蔵されている導体回路
材料としては、通常、Ｍｏ、Ｍｏ−Ｍｎ、Ｗなどの高融
点金属を用いなければならなかった。ところが、これら
の高融点金属は電気抵抗が高いという問題があった。As a material for forming the above-mentioned multilayer circuit board, alumina has been widely used. The firing temperature of alumina is relatively high at 1500 to 1600 ° C. Therefore, a high melting point metal such as Mo, Mo-Mn, W, or the like must be used as a conductor circuit material incorporated in a multilayer circuit board made of alumina. However, these refractory metals have a problem of high electric resistance.

【０００４】従って、上記高融点金属よりも電気抵抗が
低く、かつ安価な金属、例えば銅などを導体材料として
用いることが強く求められている。銅を導体材料として
用いることを可能とするために、１０００℃以下の低温
で焼成され得るガラスセラミックスや結晶化ガラスなど
を用いることが提案されている（例えば、特開平５−２
３８７７４号公報）。[0004] Therefore, there is a strong demand for using an inexpensive metal, such as copper, as a conductor material, which has a lower electric resistance than the above-mentioned refractory metal. In order to make it possible to use copper as a conductor material, it has been proposed to use glass ceramics or crystallized glass that can be fired at a low temperature of 1000 ° C. or lower (for example, Japanese Patent Application Laid-Open No. H5-25-2).
38774).

【０００５】また、Ｓｉチップなどの半導体部品との接
続を考慮して、熱膨張係数がＳｉに近いセラミックスを
多層回路基板材料として用いることも提案されている
（特開平８−３４６６８号公報）。It has also been proposed to use ceramics having a thermal expansion coefficient close to that of Si as a material for a multilayer circuit board in consideration of connection with semiconductor components such as Si chips (Japanese Patent Laid-Open No. 8-34668).

【０００６】[0006]

【発明が解決しようとする課題】しかしながら、上述し
た公知の低温焼成可能な基板材料は機械的強度が低く、
Ｑ値が低く、さらに析出結晶相の種類及び比率が焼成プ
ロセスにより影響を受け易いという問題があった。However, the above-mentioned known low-temperature sinterable substrate material has low mechanical strength,
There was a problem that the Q value was low and the kind and ratio of the precipitated crystal phase were easily affected by the firing process.

【０００７】また、特開平５−２３８７７４号公報や特
開平８−３４６６８号公報に記載の基板材料では、高い
熱膨張係数を有する高誘電率の材料との共焼結が困難で
あるという問題もあった。Further, the substrate materials described in JP-A-5-238774 and JP-A-8-34668 also have a problem that it is difficult to co-sinter with a material having a high coefficient of thermal expansion and a high dielectric constant. there were.

【０００８】本発明の目的は、上述した従来技術の欠点
を解消し、低温の焼成で得ることができ、銀や銅などの
比較的低融点の導体材料と同時に焼成でき、比誘電率が
小さく、高周波特性に優れており、さらに高熱膨張係数
を有する絶縁体磁器を提供することにある。An object of the present invention is to solve the above-mentioned drawbacks of the prior art, to obtain a low-temperature sintering material, to sinter simultaneously with a conductor material having a relatively low melting point such as silver or copper, and to reduce the relative dielectric constant. Another object of the present invention is to provide an insulator porcelain which is excellent in high frequency characteristics and has a high coefficient of thermal expansion.

【０００９】本発明の他の目的は、上記絶縁体磁器を用
いて構成されており、低温の焼成で得ることができ、比
誘電率が小さく、高周波特性に優れており、さらに高熱
膨張係数を有する高誘電率材料との共焼結により得るこ
とができる、セラミック多層基板、セラミック電子部品
及び積層セラミック電子部品を提供することにある。Another object of the present invention is to use the above-mentioned insulator porcelain, which can be obtained by firing at a low temperature, has a small relative dielectric constant, has excellent high frequency characteristics, and has a high thermal expansion coefficient. An object of the present invention is to provide a ceramic multilayer substrate, a ceramic electronic component, and a multilayer ceramic electronic component that can be obtained by co-sintering with a high dielectric constant material.

【００１０】[0010]

【課題を解決するための手段】本発明は、上記課題を解
決するためになされたものであり、本発明に係る絶縁体
磁器組成物は、（Ａ）ＭｇＡｌ2 Ｏ4 系セラミック粉末
と、（Ｂ）酸化ケイ素をＳｉＯ2 換算で１３〜５０重量
％、酸化ホウ素をＢ2 Ｏ3 換算で８〜６０重量％、酸化
アルミニウムをＡｌ2 Ｏ3 換算で０〜２０重量％、酸化
マグネシウムをＭｇＯ換算で１０〜５５重量％含むガラ
ス粉末とを混合・焼成してなることを特徴とする。Means for Solving the Problems The present invention has been made to solve the above problems, and an insulator porcelain composition according to the present invention comprises (A) a MgAl 2 O 4 ceramic powder, B) 13 to 50 wt% of silicon oxide in terms of SiO 2, 8 to 60 wt% of boron oxide in terms of B 2 O 3, 0-20 wt% aluminum oxide in terms of Al 2 O 3, magnesium oxide MgO in terms And glass powder containing 10 to 55% by weight.

【００１１】なお、上記ガラス粉末１００重量％におい
て、酸化ケイ素は、ＳｉＯ2 換算で、１３〜５０重量
％、好ましくは２０〜３０重量％を占める。酸化ケイ素
の含有量が１３重量％未満では、得られる焼結体の結晶
化度が低くなり、Ｑ値が低下する。逆に、酸化ケイ素の
含有量が５０重量％を超えると、ガラスの溶融温度が高
くなる。[0011] In the above glass powder 100 wt%, silicon oxide, in terms of SiO 2, 13 to 50 wt%, preferably accounts for 20 to 30 wt%. If the content of silicon oxide is less than 13% by weight, the crystallinity of the obtained sintered body will be low, and the Q value will be low. Conversely, when the content of silicon oxide exceeds 50% by weight, the melting temperature of the glass increases.

【００１２】また、上記ガラス粉末１００重量％におい
て、酸化ホウ素はＢ2 Ｏ3 換算で８〜６０重量％、好ま
しくは３０〜６０重量％を占める。酸化ホウ素は、主に
融剤として作用する。酸化ホウ素の含有量がＢ2 Ｏ3 換
算で８重量％未満では、溶融温度が高くなり過ぎ、逆
に、６０重量％を超えると、得られる焼結体の耐湿性が
低下する。Further, in 100% by weight of the above glass powder, boron oxide accounts for 8 to 60% by weight, preferably 30 to 60% by weight in terms of B 2 O 3 . Boron oxide mainly acts as a flux. If the content of boron oxide is less than 8% by weight in terms of B 2 O 3 , the melting temperature will be too high, and if it exceeds 60% by weight, the moisture resistance of the resulting sintered body will decrease.

【００１３】さらに、上記ガラス粉末１００重量％にお
いて、酸化アルミニウムは、Ａｌ2Ｏ3 換算で０〜２０
重量％を占める。なお、酸化アルミニウム含有量は、Ａ
ｌ2Ｏ3 換算で０重量％であってもよい。すなわち、酸
化アルミニウムは、必ずしも含まれずともよい。Further, in 100% by weight of the glass powder, aluminum oxide is 0 to 20 in terms of Al 2 O 3.
Accounts for% by weight. The aluminum oxide content is A
It may be 0% by weight in terms of l 2 O 3 . That is, aluminum oxide may not necessarily be included.

【００１４】従って、酸化アルミニウムが含まれない本
発明に係る絶縁体磁器組成物は、上記（Ａ）ＭｇＯ−Ｍ
ｇＡｌ2 Ｏ4 系セラミック粉末と、（Ｂ）酸化ケイ素を
ＳｉＯ2 換算で１３〜５０重量％、及び酸化ホウ素をＢ
2 Ｏ3 換算で３〜６０重量％の割合で酸化ケイ素及び酸
化ホウ素を含むガラス粉末とを含む絶縁体磁器組成物と
表される。Therefore, the insulator porcelain composition according to the present invention, which does not contain aluminum oxide, comprises the above (A) MgO-M
Gal 2 and O 4 based ceramic powder, the (B) 13 to 50 wt% of silicon oxide in terms of SiO 2 and boron oxide B
It is expressed as an insulating porcelain composition containing glass powder containing silicon oxide and boron oxide at a ratio of 3 to 60% by weight in terms of 2 O 3 .

【００１５】なお、上記酸化アルミニウムを含有させる
場合、含有量がＡｌ2 Ｏ3 換算で２０重量％を超える
と、緻密な焼結体が得られず、Ｑ値が小さくなる。ま
た、酸化アルミニウムを含有させる場合のその下限値に
ついては、Ａｌ2 Ｏ3 換算で０重量％を超える範囲とな
る。When the above-mentioned aluminum oxide is contained, if the content exceeds 20% by weight in terms of Al 2 O 3 , a dense sintered body cannot be obtained and the Q value becomes small. When aluminum oxide is contained, the lower limit thereof is more than 0% by weight in terms of Al 2 O 3 .

【００１６】また、前記ガラス粉末は、ＭｇＯを１０〜
５５重量％含有することが望ましい。ＭｇＯはガラス作
製時の熔融温度を下げるとともに、結晶化ガラス中の結
晶の構成成分である。特に、ＭｇＯ−Ｂ2 Ｏ3 化合物は
Ｑｆ値が数万ＧＨｚ以上を示し、高い高周波特性発現の
主要因となっている。ＭｇＯはその含有量が１０重量％
未満ではＱ値が低くなり、５５重量％を超えると結晶の
析出量が多くなり過ぎ、基板の強度が低下してしまうこ
とがある。The glass powder contains MgO in an amount of 10 to 10.
It is desirable to contain 55% by weight. MgO lowers the melting temperature during glass production and is a component of crystals in the crystallized glass. Particularly, MgO-B 2 O 3 compound Qf value represents several tens of thousands of GHz, are the main cause of the high-frequency characteristics expression. MgO content is 10% by weight
If it is less than 50%, the Q value will be low. If it exceeds 55% by weight, the amount of precipitated crystals will be too large, and the strength of the substrate may be reduced.

【００１７】本発明において、上記ガラス粉末として
は、ＢａＯ、ＳｒＯ及びＣａＯからなる群から選択した
少なくとも１種のアルカリ土類金属酸化物を、上記ガラ
ス粉末全体の２０重量％以下を占めるようにさらに含む
ものが望ましい。In the present invention, the glass powder further comprises at least one alkaline earth metal oxide selected from the group consisting of BaO, SrO and CaO so as to account for 20% by weight or less of the whole glass powder. It is desirable to include one.

【００１８】上記アルカリ土類金属酸化物は、ガラス作
製時の溶融温度を低下させる作用を有し、かつガラスの
熱膨張係数を高くするようにも作用する。上記アルカリ
土類金属酸化物の含有割合が２０重量％を超えると、Ｑ
値が低下することがある。The alkaline earth metal oxide has a function of lowering the melting temperature at the time of glass production and also has a function of increasing the thermal expansion coefficient of glass. If the content of the alkaline earth metal oxide exceeds 20% by weight, Q
The value may decrease.

【００１９】また、本発明の他の局面では、上記ガラス
粉末は、Ｌｉ2 Ｏ、Ｋ2 Ｏ及びＮａ 2 Ｏからなる群から
選択した少なくとも１種のアルカリ金属酸化物をガラス
粉末全体の１０重量％以下の割合で、さらに好ましく
は、２〜５重量％の割合で含むことが望ましい。アルカ
リ金属酸化物は、ガラス作製時の溶融温度を低下させる
作用を有する。アルカリ金属酸化物の含有割合が１０重
量％を超えると、Ｑ値が低下するおそれがある。In another aspect of the present invention, the above glass
The powder is LiTwoO, KTwoO and Na TwoFrom the group consisting of O
At least one alkali metal oxide selected from glass
More preferably 10% by weight or less of the whole powder
Is desirably contained at a ratio of 2 to 5% by weight. Arca
Limetal oxides lower the melting temperature during glass production
Has an action. Alkali metal oxide content is 10 times
If the amount exceeds%, the Q value may decrease.

【００２０】本発明において、上記絶縁体磁器組成物
は、好ましくは、酸化亜鉛をＺｎＯ換算で１５重量％以
下、より好ましくは１０重量％以下の割合で含むことが
望ましい。酸化亜鉛は、焼成温度を低下させる作用を有
する。もっとも、酸化亜鉛の含有割合がＺｎＯ換算で１
５重量％を超えると、最終的に緻密な焼結体が得られな
いことがある。In the present invention, the insulating porcelain composition preferably contains zinc oxide in a proportion of 15% by weight or less, more preferably 10% by weight or less in terms of ZnO. Zinc oxide has the effect of lowering the firing temperature. However, the content ratio of zinc oxide is 1 in terms of ZnO.
If it exceeds 5% by weight, a dense sintered body may not be finally obtained.

【００２１】なお、上記酸化亜鉛は、ガラス成分として
含有されていてもよい。本発明においては、酸化銅がＣ
ｕＯ換算で全体の３重量％以下の割合で、より好ましく
は、２重量％以下の割合で添加されていることが望まし
い。酸化銅は、焼成温度を下げる作用を有する。もっと
も、酸化銅の含有割合が３重量％を超えると、Ｑ値を低
下させることがある。Incidentally, the zinc oxide may be contained as a glass component. In the present invention, the copper oxide is C
It is desirable that it be added in a proportion of 3% by weight or less, more preferably 2% by weight or less in terms of uO. Copper oxide has the effect of lowering the firing temperature. However, when the content ratio of copper oxide exceeds 3% by weight, the Q value may be reduced.

【００２２】また、本発明においては、好ましくは、上
記セラミック粉末とガラス粉末とは、重量比で、セラミ
ック粉末：ガラス粉末＝２０：８０〜８０：２０の割合
で配合されていることが望ましく、より好ましくは、３
０：７０〜５０：５０である。上記範囲よりもセラミッ
ク粉末の配合割合が高くなると、焼結体の密度が小さく
なることがあり、上記範囲よりガラス粉末の配合割合が
高くなると、Ｑ値が小さくなることがある。In the present invention, the ceramic powder and the glass powder are preferably blended in a weight ratio of ceramic powder: glass powder = 20: 80 to 80:20. More preferably, 3
0:70 to 50:50. When the blending ratio of the ceramic powder is higher than the above range, the density of the sintered body may decrease, and when the blending ratio of the glass powder is higher than the above range, the Q value may decrease.

【００２３】なお、本発明に係る絶縁体磁器は、測定周
波数１５ＧＨｚのＱ値が７００以上を満足することが望
ましい。Ｑ値が７００以上の場合には、近年における高
周波帯の回路素子基板として用いることができる。It is desirable for the insulator porcelain according to the present invention to have a Q value of 700 or more at a measurement frequency of 15 GHz. When the Q value is 700 or more, it can be used as a recent high-frequency band circuit element substrate.

【００２４】なお、上記ガラス粉末としては、ガラス組
成物を７００〜１４００℃で仮焼したものを用いてもよ
い。本発明に係るセラミック多層基板は、本発明に係る
絶縁体磁器組成物からなる絶縁性セラミック層を含むセ
ラミック板と、該セラミック板の絶縁性セラミック層内
に形成された複数の内部電極とを備える。As the above-mentioned glass powder, one obtained by calcining a glass composition at 700 to 1400 ° C. may be used. A ceramic multilayer substrate according to the present invention includes a ceramic plate including an insulating ceramic layer made of the insulator porcelain composition according to the present invention, and a plurality of internal electrodes formed in the insulating ceramic layer of the ceramic plate. .

【００２５】本発明に係るセラミック積層基板の特定の
局面では、前記絶縁性セラミック層の少なくとも片面
に、該絶縁性セラミック層よりも誘電率が高い第２のセ
ラミック層が積層されている。In a specific aspect of the ceramic laminated substrate according to the present invention, a second ceramic layer having a higher dielectric constant than the insulating ceramic layer is laminated on at least one surface of the insulating ceramic layer.

【００２６】本発明に係るセラミック多層基板のさらに
特定の局面では、前記複数の内部電極が、前記絶縁性セ
ラミック層の少なくとも一部を介して積層されて積層コ
ンデンサが構成されている。In a further specific aspect of the ceramic multilayer substrate according to the present invention, the plurality of internal electrodes are laminated via at least a part of the insulating ceramic layer to constitute a multilayer capacitor.

【００２７】本発明の別の特定の局面では、複数の内部
電極が、前記絶縁性セラミック層の少なくとも一部を介
して積層されてコンデンサを構成しているコンデンサ用
内部電極と、互いに接続されて積層インダクタを構成し
ているコイル導体とが備えられる。In another specific aspect of the present invention, a plurality of internal electrodes are connected to a capacitor internal electrode which is laminated via at least a part of the insulating ceramic layer to constitute a capacitor, and is connected to each other. And a coil conductor constituting the laminated inductor.

【００２８】本発明のセラミック電子部品は、本発明に
係るセラミック多層基板と、該セラミック多層基板上に
実装されており、上記複数の内部電極と共に回路を構成
している少なくとも１つの電子部品とを備える。A ceramic electronic component according to the present invention includes the ceramic multilayer substrate according to the present invention and at least one electronic component mounted on the ceramic multilayer substrate and forming a circuit with the plurality of internal electrodes. Prepare.

【００２９】本発明に係るセラミック電子部品の特定の
局面では、前記電子部品素子を囲繞するように前記セラ
ミック多層基板に固定されたキャップがさらに備えられ
る。該キャップとしては、好ましくは導電性キャップが
用いられる。[0029] In a specific aspect of the ceramic electronic component according to the present invention, a cap fixed to the ceramic multilayer substrate so as to surround the electronic component element is further provided. As the cap, a conductive cap is preferably used.

【００３０】本発明に係るセラミック電子部品の特定の
局面では、前記セラミック多層基板の下面にのみ形成さ
れた複数の外部電極と、前記外部電極に電気的に接続さ
れており、かつ前記内部電極または電子部品素子に電気
的に接続された複数のスルーホール導体がさらに備えら
れる。In a specific aspect of the ceramic electronic component according to the present invention, a plurality of external electrodes formed only on the lower surface of the ceramic multilayer substrate, the external electrodes being electrically connected to the external electrodes, and the internal electrodes or A plurality of through-hole conductors electrically connected to the electronic component element are further provided.

【００３１】本発明に係る積層セラミック電子部品は、
本発明に係る絶縁体磁器組成物からなるセラミック焼結
体と、前記セラミック焼結体内に配置された複数の内部
電極と、前記セラミック焼結体の外表面に形成されてお
り、いずれかの内部電極に電気的に接続されている複数
の外部電極とを備えることを特徴とする。The multilayer ceramic electronic component according to the present invention comprises:
A ceramic sintered body made of the insulator porcelain composition according to the present invention, a plurality of internal electrodes disposed in the ceramic sintered body, and formed on an outer surface of the ceramic sintered body, And a plurality of external electrodes electrically connected to the electrodes.

【００３２】本発明に係る積層セラミック電子部品の特
定の局面では、前記複数の内部電極がセラミック層を介
して重なり合うように配置されており、それによってコ
ンデンサユニットが構成されている。In a specific aspect of the multilayer ceramic electronic component according to the present invention, the plurality of internal electrodes are arranged so as to overlap with each other via a ceramic layer, thereby constituting a capacitor unit.

【００３３】本発明に係る積層セラミック電子部品のさ
らに特定の局面では、前記複数の内部電極が、前記コン
デンサユニットを構成している内部電極に加えて、互い
に接続されて積層インダクタユニットを構成している複
数のコイル導体を有する。In a further specific aspect of the multilayer ceramic electronic component according to the present invention, the plurality of internal electrodes are connected to each other in addition to the internal electrodes forming the capacitor unit to form a multilayer inductor unit. Having a plurality of coil conductors.

【００３４】[0034]

【発明の実施の形態】以下、先ず、本発明に係る絶縁体
磁器についての具体的な実施例を説明し、さらに、本発
明に係るセラミック多層基板、セラミック電子部品及び
積層セラミック電子部品の構造的な実施例を説明するこ
とにより、本発明を明らかにする。BEST MODE FOR CARRYING OUT THE INVENTION First, a concrete example of an insulator porcelain according to the present invention will be described, and furthermore, the structural characteristics of a ceramic multilayer substrate, a ceramic electronic component and a multilayer ceramic electronic component according to the present invention will be described. The present invention will be clarified by describing specific examples.

【００３５】原料粉末としてＭｇ（ＯＨ）2 粉末と、Ａ
ｌ2 Ｏ3 粉末とを用い、最終的に得られる焼結体が化学
量論比組成でＭｇＡｌ2 Ｏ4 となるように上記両粉末を
秤量し、１６時間湿式混合した後、乾燥した。乾燥され
た混合物を１３５０℃で２時間仮焼した後粉砕した。Mg (OH) 2 powder as raw material powder, A
Using l 2 O 3 powder, both powders were weighed so that the finally obtained sintered body was MgAl 2 O 4 in stoichiometric composition, wet-mixed for 16 hours, and then dried. The dried mixture was calcined at 1350 ° C. for 2 hours and then ground.

【００３６】次に、下記の表２に示すように、上記のよ
うにして仮焼された原料２０〜８０重量％と、下記の表
１に示す組成のガラス粉末（焼結助剤）と、ＺｎＯ及び
ＣｕＯを下記の表２に示すように適宜の割合で配合し、
適量のバインダを加えて造粒した。造粒された試料番号
１〜５２の各混合物を、２００ＭＰａの圧力の下で成形
し、直径１２ｍｍ×厚さ７ｍｍの円柱状成形体を得た。Next, as shown in Table 2 below, 20 to 80% by weight of the raw material calcined as described above, a glass powder (sintering aid) having a composition shown in Table 1 below, ZnO and CuO are mixed at an appropriate ratio as shown in Table 2 below,
An appropriate amount of binder was added and granulated. Each mixture of the granulated sample numbers 1 to 52 was molded under a pressure of 200 MPa to obtain a columnar molded body having a diameter of 12 mm and a thickness of 7 mm.

【００３７】上記成形体を大気中で９００〜１０００℃
の温度で２時間焼成し、表２及び表３の試料番号１〜４
６の円柱状の各絶縁体磁器を得た。上記のようにして得
た各円柱状絶縁体磁器を用い、両端短絡型誘電体共振法
により共振周波数（１５ＧＨｚ）における比誘電率
εr 、及びＱ値を測定した。結果を下記の表２，表３に
示す。The above-mentioned molded body is heated in the air at 900 to 1000 ° C.
And baked for 2 hours at a temperature of Sample Nos. 1-4 in Tables 2 and 3.
6 were obtained. Using each of the columnar insulator porcelains obtained as described above, the relative permittivity ε r and the Q value at a resonance frequency (15 GHz) were measured by a double-ended short-circuit type dielectric resonance method. The results are shown in Tables 2 and 3 below.

【００３８】また、上記円柱状絶縁体磁器の相対密度を
下記の表２，表３に示す。Tables 2 and 3 below show the relative densities of the columnar insulator porcelain.

【００３９】[0039]

【表１】 [Table 1]

【００４０】[0040]

【表２】 [Table 2]

【００４１】[0041]

【表３】 [Table 3]

【００４２】試料番号２５，２６では、表１のガラスＦ
を用いたため、Ｑ値が６００と低かった。同様に、試料
番号２７においても、表１のガラスＧを用いたため、Ｑ
値が６００と低かった。In Sample Nos. 25 and 26, the glass F of Table 1 was used.
, The Q value was as low as 600. Similarly, in sample No. 27, since glass G in Table 1 was used, Q
The value was as low as 600.

【００４３】試料番号２８，２９では、ガラスＨを用い
たため、Ｑ値が６００と低かった。また、試料番号３４
では、ガラスＬを用いたため、Ｑ値が６００と低かっ
た。試料番号４３では、表１のガラスＱを用いたため、
Ｑ値が６００と低かった。In Sample Nos. 28 and 29, since the glass H was used, the Q value was as low as 600. Sample No. 34
Since the glass L was used, the Q value was as low as 600. In sample number 43, since glass Q in Table 1 was used,
The Q value was as low as 600.

【００４４】これに対して、本発明の実施例に相当す
る、試料番号１〜２４，３０〜３３，３５〜４２，４４
〜４６では、９００〜１０００℃の低温で焼結が可能で
あり、相対密度が９７％以上と緻密な焼結体が得られて
おり、比誘電率が約７と低く、さらに熱膨張係数が８〜
１２ｐｐｍ／℃と高く、しかも測定周波数１５ＧＨｚに
おけるＱ値が７００以上と高かった。On the other hand, sample numbers 1 to 24, 30 to 33, 35 to 42, and 44 correspond to the examples of the present invention.
-46, sintering is possible at a low temperature of 900-1000 ° C, a dense sintered body having a relative density of 97% or more is obtained, the relative dielectric constant is as low as about 7, and the thermal expansion coefficient is further reduced. 8 ~
The Q value at a measurement frequency of 15 GHz was as high as 12 ppm / ° C. and 700 or more.

【００４５】従って、高周波用電子部品に最適な低温で
焼成し得る絶縁体磁器組成物を提供し得ることがわか
る。次に、本発明に係る絶縁体磁器を用いたセラミック
多層基板、セラミック電子部品及び積層セラミック電子
部品の構造的な実施例を説明する。Therefore, it can be seen that an insulator ceramic composition which can be fired at a low temperature and which is optimal for high frequency electronic components can be provided. Next, structural examples of a ceramic multilayer substrate, a ceramic electronic component, and a multilayer ceramic electronic component using the insulator porcelain according to the present invention will be described.

【００４６】図１は、本発明の一実施例としてのセラミ
ック多層基板を含むセラミック電子部品としてのセラミ
ック多層モジュールを示す断面図であり、図２はその分
解斜視図である。FIG. 1 is a sectional view showing a ceramic multilayer module as a ceramic electronic component including a ceramic multilayer substrate according to one embodiment of the present invention, and FIG. 2 is an exploded perspective view thereof.

【００４７】セラミック多層モジュール１は、セラミッ
ク多層基板２を用いて構成されている。セラミック多層
基板２では、本発明に係る絶縁体磁器組成物からなる絶
縁性セラミック層３ａ，３ｂ間に、例えばチタン酸バリ
ウムにガラスを加えてなる相対的に誘電率の高い誘電性
セラミック層４が挟まれている。The ceramic multilayer module 1 is constituted by using a ceramic multilayer substrate 2. In the ceramic multilayer substrate 2, a dielectric ceramic layer 4 having a relatively high dielectric constant, for example, obtained by adding glass to barium titanate, is provided between the insulating ceramic layers 3a and 3b made of the insulator porcelain composition according to the present invention. It is sandwiched.

【００４８】誘電性セラミック層４内には、複数の内部
電極５が誘電性セラミック層４の一を介して隣り合うよ
うに配置されており、それによって積層コンデンサユニ
ットＣ１，Ｃ２が構成されている。In the dielectric ceramic layer 4, a plurality of internal electrodes 5 are arranged so as to be adjacent to each other via one of the dielectric ceramic layers 4, thereby forming the multilayer capacitor units C1 and C2. .

【００４９】また、絶縁性セラミック層３ａ，３ｂ及び
誘電性セラミック層４には、複数のビアホール電極６，
６ａや内部配線が形成されている。他方、セラミック多
層基板２の上面には、電子部品素子９〜１１が実装され
ている。電子部品素子９〜１１としては、半導体デバイ
ス、チップ型積層コンデンサなどの適宜の電子部品素子
を用いることができる。上記ビアホール電極６及び内部
配線により、これらの電子部品素子９〜１１と、コンデ
ンサユニットＣ１，Ｃ２とが電気的に接続されて本実施
例に係るセラミック多層モジュール１の回路を構成して
いる。The insulating ceramic layers 3a and 3b and the dielectric ceramic layer 4 have a plurality of via-hole electrodes 6,
6a and internal wiring are formed. On the other hand, electronic component elements 9 to 11 are mounted on the upper surface of the ceramic multilayer substrate 2. As the electronic component elements 9 to 11, appropriate electronic component elements such as semiconductor devices and chip-type multilayer capacitors can be used. The electronic component elements 9 to 11 and the capacitor units C1 and C2 are electrically connected to each other by the via hole electrode 6 and the internal wiring to configure a circuit of the ceramic multilayer module 1 according to the present embodiment.

【００５０】また、上記セラミック多層基板２の上面に
は、導電性キャップ８が固定されている。導電性キャッ
プ８は、セラミック多層基板２を上面から下面に向かっ
て貫いているビアホール電極６に電気的に接続されてい
る。また、セラミック多層基板２の下面に外部電極７，
７が形成されており、外部電極７，７が上記ビアホール
電極６，６ａに電気的に接続されている。また、他の外
部電極については図示を省略しているが、上記外部電極
７と同様に、セラミック多層基板２の下面にのみ形成さ
れている。また、他の外部電極は、上述した内部配線を
介して、電子部品素子９〜１１やコンデンサユニットＣ
１，Ｃ２と電気的に接続されている。A conductive cap 8 is fixed on the upper surface of the ceramic multilayer substrate 2. The conductive cap 8 is electrically connected to the via-hole electrode 6 that penetrates the ceramic multilayer substrate 2 from the upper surface to the lower surface. Also, external electrodes 7,
The external electrodes 7, 7 are electrically connected to the via-hole electrodes 6, 6a. Although other external electrodes are not shown, they are formed only on the lower surface of the ceramic multilayer substrate 2 as in the case of the external electrodes 7. The other external electrodes are connected to the electronic component elements 9 to 11 and the capacitor unit C via the above-described internal wiring.
1 and C2.

【００５１】このように、セラミック多層基板２の下面
にのみ外部と接続するための外部電極７を形成すること
により、セラミック積層モジュールを、下面側を利用し
てプリント回路基板などに容易に表面実装することがで
きる。As described above, by forming the external electrodes 7 for connection to the outside only on the lower surface of the ceramic multilayer substrate 2, the ceramic laminated module can be easily surface-mounted on a printed circuit board or the like using the lower surface side. can do.

【００５２】また、本実施例では、キャップ８が導電性
材料からなり、外部電極７にビアホール電極６ａを介し
て電気的に接続されているので、電子部品素子９〜１１
を導電性キャップ８により電磁シールドすることができ
る。もっとも、キャップ８は、必ずしも導電性材料で構
成されている必要はない。In this embodiment, since the cap 8 is made of a conductive material and is electrically connected to the external electrode 7 via the via-hole electrode 6a, the electronic component elements 9 to 11 are formed.
Can be electromagnetically shielded by the conductive cap 8. However, the cap 8 does not necessarily need to be made of a conductive material.

【００５３】本実施例のセラミック多層モジュール１で
は、上記絶縁性セラミック層３ａ，３ｂが本発明に係る
絶縁体磁器を用いているので誘電率が低く、かつＱ値も
高いので、高周波用途に適したセラミック多層モジュー
ル１を提供することができる。In the ceramic multilayer module 1 of this embodiment, since the insulating ceramic layers 3a and 3b use the insulating porcelain according to the present invention, the dielectric constant is low and the Q value is high. The ceramic multilayer module 1 can be provided.

【００５４】なお、上記セラミック多層基板２は、周知
のセラミック積層一体焼成技術を用いて容易に得ること
ができる。すなわち、先ず、本発明に係る絶縁体磁器材
料を主体とするセラミックグリーンシートを用意し、内
部電極５、外部配線及びビアホール電極６，６ａなどを
構成するための電極パターンを印刷し、積層する。さら
に、上下に絶縁性セラミック層３ａ，３ｂを形成するた
めのセラミックグリーンシート上に外部配線及びビアホ
ール電極６，６ａを構成するための電極パターンを形成
したものを適宜の枚数積層し、厚み方向に加圧する。こ
のようにして得られた積層体を焼成することにより、容
易にセラミック多層基板２を得ることができる。The above-mentioned ceramic multilayer substrate 2 can be easily obtained by using a well-known ceramic lamination integrated firing technique. That is, first, a ceramic green sheet mainly composed of the insulator porcelain material according to the present invention is prepared, and an electrode pattern for forming the internal electrode 5, the external wiring, the via hole electrodes 6, 6a and the like is printed and laminated. Further, an appropriate number of layers each having an external wiring and an electrode pattern for forming via hole electrodes 6 and 6a formed on ceramic green sheets for forming insulating ceramic layers 3a and 3b on the upper and lower sides are stacked in the thickness direction. Apply pressure. By firing the laminate thus obtained, the ceramic multilayer substrate 2 can be easily obtained.

【００５５】図３〜図５は、本発明の第２の構造的な実
施例としての積層セラミック電子部品を説明するための
分解斜視図、外観斜視図及び回路図である。図４に示す
この積層セラミック電子部品２０は、ＬＣフィルタであ
る。セラミック焼結体２１内に、後述のようにインダク
タンスＬ及び静電容量Ｃを構成する回路が構成されてい
る。セラミック焼結体２１が、本発明に係る絶縁体磁器
を用いて構成されている。また、セラミック焼結体２１
の外表面には、外部電極２３ａ，２３ｂ，２４ａ，２４
ｂが形成されており、外部電極２３ａ，２３ｂ，２４
ａ，２４ｂ間には、図５に示すＬＣ共振回路が構成され
ている。FIGS. 3 to 5 are an exploded perspective view, an external perspective view, and a circuit diagram for explaining a multilayer ceramic electronic component as a second structural embodiment of the present invention. This multilayer ceramic electronic component 20 shown in FIG. 4 is an LC filter. A circuit forming an inductance L and a capacitance C is formed in the ceramic sintered body 21 as described later. The ceramic sintered body 21 is configured using the insulator porcelain according to the present invention. The ceramic sintered body 21
External electrodes 23a, 23b, 24a, 24
b are formed, and the external electrodes 23a, 23b, 24
The LC resonance circuit shown in FIG. 5 is configured between a and 24b.

【００５６】次に、上記セラミック焼結体２１内の構成
を、図３を参照しつつ製造方法を説明することにより明
らかにする。まず、本発明に係る絶縁体磁器材料に、有
機ビヒクルを添加し、セラミックスラリーを得る。この
セラミックスラリーを、適宜のシート成形法により形成
し、セラミックグリーンシートを得る。このようにして
得られたセラミックグリーンシートを乾燥した後所定の
大きさに打ち抜き、矩形のセラミックグリーンシート２
１ａ〜２１ｍを用意する。Next, the structure inside the ceramic sintered body 21 will be clarified by describing the manufacturing method with reference to FIG. First, an organic vehicle is added to the insulator porcelain material according to the present invention to obtain a ceramic slurry. This ceramic slurry is formed by an appropriate sheet forming method to obtain a ceramic green sheet. The ceramic green sheet thus obtained is dried and punched into a predetermined size to obtain a rectangular ceramic green sheet 2.
1a to 21m are prepared.

【００５７】次に、セラミックグリーンシート２１ａ〜
２１ｍに、ビアホール電極２８を構成するための貫通孔
を必要に応じて形成する。さらに、導電ペーストをスク
リーン印刷することにより、コイル導体２６ａ，２６
ｂ、コンデンサ用内部電極２７ａ〜２７ｃ、コイル導体
２６ｃ，２６ｄを形成すると共に、上記ビアホール２８
用貫通孔に導電ペーストを充填し、ビアホール電極２８
を形成する。Next, the ceramic green sheets 21a-
A through hole for forming the via hole electrode 28 is formed at 21 m as needed. Further, the conductive paste is screen-printed, so that the coil conductors 26a, 26
b, the capacitor internal electrodes 27a to 27c, the coil conductors 26c and 26d, and the via holes 28
Filling the conductive paste into the through-hole for via holes 28
To form

【００５８】しかる後、セラミックグリーンシート２１
ａ〜２１ｍを図示の向きに積層し、厚み方向に加圧し積
層体を得る。得られた積層体を焼成し、セラミック焼結
体２１を得る。Thereafter, the ceramic green sheet 21
a to 21 m are laminated in the illustrated direction and pressed in the thickness direction to obtain a laminate. The obtained laminate is fired to obtain a ceramic sintered body 21.

【００５９】上記のようにして得られたセラミック焼結
体２１に、図４に示したように外部電極２３ａ〜２４ｂ
を、導電ペーストの塗布・焼き付け、蒸着、メッキもし
くはスパッタリングなどの薄膜形成法等により形成す
る。このようにして、積層セラミック電子部品２０を得
ることができる。As shown in FIG. 4, the external electrodes 23a to 24b
Is formed by a thin film forming method such as application and baking of a conductive paste, vapor deposition, plating or sputtering. Thus, the multilayer ceramic electronic component 20 can be obtained.

【００６０】図３から明らかなように、コイル導体２６
ａ，２６ｂにより、図５に示すインダクタンスユニット
Ｌ１が、コイル導体２６ｃ，２６ｄによりインダクタン
スユニットＬ２が構成され、内部電極２７ａ〜２７ｃに
よりコンデンサＣが構成される。As is apparent from FIG. 3, the coil conductor 26
5, the inductance unit L1 shown in FIG. 5, the coil conductors 26c, 26d constitute an inductance unit L2, and the internal electrodes 27a to 27c constitute a capacitor C.

【００６１】本実施例の積層セラミック電子部品２０で
は、上記のようにＬＣフィルタが構成されているが、セ
ラミック焼結体２１が本発明に係る絶縁体磁器を用いて
構成されているので、第１の実施例のセラミック多層基
板２と同様に、低温焼成により得ることができ、従って
内部電極としての上記コイル導体２６ａ〜２６ｃやコン
デンサ用内部電極２７ａ〜２７ｃとして、銅、銀、金な
どの低融点金属を用いてセラミックスと一体焼成するこ
とができる。加えて、高周波におけるＱ値が高く、高周
波用途に適したＬＣフィルタを構成することができる。In the multilayer ceramic electronic component 20 of this embodiment, the LC filter is formed as described above. However, since the ceramic sintered body 21 is formed by using the insulator porcelain according to the present invention, As in the case of the ceramic multilayer substrate 2 of the first embodiment, it can be obtained by sintering at a low temperature. It can be integrally fired with ceramics using a melting point metal. In addition, an LC filter having a high Q value at high frequencies and suitable for high frequency applications can be configured.

【００６２】なお、上記第１，第２の構造的実施例で
は、セラミック多層モジュール１及びＬＣフィルタを構
成する積層セラミック電子部品２０を例にとり説明した
が、本発明に係るセラミック電子部品及び積層セラミッ
ク電子部品はこれらの構造に限定されるものではない。
すなわち、マルチチップモジュール用セラミック多層基
板、ハイブリッドＩＣ用セラミック多層基板などの各種
セラミック多層基板、あるいはこれらのセラミック多層
基板に電子部品素子を搭載した様々なセラミック電子部
品、さらに、チップ型積層コンデンサやチップ型積層誘
電体アンテナなどの様々なチップ型積層電子部品に適用
することができる。In the first and second structural embodiments, the ceramic multilayer module 1 and the multilayer ceramic electronic component 20 constituting the LC filter have been described as examples. However, the ceramic electronic component and the multilayer ceramic electronic component according to the present invention are described. Electronic components are not limited to these structures.
That is, various ceramic multilayer substrates such as a ceramic multilayer substrate for a multi-chip module, a ceramic multilayer substrate for a hybrid IC, or various ceramic electronic components in which electronic component elements are mounted on these ceramic multilayer substrates, as well as chip-type multilayer capacitors and chips. It can be applied to various chip-type multilayer electronic components such as a multilayer dielectric antenna.

【００６３】[0063]

【発明の効果】本発明に係る絶縁体磁器では、ＭｇＡｌ
2 Ｏ4 系セラミックス粉末と上記特定の組成のガラス粉
末とを含むので、１０００℃以下の低温で焼成すること
ができる。従って、銅や銀などの低融点金属からなる導
体材料と同時に焼成することができるので、これらの導
体材料を内部電極等に用いることができるので、低温焼
成により得ることができるセラミック多層基板に好適に
本発明に係る絶縁体磁器組成物を用いることができ、か
つ多層基板などのコストを低減することができる。加え
て、本発明に係る絶縁体磁器組成物を焼成することによ
り得られた絶縁体磁器は、高周波帯において高いＱ値及
び低い誘電率を示すので、高周波特性に優れた多層基板
などを提供することができる。According to the insulator porcelain of the present invention, MgAl
Since it contains the 2 O 4 ceramic powder and the glass powder having the above specific composition, it can be fired at a low temperature of 1000 ° C. or lower. Therefore, since it is possible to fire simultaneously with a conductor material made of a low melting point metal such as copper or silver, it is possible to use these conductor materials for internal electrodes and the like. In addition, the insulator porcelain composition according to the present invention can be used, and the cost of a multilayer substrate or the like can be reduced. In addition, since the insulator porcelain obtained by firing the insulator porcelain composition according to the present invention exhibits a high Q value and a low dielectric constant in a high frequency band, it provides a multilayer substrate excellent in high frequency characteristics. be able to.

【００６４】本発明において、前記ガラス粉末が、Ｂａ
Ｏ、ＳｒＯ及びＣａＯからなる群から選択した少なくと
も１種のアルカリ土類金属酸化物を、２０重量％以下の
割合でさらに含む場合は、ガラス粉末作製時の溶融温度
を低下させることができ、本発明に係る絶縁体磁器組成
物のコストを低減することができる。In the present invention, the glass powder is Ba
When at least one kind of alkaline earth metal oxide selected from the group consisting of O, SrO and CaO is further contained in a proportion of 20% by weight or less, the melting temperature at the time of producing the glass powder can be lowered. The cost of the insulator porcelain composition according to the present invention can be reduced.

【００６５】また、前記ガラス粉末が、Ｌｉ2 Ｏ、Ｋ2
Ｏ及びＮａ2 Ｏからなる群から選択した少なくとも１種
のアルカリ金属酸化物を、ガラス粉末全体の１０重量％
以下の割合で含む場合には、同じくガラス粉末作製時の
溶融温度を低下させることができ、ガラス粉末調製コス
トを低減することができると共に、Ｑ値の低下を抑制す
ることができる。The glass powder is composed of Li 2 O, K 2
At least one alkali metal oxide selected from the group consisting of O and Na 2 O in an amount of 10% by weight of the entire glass powder;
When it is contained in the following ratio, the melting temperature at the time of producing the glass powder can be similarly reduced, the cost for preparing the glass powder can be reduced, and the decrease in the Q value can be suppressed.

【００６６】さらに、前記絶縁体磁器組成物が、酸化亜
鉛をＺｎＯ換算で１５重量％以下の割合で含む場合に
は、絶縁体磁器組成物の焼成温度を低下させることがで
きると共に、緻密て焼結体を得ることを可能とする。Further, when the insulating porcelain composition contains zinc oxide in a proportion of 15% by weight or less in terms of ZnO, the firing temperature of the insulating porcelain composition can be lowered, and the insulating porcelain composition can be densely fired. It is possible to obtain union.

【００６７】また、酸化銅をＣｕＯ換算で全体の３重量
％以下の割合で含有する場合には、同じく焼成温度を低
下させることができ、かつＱ値の高い絶縁体磁器を得る
ことができる。When copper oxide is contained in a proportion of 3% by weight or less in terms of CuO, the sintering temperature can be lowered and an insulating porcelain having a high Q value can be obtained.

【００６８】前記セラミック粉末と前記ガラス粉末と
が、重量比で、セラミック粉末：ガラス粉末＝２０：８
０〜８０：２０の割合で含む場合には、より緻密な絶縁
体磁器を得ることができ、かつガラス粉末の使用により
Ｑ値の低下を抑制することができる。The ceramic powder and the glass powder are in a weight ratio of ceramic powder: glass powder = 20: 8.
When it is contained in a ratio of 0 to 80:20, a denser insulator porcelain can be obtained, and a decrease in the Q value can be suppressed by using glass powder.

【００６９】本発明に係るセラミック多層基板は、本発
明に係る絶縁体磁器からなる絶縁性セラミック層を含む
セラミック板を備えるので、低温で焼成でき、内部電極
構成材料としてＡｇやＣｕなどの低抵抗であり、かつ安
価な金属を用いることができる。しかも、該絶縁性セラ
ミック層は、誘電率が低く、Ｑ値が高いので、高周波用
途に適したセラミック多層基板を提供し得る。Since the ceramic multilayer substrate according to the present invention includes the ceramic plate including the insulating ceramic layer made of the insulating porcelain according to the present invention, it can be fired at a low temperature and has a low resistance such as Ag or Cu as a constituent material of the internal electrode. And an inexpensive metal can be used. In addition, since the insulating ceramic layer has a low dielectric constant and a high Q value, it is possible to provide a ceramic multilayer substrate suitable for high frequency applications.

【００７０】セラミック多層基板において、絶縁性セラ
ミック層の少なくとも片面に、該絶縁性セラミック層よ
りも高誘電率の第２のセラミック層が積層されている場
合には、第２のセラミック層の組成及び積層形態を工夫
することにより、強度や耐環境特性を、要求に応じて適
宜調整することができる。In the ceramic multilayer substrate, when a second ceramic layer having a higher dielectric constant than the insulating ceramic layer is laminated on at least one surface of the insulating ceramic layer, the composition and the composition of the second ceramic layer By devising the lamination form, the strength and environmental resistance can be appropriately adjusted as required.

【００７１】複数の内部電極が絶縁性セラミック層の少
なくとも一部を介して積層されて積層コンデンサが構成
されている場合には、本発明に係る絶縁体磁器の誘電率
が低く、Ｑ値が高いので、高周波用途に適している。When a multilayer capacitor is formed by laminating a plurality of internal electrodes via at least a part of the insulating ceramic layer, the dielectric constant of the insulator porcelain according to the present invention is low and the Q value is high. Therefore, it is suitable for high frequency applications.

【００７２】複数の内部電極が積層コンデンサを構成す
る複数の内部電極と、互いに接続されて積層インダクタ
を構成する複数のコイル導体とを有する場合には、本発
明に係る絶縁体磁器が、誘電率が低く、高周波で高いＱ
値を有するので、高周波用途に適した小型のＬＣ共振回
路を容易に構成することができる。In the case where the plurality of internal electrodes have a plurality of internal electrodes forming a multilayer capacitor and a plurality of coil conductors connected to each other to form a multilayer inductor, the insulator porcelain according to the present invention has a dielectric constant of Low, high Q at high frequencies
Since it has a value, a small LC resonance circuit suitable for high frequency applications can be easily configured.

【００７３】本発明に係るセラミック多層基板上に少な
くとも１つの電子部品素子が積層された本発明に係るセ
ラミック電子部品では、上記電子部品素子とセラミック
多層基板内の回路構成とを利用して、高周波用途に適し
た、小型の様々なセラミック電子部品を提供することが
できる。In the ceramic electronic component according to the present invention in which at least one electronic component element is laminated on the ceramic multilayer substrate according to the present invention, a high-frequency component is obtained by utilizing the electronic component element and the circuit configuration in the ceramic multilayer substrate. Various small-sized ceramic electronic components suitable for use can be provided.

【００７４】電子部品素子を囲繞するようにセラミック
多層基板にキャップが固定されている場合には、キャッ
プにより電子部品素子を保護することができ、耐湿性等
に優れたセラミック電子部品を提供することができる。When the cap is fixed to the ceramic multilayer substrate so as to surround the electronic component element, the electronic component element can be protected by the cap, and a ceramic electronic component excellent in moisture resistance and the like can be provided. Can be.

【００７５】キャップとして導電性キャップを用いた場
合には、囲繞されている電子部品素子を電磁シールドす
ることができる。セラミック多層基板の下面にのみ外部
電極が形成されている場合には、プリント回路基板など
にセラミック多層基板の下面側から容易に表面実装する
ことができる。In the case where a conductive cap is used as the cap, the surrounding electronic component elements can be electromagnetically shielded. When the external electrodes are formed only on the lower surface of the ceramic multilayer substrate, the external electrodes can be easily surface-mounted on a printed circuit board or the like from the lower surface side of the ceramic multilayer substrate.

【００７６】本発明に係る積層セラミック電子部品で
は、本発明に係る絶縁体磁器内に複数の内部電極が形成
されているので、低温で焼成でき、内部電極構成材料と
してＡｇやＣｕなどの低抵抗でありかつ安価な金属を用
いることができる。しかも、絶縁体磁器においては、誘
電率が低く、Ｑ値が高いので、高周波用途に適した積層
コンデンサを提供し得る。In the multilayer ceramic electronic component according to the present invention, since a plurality of internal electrodes are formed in the insulator porcelain according to the present invention, the internal electrodes can be fired at a low temperature, and a low resistance material such as Ag or Cu can be used as an internal electrode constituting material. And an inexpensive metal can be used. In addition, since the insulator porcelain has a low dielectric constant and a high Q value, a multilayer capacitor suitable for high frequency applications can be provided.

【００７７】本発明に係る積層セラミック電子部品にお
いて、複数の内部電極が積層コンデンサを構成している
場合には、本発明に係る絶縁体磁器の誘電率が低く、Ｑ
値が高いので、高周波用途に適している。In the multilayer ceramic electronic component according to the present invention, when the plurality of internal electrodes constitute a multilayer capacitor, the dielectric constant of the insulating ceramic according to the present invention is low,
Because of its high value, it is suitable for high frequency applications.

【００７８】本発明に係る積層セラミック電子部品にお
いて、複数の内部電極が、積層コンデンサを構成してい
る内部電極と、積層インダクタを構成しているコイル導
体とを有する場合には、本発明に係る絶縁体磁器が、機
械的強度に優れており、上記のように誘電率が低く、高
周波で高いＱ値を有するので、高周波用途に適したＬＣ
共振回路を容易に構成することができる。In the multilayer ceramic electronic component according to the present invention, when the plurality of internal electrodes have an internal electrode forming a multilayer capacitor and a coil conductor forming a multilayer inductor, the present invention relates to a multilayer ceramic electronic component. Insulator porcelain has excellent mechanical strength, low dielectric constant and high Q value at high frequency as described above.
A resonance circuit can be easily configured.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の一実施例としてのセラミック多層基板
を用いたセラミック電子部品としてのセラミック積層モ
ジュールを示す縦断面図。FIG. 1 is a longitudinal sectional view showing a ceramic laminated module as a ceramic electronic component using a ceramic multilayer substrate as one embodiment of the present invention.

【図２】図１に示したセラミック多層モジュールの分解
斜視図。FIG. 2 is an exploded perspective view of the ceramic multilayer module shown in FIG.

【図３】本発明の第２の実施例の積層セラミック電子部
品を製造するのに用いられたセラミックグリーンシート
及びその上に形成されている電極パターンを説明するた
めの分解斜視図。FIG. 3 is an exploded perspective view for explaining a ceramic green sheet used for manufacturing a multilayer ceramic electronic component of a second embodiment of the present invention and an electrode pattern formed thereon.

【図４】本発明の第２の実施例に係る積層セラミック電
子部品を示す斜視図。FIG. 4 is a perspective view showing a multilayer ceramic electronic component according to a second embodiment of the present invention.

【図５】図４に示した積層セラミック電子部品の回路構
成を示す図。5 is a diagram showing a circuit configuration of the multilayer ceramic electronic component shown in FIG.

【符号の説明】[Explanation of symbols]

１…セラミック積層モジュール ２…セラミック多層基板 ３ａ，３ｂ…絶縁性セラミック層 ４…第２のセラミック層としての誘電性セラミック層 ５，５…内部電極 ６，６ａ…ビアホール電極 ７…外部電極 ８…導電性キャップ ９〜１１…電子部品素子 ２０…積層セラミック電子部品 ２１…セラミック焼結体 ２３ａ，２３ｂ，２４ａ，２４ｂ…外部電極 ２６ａ〜２６ｄ…コイル導体 ２７ａ〜２７ｃ…コンデンサ用内部電極 DESCRIPTION OF SYMBOLS 1 ... Ceramic laminated module 2 ... Ceramic multilayer board 3a, 3b ... Insulating ceramic layer 4 ... Dielectric ceramic layer as 2nd ceramic layer 5, 5 ... Internal electrode 6, 6a ... Via hole electrode 7 ... External electrode 8 ... Conduction Caps 9 to 11 Electronic component elements 20 Multilayer ceramic electronic components 21 Ceramic sintered bodies 23a, 23b, 24a, 24b External electrodes 26a to 26d Coil conductors 27a to 27c Internal capacitors electrodes

フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０１Ｇ 4/40 Ｈ０５Ｋ 3/46 Ｔ ５Ｅ３４６ Ｈ０５Ｋ 1/03 ６１０ Ｃ０４Ｂ 35/04 Ａ ５Ｇ３０３ 3/46 Ｂ２８Ｂ 11/00 Ｚ Ｃ０４Ｂ 35/44 １０１ Ｈ０１Ｇ 4/40 ３２１Ａ (72)発明者 杉本 安隆 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 Ｆターム(参考） 4G030 AA02 AA03 AA04 AA07 AA08 AA09 AA10 AA31 AA32 AA35 AA36 BA12 GA09 4G031 AA01 AA03 AA04 AA05 AA06 AA25 AA26 AA28 AA29 BA12 CA08 GA02 4G055 AA08 AC09 BA22 5E001 AB03 AE00 AZ01 5E082 AB03 BB01 BB05 BC30 DD08 EE04 EE35 FG26 GG10 GG26 GG28 JJ15 KK01 PP03 5E346 AA12 AA15 AA23 AA38 BB20 CC18 CC32 CC39 DD02 DD34 EE24 EE29 FF18 FF45 GG02 GG06 GG09 GG10 GG40 HH06 5G303 AA05 AB06 AB08 AB12 AB15 AB17 BA12 CA03 CB01 CB02 CB03 CB06 CB11 CB14 CB16 CB17 CB20 CB30 CB32 CB38Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat II (Reference) H01G 4/40 H05K 3/46 T 5E346 H05K 1/03 610 C04B 35/04 A 5G303 3/46 B28B 11/00 Z C04B 35/44 101 H01G 4/40 321A (72) Inventor Yasutaka Sugimoto 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto F-term in Murata Manufacturing Co., Ltd. 4G030 AA02 AA03 AA04 AA07 AA08 AA09 AA10 AA31 AA32 AA35 AA36 BA12 GA09 4G031 AA01 AA03 AA04 AA05 AA06 AA25 AA26 AA28 AA29 BA12 CA08 GA02 4G055 AA08 AC09 BA22 5E001 AB03 AE00 AZ01 5E082 AB03 BB01 BB05 BC30 DD08 EE04 EE35 FG26 GG10 A23 CC12 GG15 GG28 EE29 FF18 FF45 GG02 GG06 GG09 GG10 GG40 HH06 5G303 AA05 AB06 AB08 AB12 AB15 AB17 BA12 CA03 CB01 CB02 CB03 CB06 CB11 CB14 CB16 CB17 CB20 CB30 CB32 CB38

Claims (18)

【特許請求の範囲】[Claims] 【請求項１】 （Ａ）ＭｇＡｌ2 Ｏ4 系セラミック粉末
と、 （Ｂ）酸化ケイ素をＳｉＯ2 換算で１３〜５０重量％、
酸化ホウ素をＢ2 Ｏ3換算で８〜６０重量％、酸化アル
ミニウムをＡｌ2 Ｏ3 換算で０〜２０重量％、酸化マグ
ネシウムをＭｇＯ換算で１０〜５５重量％含むガラス粉
末とを混合・焼成してなる絶縁体磁器組成物。(1) MgAl 2 O 4 based ceramic powder and (B) silicon oxide in an amount of 13 to 50% by weight in terms of SiO 2 ,
8-60 wt% of boron oxide in terms of B 2 O 3, aluminum oxide 0-20 wt% in terms of Al 2 O 3, magnesium oxide and glass powder were mixed and sintered containing 10 to 55 wt% in terms of MgO An insulator porcelain composition comprising: 【請求項２】 前記ガラス粉末が、ＣａＯ、ＢａＯ及び
ＳｒＯからなる群から選択した少なくとも１種のアルカ
リ土類金属酸化物を、前記ガラス粉末全体の２０重量％
以下の割合でさらに含む、請求項１に記載の絶縁体磁器
組成物。2. The glass powder comprises at least one alkaline earth metal oxide selected from the group consisting of CaO, BaO and SrO in an amount of 20% by weight of the whole glass powder.
The insulator porcelain composition according to claim 1, further comprising: 【請求項３】 前記ガラス粉末が、Ｌｉ2 Ｏ、Ｋ2 Ｏ及
びＮａ2 Ｏからなる群から選択した少なくとも１種のア
ルカリ金属酸化物を、ガラス粉末全体の１０重量％以下
の割合でさらに含む、請求項１または２に記載の絶縁体
磁器組成物。3. The glass powder further contains at least one alkali metal oxide selected from the group consisting of Li 2 O, K 2 O and Na 2 O in a proportion of not more than 10% by weight of the whole glass powder. The insulator porcelain composition according to claim 1 or 2. 【請求項４】 酸化亜鉛をＺｎＯ換算で１５重量％以下
の割合でさらに含むことを特徴とする、請求項１〜３に
記載の絶縁体磁器組成物。4. The insulating porcelain composition according to claim 1, further comprising zinc oxide in a proportion of 15% by weight or less in terms of ZnO. 【請求項５】 酸化銅をＣｕＯ換算で全体の３重量％以
下の割合でさらに含有する、請求項１〜４のいずれかに
記載の絶縁体磁器組成物。5. The insulating porcelain composition according to claim 1, further comprising copper oxide in a proportion of not more than 3% by weight of the whole in terms of CuO. 【請求項６】 前記セラミック粉末と前記ガラス粉末と
が、重量比で、セラミック粉末：ガラス粉末＝２０：８
０〜８０：２０の割合で含まれている、請求項１〜５の
いずれかに記載の絶縁体磁器組成物。6. The ceramic powder and the glass powder are in a weight ratio of ceramic powder: glass powder = 20: 8.
The insulator porcelain composition according to any one of claims 1 to 5, which is contained in a ratio of 0 to 80:20. 【請求項７】 請求項１〜６のいずれかに記載の絶縁体
磁器組成物を焼成することにより得られる、絶縁体磁
器。7. An insulator porcelain obtained by firing the insulator porcelain composition according to claim 1. 【請求項８】 請求項１〜７のいずれかに記載の絶縁体
磁器組成物からなる絶縁性セラミック層を含むセラミッ
ク板と、 前記セラミック板の絶縁性セラミック層内に形成された
複数の内部電極とを備えることを特徴とする、セラミッ
ク多層基板。8. A ceramic plate including an insulating ceramic layer made of the insulating porcelain composition according to claim 1, and a plurality of internal electrodes formed in the insulating ceramic layer of the ceramic plate. And a ceramic multilayer substrate. 【請求項９】 前記絶縁性セラミック層の少なくとも片
面に、該絶縁性セラミック層よりも誘電率が高い第２の
セラミック層が積層されている、請求項８に記載のセラ
ミック多層基板。9. The ceramic multilayer substrate according to claim 8, wherein a second ceramic layer having a higher dielectric constant than the insulating ceramic layer is laminated on at least one surface of the insulating ceramic layer. 【請求項１０】 前記複数の内部電極が、前記絶縁性セ
ラミック層の少なくとも一部を介して積層されて積層コ
ンデンサが構成されている、請求項８または９に記載の
セラミック多層基板。10. The ceramic multilayer substrate according to claim 8, wherein said plurality of internal electrodes are laminated via at least a part of said insulating ceramic layer to form a multilayer capacitor. 【請求項１１】 複数の内部電極が、前記絶縁性セラミ
ック層の少なくとも一部を介して積層されてコンデンサ
を構成しているコンデンサ用内部電極と、互いに接続さ
れて積層インダクタを構成しているコイル導体とを備え
る、請求項９または１０に記載のセラミック多層基板。11. A capacitor in which a plurality of internal electrodes are laminated via at least a part of the insulating ceramic layer to constitute a capacitor, and a coil which is connected to each other to constitute a laminated inductor. The ceramic multilayer substrate according to claim 9, comprising a conductor. 【請求項１２】 請求項９〜１１のいずれかに記載のセ
ラミック多層基板と、 前記セラミック多層基板上に実装されており、前記複数
の内部電極と共に回路を構成している少なくとも１つの
電子部品素子とを備えることを特徴とする、セラミック
電子部品。12. The ceramic multilayer substrate according to claim 9, wherein at least one electronic component element is mounted on said ceramic multilayer substrate and forms a circuit together with said plurality of internal electrodes. And a ceramic electronic component. 【請求項１３】 前記電子部品素子を囲繞するように前
記セラミック多層基板に固定されたキャップをさらに備
える、請求項１２に記載のセラミック電子部品。13. The ceramic electronic component according to claim 12, further comprising a cap fixed to said ceramic multilayer substrate so as to surround said electronic component element. 【請求項１４】 前記キャップが導電性キャップであ
る、請求項１３に記載のセラミック電子部品。14. The ceramic electronic component according to claim 13, wherein said cap is a conductive cap. 【請求項１５】 前記セラミック多層基板の下面にのみ
形成された複数の外部電極と、 前記外部電極に電気的に接続されており、かつ前記内部
電極または電子部品素子に電気的に接続された複数のス
ルーホール導体をさらに備えることを特徴とする、請求
項１２〜１４のいずれかに記載の電子部品。15. A plurality of external electrodes formed only on a lower surface of the ceramic multilayer substrate, and a plurality of external electrodes electrically connected to the external electrodes and electrically connected to the internal electrodes or electronic component elements. The electronic component according to claim 12, further comprising: a through-hole conductor. 【請求項１６】 請求項１〜７のいずれかに記載の絶縁
体磁器組成物からなるセラミック焼結体と、 前記セラミック焼結体内に配置された複数の内部電極
と、 前記セラミック焼結体の外表面に形成されており、いず
れかの内部電極に電気的に接続されている複数の外部電
極とを備えることを特徴とする、積層セラミック電子部
品。16. A ceramic sintered body made of the insulator porcelain composition according to claim 1, a plurality of internal electrodes arranged in the ceramic sintered body, and A multilayer ceramic electronic component, comprising: a plurality of external electrodes formed on an outer surface and electrically connected to any of the internal electrodes. 【請求項１７】 前記複数の内部電極がセラミック層を
介して重なり合うように配置されており、それによって
コンデンサユニットが構成されている、請求項１６に記
載の積層セラミック電子部品。17. The multilayer ceramic electronic component according to claim 16, wherein the plurality of internal electrodes are arranged so as to overlap with each other via a ceramic layer, thereby forming a capacitor unit. 【請求項１８】 前記複数の内部電極が、前記コンデン
サユニットを構成している内部電極に加えて、互いに接
続されて積層インダクタユニットを構成している複数の
コイル導体を有する、請求項１７に記載の積層セラミッ
ク電子部品。18. The multiple internal electrode according to claim 17, further comprising a plurality of coil conductors connected to each other to form a multilayer inductor unit, in addition to the internal electrodes forming the capacitor unit. Of multilayer ceramic electronic components.
JP2000220869A 2000-07-21 2000-07-21 Insulator porcelain composition Expired - Lifetime JP3680715B2 (en)

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GB0116582A GB2365007B (en) 2000-07-21 2001-07-06 Insulative ceramic compact
US09/909,337 US6713417B2 (en) 2000-07-21 2001-07-19 Insulative ceramic compact
CNB011227990A CN1197822C (en) 2000-07-21 2001-07-20 Insulation ceramic press block
CNB2004100434581A CN1266062C (en) 2000-07-21 2001-07-20 Insulative ceramic compact
KR10-2001-0043994A KR100434415B1 (en) 2000-07-21 2001-07-21 Insulative ceramic compact

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