JP2001345233A - Thin film electronic part, its manufacturing method and substrate - Google Patents
Thin film electronic part, its manufacturing method and substrateInfo
- Publication number
- JP2001345233A JP2001345233A JP2000364769A JP2000364769A JP2001345233A JP 2001345233 A JP2001345233 A JP 2001345233A JP 2000364769 A JP2000364769 A JP 2000364769A JP 2000364769 A JP2000364769 A JP 2000364769A JP 2001345233 A JP2001345233 A JP 2001345233A
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- Japan
- Prior art keywords
- hole
- protective film
- film
- thin
- insulating protective
- Prior art date
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は薄膜電子部品に関
し、例えば、薄膜コンデンサに好適に用いられる高周波
用途の薄膜電子部品およびその製法並びに基板に関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin-film electronic component, and more particularly, to a high-frequency thin-film electronic component suitably used for a thin-film capacitor, a method of manufacturing the same, and a substrate.
【０００２】[0002]
【従来技術】近年、電子機器の小型化、高機能化に伴
い、電子機器内に設置される電子部品にも小型化、薄型
化、高周波対応などの要求が強くなってきている。2. Description of the Related Art In recent years, as electronic devices have become smaller and more sophisticated, there has been a growing demand for electronic components installed in electronic devices to be smaller, thinner, and compatible with high frequencies.
【０００３】特に、大量の情報を高速に処理する必要の
あるコンピュータの高速デジタル回路では、パーソナル
コンピュータレベルにおいても、ＣＰＵチップ内のクロ
ック周波数は２００ＭＨｚから１ＧＨｚ、チップ間バス
のクロック周波数も７５ＭＨｚから１３３ＭＨｚという
具合に高速化が顕著である。In particular, in a high-speed digital circuit of a computer which needs to process a large amount of information at high speed, the clock frequency in the CPU chip is 200 MHz to 1 GHz, and the clock frequency of the bus between chips is also 75 MHz to 133 MHz even at the personal computer level. The speedup is remarkable.
【０００４】また、ＬＳＩの集積度が高まりチップ内の
素子数の増大につれ、消費電力を抑えるために電源電圧
は低下の傾向にある。これらＩＣ回路の高速化、高密度
化、低電圧化に伴い、コンデンサ等の受動部品も小型大
容量化と併せて、高周波もしくは高速パルスに対して優
れた特性を示すことが必須になってきている。コンデン
サの小型・大容量化を実現するためには、誘電体層の薄
膜化、電極パターンの小型化が有効であり、種々の薄膜
コンデンサが提案されている。As the degree of integration of LSIs increases and the number of elements in a chip increases, the power supply voltage tends to decrease in order to suppress power consumption. As the speed, density, and voltage of these IC circuits have increased, it has become essential for passive components, such as capacitors, to exhibit excellent characteristics with respect to high-frequency or high-speed pulses, along with increasing the size and capacity. I have. In order to reduce the size and capacitance of the capacitor, it is effective to reduce the thickness of the dielectric layer and the size of the electrode pattern, and various thin film capacitors have been proposed.
【０００５】誘電体層の薄膜化による弊害として、絶縁
特性の劣化が懸念される。これら薄膜電子部品の絶縁特
性を向上するため、種々の手法が提案されている。例え
ば、特開平７−１８３１６５号公報、特開平８−３１９
５１号公報には絶縁体層の微構造を改良し、絶縁体層自
身のリーク特性を改良した例が開示されている。また、
特開平９−１９９３７３号公報には上側電極が絶縁体層
端部を被覆しない様なエアブリッジ構造を採用し、絶縁
体層端部での絶縁性劣化を改善した例が開示されてい
る。[0005] As an adverse effect due to the reduction in the thickness of the dielectric layer, there is a concern that the insulation characteristics may deteriorate. Various techniques have been proposed to improve the insulating properties of these thin-film electronic components. For example, JP-A-7-183165, JP-A-8-319
No. 51 discloses an example in which the microstructure of the insulator layer is improved and the leak characteristics of the insulator layer itself are improved. Also,
Japanese Patent Application Laid-Open No. 9-199373 discloses an example in which an air bridge structure is adopted in which the upper electrode does not cover the end of the insulator layer, and the deterioration of insulation at the end of the insulator layer is improved.
【０００６】薄膜コンデンサとしては、例えば、図７に
示すように、支持基板４１上に、絶縁体層４３（誘電体
薄膜）と下側電極４５、上側電極４７を有する薄膜素子
Ａが複数設けられて構成され、絶縁体層４３は電極４
５、４７により挟持されて薄膜素子Ａ（容量素子）を構
成することが考えられる。As a thin film capacitor, for example, as shown in FIG. 7, a plurality of thin film elements A having an insulating layer 43 (dielectric thin film), a lower electrode 45 and an upper electrode 47 are provided on a support substrate 41. The insulator layer 43 is formed of the electrode 4
It is conceivable that the thin film element A (capacitance element) is constituted by being sandwiched by the elements 5, 47.
【０００７】また、薄膜素子Ａは絶縁性保護膜４９で被
覆されており、この絶縁性保護膜４９には、底面に上側
電極４７が露出する貫通孔５１が形成されている。この
貫通孔５１内には、ハンダバリア層５３を介してハンダ
バンプからなる外部端子５５が形成されている。この薄
膜コンデンサでは、上側電極４７は、下側電極４５との
導通を防止するため、貫通孔５１の周りが環状に除去さ
れ（ｘで示す）、上側電極４７の一部が分割されてい
る。The thin-film element A is covered with an insulating protective film 49. The insulating protective film 49 has a through hole 51 on the bottom surface where the upper electrode 47 is exposed. External terminals 55 made of solder bumps are formed in the through holes 51 via a solder barrier layer 53. In this thin film capacitor, the upper electrode 47 is partly divided by removing the periphery of the through-hole 51 in a ring shape (indicated by x) in order to prevent conduction with the lower electrode 45.
【０００８】このような薄膜コンデンサは、支持基板上
にスパッタリング法、ＣＶＤ法等の気相合成法を用いて
下側電極を形成し、フォトリソグラフィ技術を用いて、
パターン加工を行う工程と、パターン加工された下側電
極上に、気相合成法やゾルゲル法などで絶縁体層を形成
し、フォトリソグラフィを用いてパターン加工する工程
と、パターン加工された絶縁体層上に上側電極を形成
し、フォトリソグラフィ技術を用いて、パターン加工を
行う工程と、上側電極上に絶縁性保護膜を形成する工程
と、この絶縁性保護膜に貫通孔を形成し、この貫通孔内
に、下側電極および上側電極にそれぞれ電気的に接続す
る外部端子を形成する工程を経て作製される。In such a thin film capacitor, a lower electrode is formed on a supporting substrate by a vapor phase synthesis method such as a sputtering method or a CVD method, and is formed by a photolithography technique.
Performing a patterning process, forming an insulator layer on the patterned lower electrode by a vapor phase synthesis method or a sol-gel method, and patterning the same using photolithography; Forming an upper electrode on the layer, performing a patterning process using photolithography technology, forming an insulating protective film on the upper electrode, forming a through hole in the insulating protective film, It is manufactured through a step of forming external terminals electrically connected to the lower electrode and the upper electrode, respectively, in the through holes.
【０００９】[0009]
【発明が解決しようとする課題】しかしながら、上述し
た様な工程で薄膜電子部品を作製する場合、絶縁体層上
に上側電極を形成した後、上側電極が下側電極と電気的
に接続されないように余分な上側電極をパターン加工し
て除去していたため、絶縁体層上に上側電極のエッチン
グ残渣が生じ、この絶縁体層上のエッチング残渣による
表面リーク電流が発生し、薄膜電子部品の絶縁特性が劣
化してしまうという問題があった。However, when a thin-film electronic component is manufactured by the above-described steps, after the upper electrode is formed on the insulator layer, the upper electrode is not electrically connected to the lower electrode. Since the excess upper electrode was removed by pattern processing, an etching residue of the upper electrode was formed on the insulator layer, and a surface leak current was generated due to the etching residue on the insulator layer. There is a problem that is deteriorated.
【００１０】本発明は、高容量、高絶縁性を有する小型
の薄膜電子部品およびその製法並びに基板を提供するこ
とを目的とする。An object of the present invention is to provide a small-sized thin-film electronic component having high capacity and high insulation, a method for producing the same, and a substrate.
【００１１】[0011]
【課題を解決するための手段】本発明の薄膜電子部品
は、支持基板上に、電極および絶縁体層を有する薄膜素
子を設けるとともに、該薄膜素子を絶縁性保護膜で被覆
してなり、該絶縁性保護膜に、前記電極と電気的に接続
する外部端子が設けられる貫通孔を形成してなる薄膜電
子部品であって、前記貫通孔の周りの前記絶縁性保護膜
に環状の***部が形成されていることを特徴とする。The thin-film electronic component of the present invention comprises a thin-film element having electrodes and an insulator layer provided on a support substrate, and the thin-film element is covered with an insulating protective film. A thin-film electronic component in which a through-hole in which an external terminal electrically connected to the electrode is provided is formed in the insulating protective film, wherein an annular protrusion is formed in the insulating protective film around the through-hole. It is characterized by being formed.
【００１２】また、本発明の薄膜コンデンサは、支持基
板上に、電極が絶縁体層上に形成された薄膜素子を設け
るとともに、該薄膜素子を絶縁性保護膜で被覆してな
り、該絶縁性保護膜に、前記電極と電気的に接続する外
部端子が設けられる貫通孔を形成してなる薄膜電子部品
であって、前記貫通孔の周りの前記絶縁体層上に、前記
電極を分割する環状の絶縁ダム部が形成されていること
を特徴とする。Further, the thin film capacitor of the present invention comprises, on a supporting substrate, a thin film element having electrodes formed on an insulator layer, and covering the thin film element with an insulating protective film. A thin-film electronic component in which a protective film is provided with a through hole in which an external terminal electrically connected to the electrode is provided, wherein a ring is formed on the insulating layer around the through hole to divide the electrode. Is formed.
【００１３】このような薄膜電子部品は、支持基板上
に、下側電極、絶縁体層を順次積層する工程と、前記絶
縁体層に前記下側電極が露出する第１貫通孔および第２
貫通孔を形成する工程と、前記第１貫通孔の周りの前記
絶縁体層表面に環状の第１絶縁性保護膜を形成する工程
と、前記絶縁体層上、並びに前記第１貫通孔および第２
貫通孔の内面に上側電極を形成する工程と、該上側電極
および前記第１絶縁性保護膜の上面に第２絶縁性保護膜
を形成する工程と、該第２絶縁性保護膜における前記第
１貫通孔および第２貫通孔の形成位置に、前記上側電極
と電気的に接続する外部端子が設けられる貫通孔を形成
する工程とを具備する製法により得られる。In such a thin film electronic component, a step of sequentially laminating a lower electrode and an insulating layer on a supporting substrate, a step of forming a first through hole and a second step of exposing the lower electrode to the insulating layer.
Forming a through hole; forming an annular first insulative protective film on the surface of the insulator layer around the first through hole; on the insulator layer; 2
Forming an upper electrode on the inner surface of the through-hole, forming a second insulating protective film on the upper electrode and the upper surface of the first insulating protective film, and forming the first electrode on the second insulating protective film. Forming a through-hole at a position where the through-hole and the second through-hole are to be formed, in which an external terminal electrically connected to the upper electrode is provided.
【００１４】上側電極は加工した絶縁体層上に直接スパ
ッタ法で形成され、フォトレジストを用いたエッチング
加工により、絶縁体層上の上側電極の一部が除去され、
絶縁体層上の同一面上に形成された極性の異なる電極間
（上側電極と下側電極との間）の電気的な導通が阻止さ
れていたが、本発明では、上側電極の一部を除去してい
た部分、即ち、下側電極に電気的に接続される外部端子
用の貫通孔（第１貫通孔）の周りに、予め環状の第１絶
縁性保護膜を形成し、この後、上側電極を形成し、絶縁
体層上、並びに第１貫通孔および第２貫通孔の内面だけ
に上側電極が形成されるよう、第１絶縁性保護膜上の上
側電極のみをエッチング加工することにより、絶縁体層
上の上側電極の一部（極性の異なる電極間）をエッチン
グ加工する必要がなく、下側電極と確実に絶縁すること
ができ、エッチング残渣による異なる極性の電極間の表
面リーク電流の発生を低減でき、これに起因する絶縁不
良を防止できる。The upper electrode is formed directly on the processed insulator layer by a sputtering method, and a part of the upper electrode on the insulator layer is removed by etching using a photoresist.
Although electrical conduction between electrodes having different polarities (between the upper electrode and the lower electrode) formed on the same surface on the insulator layer was prevented, in the present invention, a part of the upper electrode was An annular first insulating protective film is formed in advance around the removed portion, that is, around the through-hole (first through-hole) for an external terminal electrically connected to the lower electrode, and thereafter, An upper electrode is formed, and only the upper electrode on the first insulating protective film is etched so that the upper electrode is formed only on the insulator layer and on the inner surfaces of the first through hole and the second through hole. It is not necessary to etch a part of the upper electrode (between electrodes having different polarities) on the insulator layer, and it is possible to reliably insulate the lower electrode from the lower electrode, and a surface leakage current between electrodes having different polarities due to etching residues. Can be reduced, and insulation failure due to this can be prevented.
【００１５】第１絶縁性保護膜の膜厚は上側電極よりも
厚いことが望ましい。上側電極よりも第１絶縁性保護膜
の膜厚を大きくすることにより、電極間の障壁の高さが
高くなり、異なる極性の電極間の表面リーク電流の発生
を防止できる。It is desirable that the thickness of the first insulating protective film is larger than that of the upper electrode. By making the thickness of the first insulating protective film larger than that of the upper electrode, the height of the barrier between the electrodes is increased, and the occurrence of surface leak current between electrodes of different polarities can be prevented.
【００１６】このように第１絶縁性保護膜の膜厚を上側
電極よりも厚くすることにより、下側電極と電気的に接
続される外部端子の周りの絶縁性保護膜に環状の***部
が形成されることになる。By making the film thickness of the first insulating protective film thicker than that of the upper electrode, an annular ridge is formed on the insulating protective film around the external terminal electrically connected to the lower electrode. Will be formed.
【００１７】絶縁性保護膜に形成された環状の***部ま
たは絶縁ダム部の高さは２μｍ以上であることが望まし
い。これは、上側電極と第１絶縁性保護膜との高低差が
大きくなり、この第１絶縁性保護膜により異なる極性の
電極間を確実に絶縁することができるとともに、異なる
極性の電極間の表面リーク電流の発生をさらに確実に防
止できる。このような***部は、第１絶縁性保護膜（絶
縁ダム部）の膜厚を上側電極よりも２μｍ以上厚くする
ことにより得られる。It is desirable that the height of the annular ridge or the insulating dam formed on the insulating protective film is 2 μm or more. This is because the height difference between the upper electrode and the first insulating protective film becomes large, and the first insulating protective film can reliably insulate between electrodes of different polarities, and also has a surface between electrodes of different polarities. Leakage current can be more reliably prevented. Such a raised portion is obtained by making the first insulating protective film (insulating dam portion) thicker than the upper electrode by 2 μm or more.
【００１８】また、本発明の薄膜電子部品では、絶縁体
層非形成領域にハンダバンプからなる外部端子が形成さ
れるため、絶縁体層の厚みに対して非常に大きな外部端
子がリフロー時に収縮しても、リフロー工程で生じる外
部端子の熱収縮に伴う応力に対して絶縁体層が直接ダメ
ージを受けず、絶縁体層に過大な応力が発生することが
なく、絶縁体層におけるクラック発生を防止することが
でき、クラックに半田が流れ込むことがなく、これによ
り絶縁性を確保することができ、素子特性を維持した状
態で、かつ実装信頼性も確保できる。Further, in the thin-film electronic component of the present invention, since external terminals made of solder bumps are formed in the region where the insulator layer is not formed, the external terminals that are very large with respect to the thickness of the insulator layer shrink during reflow. In addition, the insulator layer is not directly damaged by the stress caused by the thermal shrinkage of the external terminals generated in the reflow step, so that no excessive stress is generated in the insulator layer, and the occurrence of cracks in the insulator layer is prevented. Therefore, the solder does not flow into the cracks, whereby the insulation properties can be secured, and the mounting characteristics can be secured while maintaining the element characteristics.
【００１９】[0019]
【発明の実施の形態】図１は、本発明の薄膜コンデンサ
からなる薄膜電子部品を示すもので、この薄膜コンデン
サは、支持基板１上に、絶縁体層３（誘電体薄膜）と下
側電極５、上側電極７を有する薄膜素子Ａが複数設けら
れて構成されている。電極５、７はＡｕから構成され、
絶縁体層３は電極５、７により挟持されて薄膜素子Ａ
（容量素子）が構成されている。FIG. 1 shows a thin-film electronic component comprising a thin-film capacitor of the present invention. This thin-film capacitor has an insulating layer 3 (dielectric thin film) and a lower electrode on a support substrate 1. 5. A plurality of thin film elements A having the upper electrode 7 are provided. The electrodes 5, 7 are made of Au,
The insulator layer 3 is sandwiched between the electrodes 5 and 7 to form the thin film element A.
(Capacitance element).
【００２０】また、薄膜素子Ａは絶縁性保護膜９で被覆
されており、この絶縁性保護膜９には、底面に下側電極
５または上側電極７が露出する貫通孔１１が形成されて
いる。この貫通孔１１内には、ハンダバリア層１３を介
してハンダバンプからなる外部端子１５ａ、１５ｂが突
出して形成されている。The thin film element A is covered with an insulating protective film 9, and the insulating protective film 9 is formed with a through hole 11 on the bottom surface where the lower electrode 5 or the upper electrode 7 is exposed. . In the through hole 11, external terminals 15a and 15b made of solder bumps are formed so as to project through a solder barrier layer 13.
【００２１】薄膜コンデンサの誘電体薄膜を構成する絶
縁体層３は、高周波領域において高い比誘電率を有する
ペロブスカイト型酸化物結晶からなる誘電体でよく、例
えばＰｂ（Ｍｇ，Ｎｂ）Ｏ3系、Ｐｂ（Ｍｇ，Ｎｂ）Ｏ3
−ＰｂＴｉＯ3系、Ｐｂ（Ｚｒ，Ｔｉ）Ｏ3系、Ｐｂ（Ｍ
ｇ，Ｎｂ）Ｏ3−Ｐｂ（Ｚｒ，Ｔｉ）Ｏ3系、（Ｐｂ，Ｌ
ａ）ＺｒＴｉＯ3系、ＢａＴｉＯ3系、（Ｓｒ，Ｂａ）Ｔ
ｉＯ3系、あるいはこれに他の添加物を添加したり、置
換した化合物であってもよく、特に限定されるものでは
ない。The insulator layer 3 constituting the dielectric thin film of the thin film capacitor may be a dielectric made of a perovskite-type oxide crystal having a high relative dielectric constant in a high-frequency range, for example, a Pb (Mg, Nb) O 3 -based material. Pb (Mg, Nb) O 3
-PbTiO 3 system, Pb (Zr, Ti) O 3 system, Pb (M
g, Nb) O 3 -Pb ( Zr, Ti) O 3 system, (Pb, L
a) ZrTiO 3 system, BaTiO 3 system, (Sr, Ba) T
It may be an iO 3 -based compound or a compound obtained by adding or substituting another additive thereto, and is not particularly limited.
【００２２】また、絶縁体層３の膜厚は、高容量と絶縁
性を確保するため０．３〜１．０μｍが望ましい。これ
は０．３μｍよりも薄い場合には被覆性が低下し、絶縁
性が低下する場合があり、１．０μｍよりも厚い場合に
は容量が小さくなる傾向があるからである。絶縁体層３
の膜厚は０．４〜０．８μｍが望ましい。The thickness of the insulator layer 3 is desirably 0.3 to 1.0 μm to ensure high capacity and insulation. This is because when the thickness is smaller than 0.3 μm, the coating property may be reduced and the insulating property may be reduced. When the thickness is larger than 1.0 μm, the capacity tends to be reduced. Insulator layer 3
Is preferably 0.4 to 0.8 μm.
【００２３】Ａｕからなる電極５、７の膜厚は、高周波
領域でのインピーダンスと膜の被覆性を考慮すると０．
３〜０．５μｍが望ましい。電極５、７の膜厚が０．３
μｍよりも薄い場合には、一部に被覆されない部分が発
生する虞があるからであり、また０．５μｍよりも厚い
場合は、高周波領域における導体の表皮効果を考慮する
と導体層の抵抗は殆ど変化しないからである。The thickness of each of the electrodes 5 and 7 made of Au is set to 0.1 in consideration of impedance in a high frequency region and coatability of the film.
3 to 0.5 μm is desirable. The thickness of the electrodes 5 and 7 is 0.3
If the thickness is smaller than 0.5 μm, there is a possibility that a portion not covered may occur. If the thickness is larger than 0.5 μm, the resistance of the conductor layer is almost completely reduced in consideration of the skin effect of the conductor in a high frequency region. It does not change.
【００２４】支持基板１としては、アルミナ、サファイ
ア、窒化アルミ、ＭｇＯ単結晶、ＳｒＴｉＯ3単結晶、
表面酸化シリコン、ガラス、石英等から選択されるもの
で特に限定されない。As the support substrate 1, alumina, sapphire, aluminum nitride, MgO single crystal, SrTiO 3 single crystal,
The material is selected from silicon oxide, glass, quartz, and the like, and is not particularly limited.
【００２５】絶縁性保護膜９は、例えば、Ｓｉ3Ｎ4、Ｓ
ｉＯ2、ポリイミド樹脂、ＢＣＢ（ベンゾシクロブテ
ン）等から構成されている。The insulating protective film 9 is made of, for example, Si 3 N 4 , S
It is composed of iO 2 , polyimide resin, BCB (benzocyclobutene) and the like.
【００２６】ハンダバリア層１３は、Ｔｉ、Ｃｒ、Ｎ
ｉ、Ｃｕ、Ｐｄ、Ｐｔ、およびこれらの金属から選ばれ
る２種以上からなる合金のうちいずれかからなり、スパ
ッタ、蒸着、メッキ等で形成可能であれば良い。ハンダ
バリア層１３の厚みは、ハンダバリアとしての機能を発
現するためには０．３μｍ以上の厚みであればよい。The solder barrier layer 13 is made of Ti, Cr, N
It may be made of any one of i, Cu, Pd, Pt, and an alloy of two or more selected from these metals, as long as it can be formed by sputtering, vapor deposition, plating, or the like. The thickness of the solder barrier layer 13 may be 0.3 μm or more in order to exhibit a function as a solder barrier.
【００２７】そして、下側電極５は外部端子１５ｂを取
り囲むように環状にエッチングされ、容量を形成する下
側電極５ａと、容量を形成せず、上側電極７に接続する
下側電極５ｂに分割されている。また、上側電極７は、
絶縁体層３上において、外部端子１５ａを取り囲むよう
に環状に形成されていない部分があり、容量を形成する
上側電極７ａと、容量を形成せず、下側電極５ａに接続
される上側電極７ｂに分割されている。上側電極７ａと
上側電極７ｂとの間には、絶縁ダム部１６が形成されて
いる。薄膜素子Ａは下側電極５ａと上側電極７ａによ
り、絶縁体層３を挟持して構成されている。下側電極５
ａと電気的に接続される外部端子１５ａ（貫通孔１１）
の周りの絶縁性保護膜９には、図１および図２に示すよ
うに、リング状の***部１７が形成されている。この隆
起部１７の形状は環状であれば良く、円形状、四角形状
等、特に限定されない。また、絶縁体層３は、絶縁体層
非形成領域Ｂを除く全面に、下側電極（金属層５ｂも含
む）５および上側電極（金属層７ｂも含む）７は、環状
にエッチングされた部分を除いて全面に形成されてい
る。The lower electrode 5 is circularly etched so as to surround the external terminal 15b, and is divided into a lower electrode 5a forming a capacitor and a lower electrode 5b connected to the upper electrode 7 without forming a capacitor. Have been. Also, the upper electrode 7
On the insulator layer 3, there is a portion that is not formed in a ring shape so as to surround the external terminal 15a, and an upper electrode 7a that forms a capacitor and an upper electrode 7b that does not form a capacitor and is connected to the lower electrode 5a Is divided into An insulating dam portion 16 is formed between the upper electrode 7a and the upper electrode 7b. The thin film element A is configured such that the insulator layer 3 is sandwiched between the lower electrode 5a and the upper electrode 7a. Lower electrode 5
external terminal 15a (through hole 11) electrically connected to a
As shown in FIGS. 1 and 2, a ring-shaped raised portion 17 is formed on the insulating protective film 9 around the periphery. The shape of the raised portion 17 may be an annular shape, and is not particularly limited, such as a circular shape or a square shape. In addition, the lower electrode (including the metal layer 5b) 5 and the upper electrode (including the metal layer 7b) 7 are formed in a circularly etched portion on the entire surface of the insulating layer 3 excluding the insulating layer non-forming region B. It is formed on the entire surface except for.
【００２８】この***部１７の高さｈは２μｍ以上であ
ることが望ましい。これは、極性の異なる電極間の障壁
の高さを十分に高くできるため、表面リーク電流の発生
を確実に防止できるからである。It is desirable that the height h of the raised portion 17 is 2 μm or more. This is because the height of the barrier between electrodes having different polarities can be made sufficiently high, so that the occurrence of surface leakage current can be reliably prevented.
【００２９】このような薄膜電子部品は、例えば、先
ず、図３（ａ）に示すように、支持基板１上に下側電極
５をスパッタ法により形成し、図３（ｂ）に示すよう
に、フォトリソグラフィ技術を用いて下側電極５をパタ
ーン加工し、上側電極７に接続される外部端子１５ｂの
周りに該当する部分を環状に除去し、下側電極５ａ、５
ｂを形成する。In such a thin film electronic component, for example, first, as shown in FIG. 3A, a lower electrode 5 is formed on a supporting substrate 1 by a sputtering method, and as shown in FIG. The lower electrode 5 is patterned using a photolithography technique, and a portion corresponding to the periphery of the external terminal 15b connected to the upper electrode 7 is removed in a ring shape.
b is formed.
【００３０】次に、図３（ｃ）に示すように、全面に、
例えば、ゾルゲル法にて合成した塗布溶液を塗布し、乾
燥させた後、熱処理して焼成し、絶縁体層３を形成す
る。この絶縁体層３を、フォトリソグラフィ技術を用い
て、図３（ｄ）に示すように、下側電極５が露出するよ
うに絶縁体層３を加工し、絶縁体層３に下側電極５が露
出する第１貫通孔２１および第２貫通孔２３を形成す
る。Next, as shown in FIG.
For example, a coating solution synthesized by a sol-gel method is applied, dried, and then heat-treated and fired to form the insulator layer 3. As shown in FIG. 3D, the insulator layer 3 is processed by photolithography so that the lower electrode 5 is exposed, and the lower electrode 5 is formed on the insulator layer 3. The first through-hole 21 and the second through-hole 23 from which are exposed are formed.
【００３１】そして、図３（ｅ）に示すように、第１貫
通孔２１の周りの絶縁体層３表面、即ち、下側電極５ａ
と接続される外部端子１５ａの周りに、例えば、感光性
のＢＣＢ樹脂を塗布し、環状の第１絶縁性保護膜２５を
形成する。この環状の第１絶縁性保護膜２５は、全面に
ＢＣＢ樹脂を塗布し、露光現像することにより形成で
き、絶縁ダム部１６となる。Then, as shown in FIG. 3E, the surface of the insulator layer 3 around the first through hole 21, that is, the lower electrode 5a
For example, a photosensitive BCB resin is applied around the external terminal 15a connected to the first terminal 15a to form an annular first insulating protective film 25. This annular first insulating protective film 25 can be formed by applying a BCB resin on the entire surface and performing exposure and development, thereby forming the insulating dam portion 16.
【００３２】次に、第１絶縁性保護膜２５表面、絶縁体
層３表面、並びに第１貫通孔２１および第２貫通孔２３
の内面に上側電極７を形成し、第１絶縁性保護膜２５表
面の上側電極７をフォトリソグラフィ技術を用いて除去
し、図３（ｆ）に示すような上側電極７ａ、７ｂを形成
する。Next, the surface of the first insulating protective film 25, the surface of the insulator layer 3, and the first and second through holes 21 and 23 are formed.
Is formed on the inner surface of the first insulating protective film 25, and the upper electrode 7 on the surface of the first insulating protective film 25 is removed by using a photolithography technique to form upper electrodes 7a and 7b as shown in FIG.
【００３３】この後、図３（ｇ）に示すように、上側電
極７および第１絶縁性保護膜２５の上面に、例えば、感
光性のＢＣＢ樹脂を塗布して第２絶縁性保護膜９を形成
する。これにより第１絶縁性保護膜２５が形成された部
分では、第２絶縁性保護膜９が***し、***部１７を形
成することになる。尚、第１絶縁性保護膜２５と第２絶
縁性保護膜９は一体となる。Thereafter, as shown in FIG. 3G, for example, a photosensitive BCB resin is applied on the upper surfaces of the upper electrode 7 and the first insulating protective film 25 to form a second insulating protective film 9. Form. As a result, in the portion where the first insulating protective film 25 is formed, the second insulating protective film 9 is raised to form the raised portion 17. Note that the first insulating protective film 25 and the second insulating protective film 9 are integrated.
【００３４】この後、図３（ｈ）に示すように、第２絶
縁性保護膜９における第１貫通孔２１および第２貫通孔
２３の形成位置に、露光、現像により上側電極７が露出
する貫通孔１１を形成し、この貫通孔１１内面に、図３
（ｉ）に示すように、例えば、蒸着法によりハンダバリ
ア層１３を形成し、例えば、スクリーン印刷を用いて共
晶半田ペーストを印刷し、リフローを行い、半田バンプ
からなる外部端子１５ａ、１５ｂを形成することによ
り、本発明の薄膜コンデンサが作製される。Thereafter, as shown in FIG. 3 (h), the upper electrode 7 is exposed at the positions where the first through holes 21 and the second through holes 23 are formed in the second insulating protective film 9 by exposure and development. A through hole 11 is formed, and an inner surface of the through hole 11 is formed as shown in FIG.
As shown in (i), for example, the solder barrier layer 13 is formed by a vapor deposition method, the eutectic solder paste is printed by using, for example, screen printing, and reflow is performed to form the external terminals 15a and 15b made of solder bumps. By forming, the thin film capacitor of the present invention is manufactured.
【００３５】本発明の基板は、図４に示すように、上記
のようにして構成された薄膜電子部品３０の外部端子１
５を、絶縁材料からなる基体３１の表面に形成された電
極３３に接続して構成されている。As shown in FIG. 4, the substrate according to the present invention comprises the external terminals 1 of the thin-film electronic component 30 constructed as described above.
5 is connected to an electrode 33 formed on the surface of a base 31 made of an insulating material.
【００３６】また、上記例では、本発明を薄膜コンデン
サに適用した例について説明したが、本発明では上記例
に限定されるものではなく、例えば、薄膜インダクタ、
薄膜ＬＣフィルタ、薄膜抵抗、薄膜ＲＣフィルタ、ある
いは、薄膜コンデンサ、薄膜インダクタ、薄膜ＬＣフィ
ルタ、薄膜抵抗、薄膜ＲＣフィルタを複合した薄膜複合
部品に適用しても良い。In the above example, an example in which the present invention is applied to a thin film capacitor has been described. However, the present invention is not limited to the above example.
The present invention may be applied to a thin film LC filter, a thin film resistor, a thin film RC filter, or a thin film composite component in which a thin film capacitor, a thin film inductor, a thin film LC filter, a thin film resistor, and a thin film RC filter are combined.
【００３７】また、上記例では、一層の絶縁体層を電極
で挟持した単板型を示したが、複数の絶縁体層と電極と
を交互に積層した積層型の薄膜コンデンサであっても良
い。In the above example, the single-plate type in which one insulating layer is sandwiched between the electrodes has been described. However, a laminated thin-film capacitor in which a plurality of insulating layers and electrodes are alternately stacked may be used. .
【００３８】さらに、本発明の薄膜電子部品では、半田
バンプからなる外部端子１５ａ、１５ｂを保護膜９の貫
通孔１１に設けた例について説明したが、本発明は上記
例に限定されるものではなく、要旨を変更しない範囲で
変更できる。Furthermore, in the thin-film electronic component of the present invention, an example has been described in which the external terminals 15a and 15b made of solder bumps are provided in the through holes 11 of the protective film 9, but the present invention is not limited to the above example. Can be changed without changing the gist.
【００３９】例えば、半田バンプを形成しない場合に
は、図５に示すように、保護膜９の貫通孔１１内に形成
されたハンダバリア層１３が外部端子となる。尚、図５
は、半田バンプからなる外部端子を設けない以外は、図
１と同一であるため同一符号を付した。For example, when no solder bump is formed, as shown in FIG. 5, the solder barrier layer 13 formed in the through hole 11 of the protective film 9 becomes an external terminal. FIG.
Is the same as that of FIG. 1 except that no external terminal made of a solder bump is provided, so that the same reference numerals are given.
【００４０】この場合には、母基板に実装する段階で導
電性部材により、母基板の表面電極とハンダバリア層１
３が接続される。導電性部材としては、形状的には、バ
ンプ状、箔状、板状、ワイヤ、ペースト状等があり、特
に限定されるものではなく、複数の形状を組合せても良
い。また、材質は、Ｐｂ、Ｓｎ、Ａｕ、Ｃｕ、Ｐｔ、Ｐ
ｄ、Ａｇ、Ａｌ、Ｎｉ、Ｂｉ、Ｉｎ、Ｓｂ、Ｚｎなどが
あり、導電性のものであれば良く、複数の材料を組合せ
ても良い。導電性樹脂であっても良い。In this case, at the stage of mounting on the mother board, the surface electrodes of the mother board and the solder barrier layer
3 are connected. The conductive member may be in a bump shape, a foil shape, a plate shape, a wire, a paste shape, or the like, and is not particularly limited. A plurality of shapes may be combined. The material is Pb, Sn, Au, Cu, Pt, P
There are d, Ag, Al, Ni, Bi, In, Sb, Zn, etc., as long as they are conductive, and a plurality of materials may be combined. It may be a conductive resin.
【００４１】尚、ハンダバリア層１３が形成されない場
合や、ハンダバリア層１３の上面に半田密着層が形成さ
れる場合には、保護膜９の貫通孔内に露出した層が外部
端子となる。When the solder barrier layer 13 is not formed, or when the solder adhesion layer is formed on the upper surface of the solder barrier layer 13, the layer exposed in the through hole of the protective film 9 becomes an external terminal.
【００４２】[0042]
【実施例】電極ならびにハンダバリア層の形成は高周波
マグネトロンスパッタ法にて、絶縁体層はゾルゲル法に
て作製した。EXAMPLE An electrode and a solder barrier layer were formed by a high-frequency magnetron sputtering method, and an insulator layer was formed by a sol-gel method.
【００４３】先ず、アルミナからなる支持基板上にＴｉ
からなる３ｎｍの密着層を形成し、この密着層の上面
に、０．３μｍのＡｕ層を形成し、密着層とＡｕ層から
なる下側電極とした。First, Ti is placed on a support substrate made of alumina.
Was formed, and a 0.3 μm Au layer was formed on the upper surface of the adhesion layer to form a lower electrode composed of the adhesion layer and the Au layer.
【００４４】フォトリソグラフィ技術を用いて下側電極
をパターン加工した。加工された下側電極に、ゾルゲル
法にて合成したＰｂ（Ｍｇ1/3Ｎｂ2/3）Ｏ3−ＰｂＴｉ
Ｏ3−ＰｂＺｒＯ3塗布溶液をスピンコート法を用いて塗
布し、乾燥させた後、３８０℃で熱処理、８１５℃で焼
成を行い、膜厚０．７μｍのＰｂ（Ｍｇ1/3Ｎｂ2/3）Ｏ
3−ＰｂＴｉＯ3−ＰｂＺｒＯ3からなる絶縁体層を形成
した。その後フォトリソグラフィ技術を用いて、下側電
極が露出するように、絶縁体層を加工し、第１貫通孔、
第２貫通孔を形成した。The lower electrode was patterned by photolithography. Pb (Mg 1/3 Nb 2/3 ) O 3 -PbTi synthesized by the sol-gel method was applied to the processed lower electrode.
An O 3 -PbZrO 3 coating solution is applied by spin coating, dried, and then heat-treated at 380 ° C. and baked at 815 ° C. to form a 0.7 μm-thick Pb (Mg 1/3 Nb 2/3) film. ) O
3 to form the -PbTiO insulator layer made of 3 -PbZrO 3. Then, using a photolithography technique, the insulator layer is processed so that the lower electrode is exposed, and the first through hole,
A second through hole was formed.
【００４５】次に感光性のＢＣＢ樹脂を絶縁体層上に塗
布・成膜し、上側電極の形成部分が露出するようなネガ
パターンで加工し、厚み２μｍの第１絶縁性保護膜（絶
縁ダム部）を形成した。Next, a photosensitive BCB resin is applied and formed on the insulator layer, processed in a negative pattern so that a portion where the upper electrode is formed is exposed, and formed into a first insulating protective film (insulating dam) having a thickness of 2 μm. Part).
【００４６】次に、絶縁体層表面、第１絶縁性保護膜表
面、第１貫通孔および第２貫通孔の内面に、膜厚３０ｎ
ｍのＴｉからなる密着層と膜厚０．３μｍのＡｕ層を形
成し、フォトリソグラフィ技術を用いて、第１絶縁性保
護膜表面のＡｕ層とＴｉ層を除去し、上側電極とした。Next, a 30-nm thick film is formed on the surface of the insulator layer, the surface of the first insulating protective film, and the inner surfaces of the first and second through holes.
An adhesion layer made of m Ti and an Au layer having a thickness of 0.3 μm were formed, and the Au layer and the Ti layer on the surface of the first insulating protective film were removed by using a photolithography technique to form an upper electrode.
【００４７】この後、再度光感光性ＢＣＢを全面に塗布
し、露光、現像を行い、上側電極のＡｕ層が露出するよ
うに、直径約１００μｍ、深さ１μｍの貫通孔を有する
第２絶縁性保護膜を形成した。この時点で、薄膜コンデ
ンサには、高さｈが２μｍの環状の***部が形成されて
いた。Thereafter, the photosensitive BCB is again applied to the entire surface, exposed and developed, and the second insulating film having a through hole having a diameter of about 100 μm and a depth of 1 μm is exposed so that the Au layer of the upper electrode is exposed. A protective film was formed. At this point, the thin film capacitor had an annular ridge having a height h of 2 μm.
【００４８】第２絶縁性保護膜上および貫通孔内に、膜
厚１．５μｍのハンダバリア層を形成し、この後、膜厚
０．１μｍの半田密着層Ａｕを形成し、貫通孔の内壁
面、および保護膜表面における貫通孔周囲が残留するよ
うに、貫通孔を中心に直径１２０μｍの形状にフォトリ
ソグラフィを用いて加工した。A 1.5 μm-thick solder barrier layer is formed on the second insulating protective film and in the through-hole, and then a 0.1 μm-thick solder adhesion layer Au is formed. Photolithography was used to form a shape having a diameter of 120 μm around the through hole so that the periphery of the through hole on the wall surface and the surface of the protective film remained.
【００４９】最後に、スクリーン印刷を用いて半田密着
層上にＰｂが６３重量％、Ｓｎが３７重量％からなる共
晶半田ペーストを転写し、リフローを行い、半田バンプ
からなる外部端子を形成し、図１に示したような薄膜コ
ンデンサを得た。Finally, a eutectic solder paste consisting of 63% by weight of Pb and 37% by weight of Sn was transferred onto the solder adhesion layer by screen printing, and reflow was performed to form external terminals consisting of solder bumps. Thus, a thin film capacitor as shown in FIG. 1 was obtained.
【００５０】得られた薄膜コンデンサの有効電極面積は
１．４ｍｍ2であり、周波数１ｋＨｚでの静電容量は約
４０ｎＦであった。The effective electrode area of the obtained thin film capacitor was 1.4 mm 2 , and the capacitance at a frequency of 1 kHz was about 40 nF.
【００５１】比較例として、図７に示した様な、第１絶
縁性保護膜を形成せず、上側電極の一部をエッチングす
ることにより異なる極性の電極間を離間した薄膜コンデ
ンサを作製した。この薄膜コンデンサには、環状の***
部は形成されなかった。As a comparative example, as shown in FIG. 7, a thin film capacitor in which the electrodes having different polarities were separated by etching a part of the upper electrode without forming the first insulating protective film was manufactured. No annular ridge was formed on this thin film capacitor.
【００５２】両者の構造の違いを比較するため、大気中
（室温・湿度６０％）でのリーク電流−電界強度との関
係を評価した。その結果を図６に示す。In order to compare the difference between the two structures, the relationship between the leak current and the electric field strength in the air (room temperature and humidity 60%) was evaluated. FIG. 6 shows the result.
【００５３】図６によると、本発明の薄膜コンデンサに
おいては、電界強度が約１００Ｖ／μｍで破壊するのに
対し、比較例の薄膜コンデンサでは、高々５０Ｖ／μｍ
と低く、かつバラツキも大きいことが判る。この様に、
本発明の薄膜コンデンサでは高い絶縁性を確保できるこ
とが判る。According to FIG. 6, the thin film capacitor of the present invention is broken at an electric field intensity of about 100 V / μm, while the thin film capacitor of the comparative example is at most 50 V / μm.
It can be seen that the variation is low and the variation is large. Like this
It can be seen that the thin film capacitor of the present invention can ensure high insulation.
【００５４】また、第１絶縁性保護膜の厚みを３μｍと
する以外は、上記と同様にして薄膜コンデンサを作製し
たところ、上記と同様高い破壊電圧強度を有していた。A thin-film capacitor was produced in the same manner as described above except that the thickness of the first insulating protective film was 3 μm, and had a high breakdown voltage strength as described above.
【００５５】[0055]
【発明の効果】以上の詳述したように、本発明によれ
ば、下側電極に電気的に接続される外部端子用の貫通孔
の周りに、予め環状の第１絶縁性保護膜（絶縁ダム部）
を形成し、この後、受動素子を形成する絶縁体層上、並
びに第１貫通孔および第２貫通孔の内面だけに上側電極
が形成されるよう、第１絶縁性保護膜上の上側電極のみ
がエッチング加工されるため、絶縁体層上の上側電極の
一部（極性の異なる電極間）をエッチング加工する必要
がなく、異なる極性の電極間を確実に絶縁することがで
き、エッチング残渣による異なる極性の電極間の表面リ
ーク電流の発生を防止でき、これに起因する絶縁不良を
防止できる。As described above in detail, according to the present invention, the first annular insulating protective film (insulating) is formed around the through-hole for the external terminal electrically connected to the lower electrode. Dam part)
Then, only the upper electrode on the first insulating protective film is formed so that the upper electrode is formed only on the insulator layer forming the passive element and on the inner surfaces of the first through hole and the second through hole. Is etched, it is not necessary to etch a part of the upper electrode (between electrodes having different polarities) on the insulator layer, it is possible to reliably insulate between electrodes having different polarities, It is possible to prevent the occurrence of surface leak current between polar electrodes, and to prevent insulation failure due to this.
【図１】本発明の薄膜電子部品の断面図である。FIG. 1 is a sectional view of a thin-film electronic component of the present invention.
【図２】図１の平面図である。FIG. 2 is a plan view of FIG.
【図３】本発明の薄膜電子部品の製法を説明するための
工程図である。FIG. 3 is a process chart for explaining a method for producing a thin-film electronic component of the present invention.
【図４】本発明の基板を示す断面図である。FIG. 4 is a sectional view showing a substrate of the present invention.
【図５】ハンダバリア層が外部端子となる場合の本発明
の薄膜電子部品を示す断面図である。FIG. 5 is a cross-sectional view showing a thin-film electronic component of the present invention when a solder barrier layer becomes an external terminal.
【図６】リーク電流−破壊電圧との関係を示すグラフで
ある。FIG. 6 is a graph showing a relationship between a leakage current and a breakdown voltage.
【図７】薄膜電子部品を示す断面図である。FIG. 7 is a cross-sectional view illustrating a thin-film electronic component.
１・・・支持基板 ３・・・絶縁体層 ５、７・・電極 ９・・・第２絶縁性保護膜 １１・・・貫通孔 １５・・・外部端子 １７・・・***部 １６・・・絶縁ダム部 ２１・・・第１貫通孔 ２３・・・第２貫通孔 ２５・・・第１絶縁性保護膜 ３０・・・薄膜コンデンサ ３１・・・基体 Ａ・・・薄膜素子 DESCRIPTION OF SYMBOLS 1 ... Support substrate 3 ... Insulator layer 5, 7 ... Electrode 9 ... 2nd insulating protective film 11 ... Through-hole 15 ... External terminal 17 ... Protruding part 16 ... Insulating dam part 21 first through hole 23 second through hole 25 first insulating protective film 30 thin film capacitor 31 base A thin film element
Claims (7)
る薄膜素子を設けるとともに、該薄膜素子を絶縁性保護
膜で被覆してなり、該絶縁性保護膜に、前記電極と電気
的に接続する外部電極が設けられる貫通孔を形成してな
る薄膜電子部品であって、前記貫通孔の周りの前記絶縁
性保護膜に環状の***部が形成されていることを特徴と
する薄膜電子部品。1. A thin-film device having an electrode and an insulator layer is provided on a supporting substrate, and the thin-film device is covered with an insulating protective film, and the insulating protective film is electrically connected to the electrode. A thin-film electronic component having a through-hole provided with an external electrode to be connected, wherein an annular ridge is formed in the insulating protective film around the through-hole. .
れた薄膜素子を設けるとともに、該薄膜素子を絶縁性保
護膜で被覆してなり、該絶縁性保護膜に、前記電極と電
気的に接続する外部端子が設けられる貫通孔を形成して
なる薄膜電子部品であって、前記貫通孔の周りの前記絶
縁体層上に、前記電極を分割する環状の絶縁ダム部が形
成されていることを特徴とする薄膜電子部品。2. A thin-film element having electrodes formed on an insulator layer is provided on a supporting substrate, and the thin-film element is covered with an insulating protective film. A thin-film electronic component formed with a through hole provided with an external terminal to be electrically connected, wherein an annular insulating dam portion for dividing the electrode is formed on the insulator layer around the through hole. A thin film electronic component characterized by the following.
端子が形成されており、該外部端子が絶縁性保護膜から
突出していることを特徴とする請求項１または２記載の
薄膜電子部品。3. The thin film according to claim 1, wherein an external terminal electrically connected to the electrode is formed in the through hole, and the external terminal protrudes from the insulating protective film. Electronic components.
徴とする請求項１記載の薄膜電子部品。4. The thin-film electronic component according to claim 1, wherein the height of the raised portion is 2 μm or more.
積層する工程と、前記絶縁体層に前記下側電極が露出す
る第１貫通孔および第２貫通孔を形成する工程と、前記
第１貫通孔の周りの前記絶縁体層表面に環状の第１絶縁
性保護膜を形成する工程と、前記絶縁体層上、並びに前
記第１貫通孔および第２貫通孔の内面に上側電極を形成
する工程と、該上側電極および前記第１絶縁性保護膜の
上面に第２絶縁性保護膜を形成する工程と、該第２絶縁
性保護膜における前記第１貫通孔および第２貫通孔の形
成位置に、前記上側電極と電気的に接続する外部端子が
設けられる貫通孔を形成する工程とを具備することを特
徴とする薄膜電子部品の製法。5. A step of sequentially laminating a lower electrode and an insulator layer on a support substrate, and a step of forming a first through hole and a second through hole exposing the lower electrode in the insulator layer. Forming a first annular insulative protective film on the surface of the insulator layer around the first through hole, and forming an upper portion on the insulator layer and on inner surfaces of the first and second through holes. Forming an electrode, forming a second insulating protective film on the upper electrode and the upper surface of the first insulating protective film, and forming the first through hole and the second through hole in the second insulating protective film. Forming a through hole at a position where the hole is to be formed, in which an external terminal electrically connected to the upper electrode is provided.
厚いことを特徴とする請求項５記載の薄膜電子部品の製
法。6. The method according to claim 5, wherein the thickness of the first insulating protective film is larger than that of the upper electrode.
乃至４のうちいずれかに記載の薄膜電子部品を設けてな
ることを特徴とする基板。7. The method according to claim 1, wherein the surface of the substrate made of an insulating material is provided on the surface of the substrate.
A substrate provided with the thin-film electronic component according to any one of claims 4 to 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000364769A JP3645808B2 (en) | 2000-03-29 | 2000-11-30 | Thin-film electronic component, its manufacturing method and substrate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000-92185 | 2000-03-29 | ||
| JP2000092185 | 2000-03-29 | ||
| JP2000364769A JP3645808B2 (en) | 2000-03-29 | 2000-11-30 | Thin-film electronic component, its manufacturing method and substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001345233A true JP2001345233A (en) | 2001-12-14 |
| JP3645808B2 JP3645808B2 (en) | 2005-05-11 |
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|---|---|---|---|
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110024066A (en) * | 2017-02-21 | 2019-07-16 | Tdk株式会社 | Thin film capacitor |
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2000
- 2000-11-30 JP JP2000364769A patent/JP3645808B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110024066A (en) * | 2017-02-21 | 2019-07-16 | Tdk株式会社 | Thin film capacitor |
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| Publication number | Publication date |
|---|---|
| JP3645808B2 (en) | 2005-05-11 |
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