JP2001189563A - Multilayer wiring board - Google Patents
Multilayer wiring boardInfo
- Publication number
- JP2001189563A JP2001189563A JP37164799A JP37164799A JP2001189563A JP 2001189563 A JP2001189563 A JP 2001189563A JP 37164799 A JP37164799 A JP 37164799A JP 37164799 A JP37164799 A JP 37164799A JP 2001189563 A JP2001189563 A JP 2001189563A
- Authority
- JP
- Japan
- Prior art keywords
- wiring layer
- connection conductor
- fine particles
- titanium oxide
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、複数の配線層を間
に絶縁層を介して積層させてなる多層配線基板に関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board having a plurality of wiring layers laminated with an insulating layer interposed therebetween.
【０００２】[0002]
【従来の技術】従来より、ＬＥＤアレイヘッド等のヘッ
ド基板を構成するのに多層配線基板が用いられている。2. Description of the Related Art Hitherto, a multilayer wiring board has been used for forming a head substrate such as an LED array head.
【０００３】かかる従来の多層配線基板は、例えば図３
に示す如く、ガラスやセラミック等から成る基板１１の
上面に、第１配線層１２及び第２配線層１３を、間に絶
縁層１４を介して順次積層してなり、第１配線層１２及
び第２配線層１３間に位置する絶縁層１４にスルーホー
ル１５を形成し、その内部に接続導体１６を充填させて
おくことにより第１配線層１２と第２配線層１３とを相
互に電気的に接続させるようにしている。[0003] Such a conventional multilayer wiring board is, for example, shown in FIG.
As shown in FIG. 1, a first wiring layer 12 and a second wiring layer 13 are sequentially laminated on an upper surface of a substrate 11 made of glass, ceramic, or the like via an insulating layer 14 therebetween. By forming a through hole 15 in the insulating layer 14 located between the two wiring layers 13 and filling the inside thereof with the connection conductor 16, the first wiring layer 12 and the second wiring layer 13 are electrically connected to each other. I try to connect.
【０００４】尚、前記第１配線層１２、第２配線層１３
及び接続導体１６の材質としては銀（Ａｇ）や金（Ａ
ｕ）等の導電材料が、また前記絶縁層１４の材質として
はガラス等が使用され、これらの層は導電ペーストやガ
ラスペーストを従来周知の厚膜手法、例えばスクリーン
印刷等を採用することによって基板１１の上面に印刷・
塗布し、これを高温で焼き付けることによって形成され
ていた。The first wiring layer 12 and the second wiring layer 13
And silver (Ag) or gold (A
u) or the like, and glass or the like is used as the material of the insulating layer 14. These layers are made of a conductive paste or a glass paste by using a conventionally known thick film method, for example, screen printing. Print on top of 11
It was formed by coating and baking it at a high temperature.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、この従
来の多層配線基板においては、絶縁層１４を形成するガ
ラス等の線膨張係数が０．５×１０-6／℃〜９×１０-6
／℃であるのに対し、接続導体１６を形成する銀や金等
の線膨張係数が１０×１０-6／℃〜３５×１０-6／℃と
比較的大きいことから、これらを前述の厚膜手法によっ
て形成すると、ペースト焼き付け後の冷却に伴う絶縁層
１４と接続導体１６との収縮量の相違に起因して接続導
体１６に大きな熱応力が印加されるとともに該応力によ
ってスルーホール１５内の接続導体１６に大きな亀裂が
生じ、その結果、第１配線層１２と第２配線層１３とを
良好に接続させておくことが不可となる欠点を有してい
た。However, in this conventional multilayer wiring board, the linear expansion coefficient of the glass or the like forming the insulating layer 14 is 0.5 × 10 −6 / ° C. to 9 × 10 −6.
/ ° C, whereas the coefficient of linear expansion of silver, gold, etc. forming the connection conductor 16 is relatively large, from 10 × 10 −6 / ° C to 35 × 10 −6 / ° C. When formed by the film method, a large thermal stress is applied to the connection conductor 16 due to a difference in the amount of shrinkage between the insulating layer 14 and the connection conductor 16 due to the cooling after baking of the paste, and the stress in the through hole 15 is generated by the stress. A large crack was generated in the connection conductor 16, and as a result, there was a disadvantage that it was impossible to connect the first wiring layer 12 and the second wiring layer 13 well.
【０００６】[0006]
【課題を解決するための手段】本発明は上記欠点に鑑み
案出されたもので、本発明の多層配線基板は、基板の上
面に、第１配線層及び第２配線層を間に絶縁層を介して
順次積層するとともに、前記第１配線層及び第２配線層
を絶縁層に設けたスルーホール内の接続導体により電気
的に接続した多層配線基板において、前記接続導体中
に、酸化チタン微粒子を０．２ｗｔ％〜６．０ｗｔ％含
有させたことを特徴とするものである。SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and a multilayer wiring board according to the present invention has a first wiring layer and a second wiring layer interposed on an upper surface of the substrate. A multi-layer wiring board in which the first wiring layer and the second wiring layer are electrically connected by connection conductors in through holes provided in an insulating layer, wherein the connection conductors include titanium oxide fine particles. Is contained in an amount of 0.2 wt% to 6.0 wt%.
【０００７】また本発明の多層配線基板は、前記酸化チ
タン微粒子の粒径が０．０５μｍ〜５．０μｍであるこ
とを特徴とするものである。The multilayer wiring board of the present invention is characterized in that the titanium oxide fine particles have a particle size of 0.05 μm to 5.0 μm.
【０００８】更に本発明の多層配線基板は、前記酸化チ
タン微粒子が、接続導体の中央域に比し周辺域に数多く
分布していることを特徴とするものである。Further, the multilayer wiring board of the present invention is characterized in that the titanium oxide fine particles are distributed more in the peripheral area than in the central area of the connection conductor.
【０００９】[0009]
【発明の実施の形態】以下、本発明を添付図面に基づい
て詳細に説明する。図１は本発明の一形態に係る多層配
線基板の断面図、図２は図１の要部を模式的に示す拡大
図であり、１は基板、２は第１配線層、３は第２配線
層、４は絶縁層、５はスルーホール、６は接続導体、７
は酸化チタン微粒子である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view of a multilayer wiring board according to one embodiment of the present invention, and FIG. 2 is an enlarged view schematically showing a main part of FIG. 1, wherein 1 is a substrate, 2 is a first wiring layer, and 3 is a second wiring layer. Wiring layer, 4 is insulating layer, 5 is through hole, 6 is connection conductor, 7
Is titanium oxide fine particles.
【００１０】前記基板１は、アルミナセラミックス、ム
ライト、窒化アルミニウム、ガラスセラミックス、石
英、アルカリガラス、無アルカリガラス等の電気絶縁性
材料から成り、その上面で第１配線層２、絶縁層４、第
２配線層３等を支持するための支持母材として機能す
る。The substrate 1 is made of an electrically insulating material such as alumina ceramics, mullite, aluminum nitride, glass ceramics, quartz, alkali glass, non-alkali glass, etc., and has a first wiring layer 2, an insulating layer 4, It functions as a supporting base material for supporting the two wiring layers 3 and the like.
【００１１】尚、前記基板１は、例えばアルミナセラミ
ックスから成る場合、アルミナ、シリカ、マグネシア等
のセラミックス原料粉末に適当な有機溶剤、溶媒を添加
・混合して泥漿状になすとともに、これを従来周知のド
クターブレード法やカレンダーロール法等を採用するこ
とによってセラミックグリーンシート（セラミック生シ
ート）を得、しかる後、該グリーンシートを所定形状に
打ち抜いた上、高温（約１６００℃）で焼成することに
より製作される。When the substrate 1 is made of, for example, alumina ceramics, an appropriate organic solvent and a solvent are added to and mixed with a ceramic raw material powder of alumina, silica, magnesia or the like to form a slurry. A ceramic green sheet (ceramic green sheet) is obtained by employing a doctor blade method, a calendar roll method, or the like, and thereafter, the green sheet is punched into a predetermined shape and fired at a high temperature (about 1600 ° C.). Be produced.
【００１２】また前記基板１の上面には、複数個の第１
配線層２と、複数個の第２配線層３とが、間に絶縁層４
を介して被着・積層される。On the upper surface of the substrate 1, a plurality of first
The wiring layer 2 and the plurality of second wiring layers 3 have an insulating layer 4 therebetween.
Is applied and laminated.
【００１３】前記第１配線層２及び第２配線層３は、銀
や金、或いは、これらの合金等によって各々が所定パタ
ーンをなすように形成されており、両配線層２，３は後
述する接続導体６を介して相互に電気的に接続されるよ
うになっている。The first wiring layer 2 and the second wiring layer 3 are formed of silver, gold, an alloy thereof, or the like so as to form a predetermined pattern, and both wiring layers 2 and 3 will be described later. They are electrically connected to each other via the connection conductor 6.
【００１４】前記第１配線層２及び第２配線層４は、従
来周知の厚膜手法を採用することによって基板１の上面
及び絶縁層４の上面にそれぞれ被着・形成される。即
ち、第１配線層２は、例えば銀粉末に適当な有機溶媒・
溶剤を添加・混合して得た導電ペーストを基板１の上面
に従来周知のスクリーン印刷等によって印刷・塗布した
上、高温（３５０℃〜８００℃）で焼き付けることによ
って形成され、また第２配線層３は、第１配線層２の形
成に用いたのと同様の導電ペーストを絶縁層４の上面に
従来周知のスクリーン印刷等によって印刷・塗布した
上、高温（３５０℃〜８００℃）で焼き付けることによ
って形成される。The first wiring layer 2 and the second wiring layer 4 are respectively attached and formed on the upper surface of the substrate 1 and the upper surface of the insulating layer 4 by employing a conventionally known thick film method. That is, the first wiring layer 2 is made of, for example, an organic solvent
A conductive paste obtained by adding and mixing a solvent is formed by printing and applying on the upper surface of the substrate 1 by conventionally known screen printing or the like, and then baking at a high temperature (350 ° C. to 800 ° C.). 3 is to print and apply the same conductive paste as that used for forming the first wiring layer 2 on the upper surface of the insulating layer 4 by a conventionally known screen printing or the like, and then bake it at a high temperature (350 ° C. to 800 ° C.). Formed by
【００１５】尚、これら配線層２，３の線膨張係数は、
銀を主成分とする導電材料から成る場合、１０×１０-6
／℃〜１２×１０-6／℃となる。The linear expansion coefficients of these wiring layers 2 and 3 are as follows:
10 × 10 -6 when made of a conductive material containing silver as a main component
/ ° C. to 12 × 10 −6 / ° C.
【００１６】一方、前記第１配線層２と前記第２配線層
３の間に介在される絶縁層４は、第１配線層２と第２配
線層３とを電気的に絶縁するためのものであり、０．５
×１０-6／℃〜９×１０-6／℃の線膨張係数をもった珪
酸塩ガラス等によって形成される。On the other hand, the insulating layer 4 interposed between the first wiring layer 2 and the second wiring layer 3 serves to electrically insulate the first wiring layer 2 from the second wiring layer 3. And 0.5
It is formed of a silicate glass or the like having a linear expansion coefficient of × 10 −6 / ° C. to 9 × 10 −6 / ° C.
【００１７】また前記絶縁層４には、その所定箇所、具
体的には、電気的に接続される配線層同士２，３が交差
する箇所にスルーホール５を有しており、該各スルーホ
ール５の内部には接続導体６が充填されている。The insulating layer 4 has through-holes 5 at predetermined locations, specifically, at locations where the electrically connected wiring layers 2 and 3 intersect each other. 5 is filled with a connection conductor 6.
【００１８】前記スルーホール５は、第１配線層２及び
第２配線層３の線幅が５０μｍの場合、その１．５倍〜
８倍に相当する７５μｍ〜４００μｍ程度の径を有した
円形状に形成されており、その内部で接続導体６を保持
するようになっている。When the line width of the first wiring layer 2 and the second wiring layer 3 is 50 μm, the through hole 5 is 1.5 times as large as that of the first wiring layer 2 and the second wiring layer 3.
It is formed in a circular shape having a diameter of about 75 μm to 400 μm corresponding to eight times, and holds the connection conductor 6 therein.
【００１９】尚、前記絶縁層４は、珪酸塩ガラスから成
る場合、珪酸塩ガラスの粉末に適当な有機溶媒・溶剤を
添加・混合して得たガラスペーストを従来周知の厚膜手
法、例えばスクリーン印刷等によって、スルーホール５
の形成箇所を除く基板１の上面全体にわたって印刷・塗
布し、これを高温で焼き付けることにより形成される。When the insulating layer 4 is made of silicate glass, a glass paste obtained by adding and mixing an appropriate organic solvent / solvent to silicate glass powder is applied to a conventionally known thick film method, for example, a screen. Through-hole 5 by printing etc.
Is formed by printing and applying over the entire upper surface of the substrate 1 excluding the formation location of, and baking it at a high temperature.
【００２０】また前記絶縁層４のスルーホール５内に充
填される接続導体６は、先に述べた第１配線層２や第２
配線層３と同様の材質、即ち、銀や金、或いは、これら
の合金等により形成され、その下面側で第１配線層２
と、上面側で第２配線層３と接触することにより両配線
層２，３を電気的に接続するようになっている。The connection conductor 6 filled in the through hole 5 of the insulating layer 4 is formed by the first wiring layer 2 and the second
The first wiring layer 2 is formed of the same material as the wiring layer 3, that is, silver, gold, or an alloy thereof.
Then, both wiring layers 2 and 3 are electrically connected by contacting the second wiring layer 3 on the upper surface side.
【００２１】尚、前記接続導体６は、例えば銀粉末に適
当な有機溶媒・溶剤を添加・混合して得た導電ペースト
を絶縁層４のスルーホール５内にスクリーン印刷等によ
って印刷・充填し、これを高温（３５０℃〜６００℃）
で焼き付けることにより形成され、得られた接続導体６
の導体部分の弾性率は６．９×１０10Ｐａ〜８．０×１
０10Ｐａの大きな値となる。The connection conductor 6 is printed and filled with a conductive paste obtained by, for example, adding and mixing an appropriate organic solvent and solvent to silver powder into the through hole 5 of the insulating layer 4 by screen printing or the like. High temperature (350 ° C to 600 ° C)
The connection conductor 6 formed by baking with
The elastic modulus of the conductor portion of 6.9 × 10 10 Pa to 8.0 × 1
This is a large value of 0 10 Pa.
【００２２】そして前記接続導体６には、これを形成す
る銀や金等の金属よりも低い弾性率（４．３×１０10Ｐ
ａ〜５．２×１０10Ｐａ）をもった酸化チタン微粒子７
が０．２ｗｔ％〜６．０ｗｔ％だけ含有される。The connection conductor 6 has an elastic modulus (4.3 × 10 10 P) lower than that of a metal such as silver or gold which forms the connection conductor 6.
a to 5.2 × 10 10 Pa) titanium oxide fine particles 7
Is contained in an amount of 0.2 wt% to 6.0 wt%.
【００２３】このように、前記接続導体６中に弾性率の
低い酸化チタン微粒子７を０．２ｗｔ％〜６．０ｗｔ％
含有させることにより、絶縁層４や第１配線層２，第２
配線層３，接続導体８等を従来周知の厚膜手法によって
形成する際、ガラスペーストや導電ペーストを焼き付け
た後の冷却に伴って接続導体６と絶縁層４との収縮量の
相違に起因する熱応力が印加されても、該応力を酸化チ
タン微粒子７の変形によって良好に緩和・吸収すること
ができ、これによって接続導体６の亀裂を皆無とし、第
１配線層２と第２配線層３とを良好な状態で電気的に接
続させておくことが可能となる。As described above, the titanium oxide fine particles 7 having a low elastic modulus are contained in the connection conductor 6 in an amount of 0.2 wt% to 6.0 wt%.
By containing it, the insulating layer 4, the first wiring layer 2, and the second
When the wiring layer 3, the connection conductor 8, and the like are formed by a conventionally known thick film method, the difference is caused by a difference in shrinkage between the connection conductor 6 and the insulating layer 4 with cooling after baking a glass paste or a conductive paste. Even if a thermal stress is applied, the stress can be favorably alleviated and absorbed by the deformation of the titanium oxide fine particles 7, thereby eliminating cracks in the connection conductor 6, and removing the first wiring layer 2 and the second wiring layer 3. Can be electrically connected in a good state.
【００２４】尚、前記酸化チタン微粒子７の含有率が
０．２ｗｔ％よりも小さいと、絶縁層４や第１配線層
２，第２配線層３等を従来周知の厚膜手法によって形成
する際、接続導体６に印加される熱応力を十分に緩和す
ることができず、また含有率が６．０ｗｔ％よりも大き
いと、接続導体６の導電抵抗が大きくなるので、接続導
体６に通電した際、この部分で失われる電力が極めて大
となる不都合を生じる。If the content of the titanium oxide fine particles 7 is less than 0.2 wt%, the insulating layer 4, the first wiring layer 2, the second wiring layer 3 and the like may be formed by a conventionally known thick film method. When the thermal stress applied to the connection conductor 6 cannot be sufficiently reduced, and when the content is more than 6.0 wt%, the conduction resistance of the connection conductor 6 increases, so that the connection conductor 6 is energized. In this case, there is a disadvantage that the power lost in this portion is extremely large.
【００２５】従って前記接続導体６中に存在する酸化チ
タン微粒子７の含有率は０．２ｗｔ％〜６．０ｗｔ％の
範囲内に設定する必要がある。Therefore, the content of the titanium oxide fine particles 7 present in the connection conductor 6 needs to be set in the range of 0.2 wt% to 6.0 wt%.
【００２６】また前記酸化チタン微粒子７を、接続導体
６の中央域に比し周辺域に数多く分布させておけば、熱
応力が極大となる絶縁層４と接続導体６との界面付近に
酸化チタン微粒子７が集中する形となるため、応力をよ
り効果的に吸収・緩和することができる利点がある。If the titanium oxide fine particles 7 are distributed more in the peripheral area than in the central area of the connection conductor 6, the titanium oxide fine particles 7 are located near the interface between the insulating layer 4 and the connection conductor 6 where the thermal stress becomes maximum. Since the fine particles 7 are concentrated, there is an advantage that stress can be more effectively absorbed and reduced.
【００２７】従って、前記酸化チタン微粒子７は、接続
導体６の中央域に比し周辺域に数多く分布させておくこ
とが好ましい。Therefore, it is preferable that the titanium oxide fine particles 7 are distributed more in the peripheral region than in the central region of the connection conductor 6.
【００２８】前記酸化チタン微粒子７としては、粒径
０．０５μｍ〜５．０μｍのものが好適に使用され、該
酸化チタン微粒子７はチタン（Ｔｉ）から成る金属微粒
子を約３５０℃の比較的低い温度で所定時間加熱し、こ
れを酸化させることにより形成される。As the titanium oxide fine particles 7, those having a particle size of 0.05 μm to 5.0 μm are preferably used, and the titanium oxide fine particles 7 are made of metal fine particles made of titanium (Ti) at a relatively low temperature of about 350 ° C. It is formed by heating at a temperature for a predetermined time and oxidizing it.
【００２９】尚、上述の酸化チタン微粒子７は、接続導
体６を前述の厚膜手法によって形成する際に同時に形成
することもできる。The above-mentioned titanium oxide fine particles 7 can be formed simultaneously with the formation of the connection conductor 6 by the above-mentioned thick film method.
【００３０】例えば、接続導体６となる導電ペースト中
に、チタン微粒子（粒径：０．０５μｍ〜５．０μｍ）
を０．１５ｗｔ％〜４．５ｗｔ％だけ添加・混合させて
おき、これらチタン微粒子の一部もしくは全部を導電ペ
ーストを焼き付ける際に大気中の酸素等と化学反応させ
て酸化することにより酸化チタン微粒子７が接続導体６
中に分散された状態で形成されることとなるまた前記酸
化チタン微粒子７を接続導体６の中央域に比し周辺域に
数多く分布させるには、接続導体６を上述の厚膜手法に
よって形成する際、チタン微粒子の含有率を異ならせた
２種類の導電ペーストを準備し、チタン微粒子の含有率
が低い導電ペーストをチタン微粒子の含有率が高い導電
ペーストで覆うようにして、これらをスルーホール５内
に充填させることにより実現される。For example, titanium fine particles (particle size: 0.05 μm to 5.0 μm) are contained in the conductive paste to be the connection conductor 6.
Is added and mixed in an amount of 0.15 wt% to 4.5 wt%, and when a part or all of the titanium fine particles are baked with a conductive paste, they are chemically reacted with oxygen in the air and oxidized to oxidize the titanium fine particles. 7 is connection conductor 6
In order to distribute the titanium oxide fine particles 7 more in the peripheral area than in the central area of the connection conductor 6, the connection conductor 6 is formed by the above-mentioned thick film method. At this time, two types of conductive pastes having different contents of the titanium fine particles are prepared, and the conductive paste having a low content of the titanium fine particles is covered with the conductive paste having a high content of the titanium fine particles. It is realized by filling inside.
【００３１】尚、本発明は上述の形態に限定されるもの
ではなく、本発明の要旨を逸脱しない範囲において種々
の変更、改良等が可能である。The present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the gist of the present invention.
【００３２】例えば上述の形態では配線層を２層積層さ
せた多層配線基板について説明したが、本発明は配線層
を３層以上積層させた多層配線基板にも適用可能であ
る。For example, in the above embodiment, a multilayer wiring board in which two wiring layers are stacked has been described, but the present invention is also applicable to a multilayer wiring board in which three or more wiring layers are stacked.
【００３３】[0033]
【実験例】次に本発明の作用効果について実験例に基づ
き説明する。まず、銀を主成分とする径２５０μｍ、厚
み３０μｍの接続導体６中に平均粒径１．０μｍの酸化
チタン微粒子７を所定量ずつ含有させた14種類の多層配
線基板サンプル（サンプルNo.1〜12）を準備した。[Experimental Example] Next, the operation and effect of the present invention will be described based on an experimental example. First, 14 types of multilayer wiring board samples (sample Nos. 1 to 4) each containing a predetermined amount of titanium oxide fine particles 7 having an average particle diameter of 1.0 μm in a connection conductor 6 having a diameter of 250 μm and a thickness of 30 μm mainly containing silver. 12) was prepared.
【００３４】これらのサンプルNo.1〜12は、銀を主成分
とする第１配線層２、硼珪酸ガラスから成る絶縁層４
（線膨張率：８．２×１０-6／℃）、銀を主成分とする
第２配線層３、前述の接続導体６を全て厚膜手法によっ
て形成したものであり、各層の材質、ペースト焼き付け
時の温度条件等は全て同じに揃え、接続導体６中に存在
する酸化チタン微粒子７の含有率のみを０．１０ｗｔ％
〜７．００ｗｔ％の範囲内で異ならせるようにした。These sample Nos. 1 to 12 are composed of a first wiring layer 2 mainly composed of silver and an insulating layer 4 made of borosilicate glass.
(Linear expansion coefficient: 8.2 × 10 −6 / ° C.), the second wiring layer 3 containing silver as a main component, and the above-described connection conductor 6 are all formed by a thick film method, and the material and paste of each layer The temperature conditions at the time of baking were all the same, and only the content of the titanium oxide fine particles 7 present in the connection conductor 6 was 0.10 wt%.
The difference was made within the range of ~ 7.00 wt%.
【００３５】前記サンプルNo.1〜12について、接続導体
６における亀裂の発生の有無を確認するとともに接続導
体６の導電抵抗を測定した結果を表１に示す。Table 1 shows the results of confirming the occurrence of cracks in the connection conductors 6 and measuring the conductive resistance of the connection conductors 6 for the samples Nos. 1 to 12.
【００３６】[0036]
【表１】 [Table 1]
【００３７】この表１によれば、酸化チタン微粒子７の
含有率が０．２０ｗｔ％未満であるサンプルNo.1,No.2
では接続導体６に亀裂を生じていることが確認され、導
電抵抗は測定できなかった。According to Table 1, Samples No. 1 and No. 2 in which the content of titanium oxide fine particles 7 is less than 0.20 wt%
As a result, it was confirmed that a crack had occurred in the connection conductor 6, and the conductive resistance could not be measured.
【００３８】また酸化チタン微粒子７の含有率が６．０
０ｗｔ％よりも大きいサンプルNo.11,No.12 はいずれの
導電抵抗も３ｍΩ以上と大きく、この部分で電力が大き
く損失されてしまっている。The content of the titanium oxide fine particles 7 is 6.0.
Samples No. 11 and No. 12 larger than 0 wt% both have a large conductive resistance of 3 mΩ or more, and the power is greatly lost in this portion.
【００３９】これに対し、酸化チタン微粒子７の含有率
を０．２０ｗｔ％〜６．００ｗｔ％に設定したサンプル
No.3〜No.10 では、接続導体６に亀裂を生じたものは一
切なく、また導電抵抗についても０．８６ｍΩ〜２．７
３ｍΩと比較的小さく、この部分での電力の損失は少な
い。On the other hand, a sample in which the content of the titanium oxide fine particles 7 was set to 0.20 wt% to 6.00 wt%.
In Nos. 3 to 10, there were no cracks in the connection conductor 6, and the conductive resistance was 0.86 mΩ to 2.7.
It is relatively small at 3 mΩ, and power loss in this portion is small.
【００４０】従って、上述した実験結果によれば、スル
ーホール５内の接続導体６に亀裂を生じさせることな
く、その導電抵抗を十分に低く保つためには、接続導体
６中に含有させる酸化チタン微粒子７の含有率を０．２
ｗｔ％〜６．０ｗｔ％に設定しなければならないことが
判る。Therefore, according to the experimental results described above, in order to keep the conductive resistance sufficiently low without causing cracks in the connection conductor 6 in the through hole 5, the titanium oxide contained in the connection conductor 6 When the content of the fine particles 7 is 0.2
It can be seen that the content must be set in the range of wt% to 6.0 wt%.
【００４１】[0041]
【発明の効果】本発明の多層配線基板によれば、基板の
上面に、第１配線層及び第２配線層を間に絶縁層を介し
て順次積層するとともに、前記第１配線層及び第２配線
層を絶縁層に設けたスルーホール内の接続導体により電
気的に接続した多層配線基板において、前記接続導体中
に、酸化チタン微粒子を０．２ｗｔ％〜６．０ｗｔ％含
有させたことから、絶縁層や接続導体等を従来周知の厚
膜手法によって形成する際、ガラスペーストや導電ペー
ストを焼き付けた後の冷却に伴って接続導体と絶縁層と
の収縮量の相違に起因する熱応力が印加されても、該応
力を酸化チタン微粒子の変形によって良好に緩和・吸収
することができ、接続導体の亀裂を皆無として第１配線
層と第２配線層とを良好な状態で電気的に接続させてお
くことが可能となる。According to the multilayer wiring board of the present invention, the first wiring layer and the second wiring layer are sequentially laminated on the upper surface of the substrate with an insulating layer interposed therebetween, and the first wiring layer and the second wiring layer are stacked. In the multilayer wiring board in which the wiring layer is electrically connected by the connection conductor in the through hole provided in the insulating layer, since the connection conductor contains titanium oxide fine particles in an amount of 0.2 wt% to 6.0 wt%, When forming an insulating layer or a connecting conductor by a conventionally known thick film method, thermal stress due to a difference in shrinkage between the connecting conductor and the insulating layer is applied with cooling after baking a glass paste or a conductive paste. Even when the stress is applied, the stress can be satisfactorily relaxed and absorbed by the deformation of the titanium oxide fine particles, and the first wiring layer and the second wiring layer can be electrically connected in a good state without cracking of the connection conductor. It is possible to keep .
【００４２】また本発明の多層配線基板によれば、前記
酸化チタン微粒子を接続導体の中央域に比し周辺域に数
多く分布させることにより、上述の熱応力が極大となる
両者の界面付近に前述の酸化チタン微粒子を集中させた
形となり、応力をより効果的に吸収・緩和することがで
きる。According to the multilayer wiring board of the present invention, the titanium oxide fine particles are distributed more in the peripheral area than in the central area of the connection conductor, so that the above-mentioned interface is formed near the interface between the two where the thermal stress is maximized. Of titanium oxide particles are concentrated, and stress can be more effectively absorbed and reduced.
【図１】本発明の一形態に係る多層配線基板の断面図で
ある。FIG. 1 is a cross-sectional view of a multilayer wiring board according to one embodiment of the present invention.
【図２】図１の要部を模式的に示す拡大図である。FIG. 2 is an enlarged view schematically showing a main part of FIG.
【図３】従来の多層配線基板の断面図である。FIG. 3 is a sectional view of a conventional multilayer wiring board.
１・・・基板、２・・・第１配線層、３・・・第２配線
層、４・・・絶縁層、５・・・スルーホール、６・・・
接続導体、７・・・酸化チタン微粒子DESCRIPTION OF SYMBOLS 1 ... board | substrate, 2 ... 1st wiring layer, 3 ... 2nd wiring layer, 4 ... insulating layer, 5 ... through-hole, 6 ...
Connection conductor, 7 ... titanium oxide fine particles
───────────────────────────────────────────────────── フロントページの続き Ｆターム(参考） 4E351 AA07 BB01 BB31 BB49 CC12 CC22 DD05 DD06 DD11 DD21 DD31 EE11 EE24 EE27 GG03 5E317 AA24 BB04 BB13 BB14 BB18 CC25 CD21 GG05 GG16 5E346 AA42 CC31 DD34 EE18 EE32 FF18 FF23 HH02 HH07 HH16 HH31 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4E351 AA07 BB01 BB31 BB49 CC12 CC22 DD05 DD06 DD11 DD21 DD31 EE11 EE24 EE27 GG03 5E317 AA24 BB04 BB13 BB14 BB18 CC25 CD21 GG05 GG16 5E346 AA42 CC31 DD34 EE18H32 H31 H
Claims (3)
を間に絶縁層を介して順次積層するとともに、前記第１
配線層及び第２配線層を絶縁層に設けたスルーホール内
の接続導体により電気的に接続した多層配線基板におい
て、 前記接続導体中に、酸化チタン微粒子を０．２ｗｔ％〜
６．０ｗｔ％含有させたことを特徴とする多層配線基
板。A first wiring layer and a second wiring layer are sequentially laminated on an upper surface of a substrate via an insulating layer between the first wiring layer and the second wiring layer.
In a multilayer wiring board in which a wiring layer and a second wiring layer are electrically connected by a connection conductor in a through hole provided in an insulating layer, the connection conductor contains titanium oxide fine particles in an amount of 0.2 wt% or less.
A multilayer wiring board characterized by containing 6.0 wt%.
ｍ〜５．０μｍであることを特徴とする請求項１に記載
の多層配線基板。2. The titanium oxide fine particles have a particle size of 0.05 μm.
2. The multilayer wiring board according to claim 1, wherein the thickness is from m to 5.0 [mu] m.
域に比し周辺域に数多く分布していることを特徴とする
請求項１に記載の多層配線基板。3. The multilayer wiring board according to claim 1, wherein the titanium oxide fine particles are distributed more in the peripheral area than in the central area of the connection conductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP37164799A JP2001189563A (en) | 1999-12-27 | 1999-12-27 | Multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP37164799A JP2001189563A (en) | 1999-12-27 | 1999-12-27 | Multilayer wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001189563A true JP2001189563A (en) | 2001-07-10 |
Family
ID=18499068
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP37164799A Pending JP2001189563A (en) | 1999-12-27 | 1999-12-27 | Multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001189563A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8748922B2 (en) | 2007-09-04 | 2014-06-10 | Koninklijke Philips N.V. | Light output device |
| JP2016086057A (en) * | 2014-10-24 | 2016-05-19 | 富士通株式会社 | Wiring structure |
-
1999
- 1999-12-27 JP JP37164799A patent/JP2001189563A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8748922B2 (en) | 2007-09-04 | 2014-06-10 | Koninklijke Philips N.V. | Light output device |
| JP2016086057A (en) * | 2014-10-24 | 2016-05-19 | 富士通株式会社 | Wiring structure |
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