JP2001117858A5 - - Google Patents
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- Publication number
- JP2001117858A5 JP2001117858A5 JP2000273376A JP2000273376A JP2001117858A5 JP 2001117858 A5 JP2001117858 A5 JP 2001117858A5 JP 2000273376 A JP2000273376 A JP 2000273376A JP 2000273376 A JP2000273376 A JP 2000273376A JP 2001117858 A5 JP2001117858 A5 JP 2001117858A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US153391 | 1988-02-08 | ||
| US15339199P | 1999-09-10 | 1999-09-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001117858A JP2001117858A (ja) | 2001-04-27 |
| JP2001117858A5 true JP2001117858A5 (ja) | 2007-10-25 |
Family
ID=22547026
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000273376A Abandoned JP2001117858A (ja) | 1999-09-10 | 2000-09-08 | データ処理装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6694385B1 (ja) |
| EP (1) | EP1083487A3 (ja) |
| JP (1) | JP2001117858A (ja) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020112084A1 (en) * | 2000-12-29 | 2002-08-15 | Deen Gary D. | Methods, systems, and computer program products for controlling devices through a network via a network translation device |
| US7248597B2 (en) | 2001-05-02 | 2007-07-24 | Nvidia Corporation | General purpose input/output controller |
| US20040019777A1 (en) * | 2002-06-14 | 2004-01-29 | Wygant Laurance F. | Sharing data using a configuration register |
| US7114041B2 (en) * | 2002-12-20 | 2006-09-26 | Lsi Logic Corporation | AMBA modular memory controller |
| US7403573B2 (en) * | 2003-01-15 | 2008-07-22 | Andrew Corporation | Uncorrelated adaptive predistorter |
| US7500129B2 (en) | 2004-10-29 | 2009-03-03 | Hoffman Jeffrey D | Adaptive communication interface |
| US7735037B2 (en) | 2005-04-15 | 2010-06-08 | Rambus, Inc. | Generating interface adjustment signals in a device-to-device interconnection system |
| US7802212B2 (en) * | 2005-04-15 | 2010-09-21 | Rambus Inc. | Processor controlled interface |
| US7603487B2 (en) * | 2005-05-13 | 2009-10-13 | Texas Instruments Incorporated | Hardware configurable hub interface unit |
| US7555424B2 (en) * | 2006-03-16 | 2009-06-30 | Quickturn Design Systems, Inc. | Method and apparatus for rewinding emulated memory circuits |
| US7971036B2 (en) * | 2006-04-26 | 2011-06-28 | Altera Corp. | Methods and apparatus for attaching application specific functions within an array processor |
| GB2495959A (en) | 2011-10-26 | 2013-05-01 | Imagination Tech Ltd | Multi-threaded memory access processor |
| GB2497525A (en) * | 2011-12-12 | 2013-06-19 | St Microelectronics Ltd | Controlling shared memory data flow |
| US9136842B2 (en) * | 2013-06-07 | 2015-09-15 | Altera Corporation | Integrated circuit device with embedded programmable logic |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3675209A (en) * | 1970-02-06 | 1972-07-04 | Burroughs Corp | Autonomous multiple-path input/output control system |
| JPS5580164A (en) * | 1978-12-13 | 1980-06-17 | Fujitsu Ltd | Main memory constitution control system |
| US4775931A (en) | 1984-05-11 | 1988-10-04 | Hewlett-Packard Company | Dynamically configured computing device |
| US4885683A (en) * | 1985-09-27 | 1989-12-05 | Unisys Corporation | Self-testing peripheral-controller system |
| US5175822A (en) | 1989-06-19 | 1992-12-29 | International Business Machines Corporation | Apparatus and method for assigning addresses to scsi supported peripheral devices |
| GB9108599D0 (en) * | 1991-04-22 | 1991-06-05 | Pilkington Micro Electronics | Peripheral controller |
| US5671355A (en) | 1992-06-26 | 1997-09-23 | Predacomm, Inc. | Reconfigurable network interface apparatus and method |
| US6119188A (en) * | 1997-05-27 | 2000-09-12 | Fusion Micromedia Corp. | Priority allocation in a bus interconnected discrete and/or integrated digital multi-module system |
| JP2000200218A (ja) | 1998-09-01 | 2000-07-18 | Texas Instr Inc <Ti> | キャッシュメモリを有するマイクロプロセッサ |
| US6260086B1 (en) * | 1998-12-22 | 2001-07-10 | Motorola, Inc. | Controller circuit for transferring a set of peripheral data words |
| US6532533B1 (en) * | 1999-11-29 | 2003-03-11 | Texas Instruments Incorporated | Input/output system with mask register bit control of memory mapped access to individual input/output pins |
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2000
- 2000-08-11 US US09/638,512 patent/US6694385B1/en not_active Expired - Lifetime
- 2000-09-08 JP JP2000273376A patent/JP2001117858A/ja not_active Abandoned
- 2000-09-08 EP EP00307803A patent/EP1083487A3/en not_active Withdrawn