JP2001085420A - Semiconductor device and manufacturing method therefor - Google Patents
Semiconductor device and manufacturing method thereforInfo
- Publication number
- JP2001085420A JP2001085420A JP25603199A JP25603199A JP2001085420A JP 2001085420 A JP2001085420 A JP 2001085420A JP 25603199 A JP25603199 A JP 25603199A JP 25603199 A JP25603199 A JP 25603199A JP 2001085420 A JP2001085420 A JP 2001085420A
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- JP
- Japan
- Prior art keywords
- insulating film
- sio2
- fluorine
- semiconductor device
- moisture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体装置およびそ
の製造方法に係り、特に、素子配線を多量のフッ素を含
有する低誘電率のSiO2絶縁膜により被覆し、この低誘電
率のSiO2絶縁膜を低水素濃度のSiO2絶縁膜により被覆す
ることを特徴とする半導体装置およびその製造方法に関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a method of coating a device wiring with a low dielectric constant SiO2 insulating film containing a large amount of fluorine, and coating the low dielectric constant SiO2 insulating film. The present invention relates to a semiconductor device characterized by being covered with a low hydrogen concentration SiO2 insulating film and a method for manufacturing the same.
【０００２】[0002]
【従来の技術および発明が解決しようとする課題】一般
に、半導体基板１０の酸化絶縁膜１１の上部に形成した
素子配線１２a、１２b、１２cは図１５に示すようにSiH
4やテトラエトキシシラン（TEOS）等のガスを原料とし
た減圧または常圧の化学気相成長法（CVD法）によりSiO
2等の絶縁膜１３が被覆され、これらを電気的に隔離す
るようにしている。2. Description of the Related Art Generally, device wirings 12a, 12b and 12c formed on an oxide insulating film 11 of a semiconductor substrate 10 are formed of SiH as shown in FIG.
4 or tetraethoxysilane (TEOS) using a gas as a raw material by chemical vapor deposition (CVD) under reduced pressure or normal pressure.
An insulating film 13 such as 2 is coated to electrically isolate these.
【０００３】ところが、半導体装置の微細化が促進され
各素子配線１２a…の間隔ｔ等が図１６に示すように狭
められるとこれら間の静電容量が増大し、これら素子配
線１２a…を流れる信号伝達が遅延するようになる。However, as the miniaturization of the semiconductor device is promoted and the interval t between the element wirings 12a is narrowed as shown in FIG. 16, the capacitance between them increases, and the signal flowing through these element wirings 12a. Propagation will be delayed.
【０００４】そのため、SiO２等の絶縁膜１３には図１
７に示すように５at％以上の多量のフッ素（F）が含有
させられ、この誘電率を４以下、理想的には安定した
３．４以下の低下させ、静電容量を小さくし各素子配線
１２a…を流れる信号遅延を防止するようにしている。For this reason, the insulating film 13 such as SiO2 is
As shown in FIG. 7, a large amount of fluorine (F) of 5 at% or more is contained, and the dielectric constant is reduced to 4 or less, ideally 3.4 or less, and the capacitance is reduced to reduce the capacitance of each element. Are prevented from being delayed.
【０００５】しかし、絶縁膜１３に多量のフッ素を含有
させるとこれには図１８に示すように大気中の水分（-O
H基、H2O等）が多量に吸湿して取り込まれる。この水分
はフッ素の含有量が６at％以上になると急激に増大す
る。However, when a large amount of fluorine is contained in the insulating film 13, this may be caused by moisture (-O
H group, H2O, etc.) are absorbed by a large amount of moisture. This water content increases rapidly when the fluorine content exceeds 6 at%.
【０００６】この問題を解決するには多量のフッ素を含
有する低誘電率のSiO2絶縁膜上にフッ素のないSiO2絶縁
膜を耐吸湿性膜として採用してきた。In order to solve this problem, an SiO2 insulating film having no fluorine has been adopted as a moisture-absorbing film on a SiO2 insulating film having a large amount of fluorine and a low dielectric constant.
【０００７】しかし、この耐吸湿性膜は、従来、プラズ
マCVD装置で形成されるSiO2絶縁膜を用いておりSiO2絶
縁膜中に多量の水分を含有する。However, this moisture-absorbing film has conventionally used an SiO2 insulating film formed by a plasma CVD apparatus and contains a large amount of moisture in the SiO2 insulating film.
【０００８】この水分は半導体装置１５の使用中の熱に
より脱離させられ、フッ素を含む絶縁膜１３に拡散させ
られる。この拡散によりフッ素と水分とが加水分解させ
られ、絶縁膜１３中にフッカ水素（HF）が形成させら
れ、微細化された半導体装置の各素子配線１２a…を腐
食させたり各素子配線１２a…と絶縁膜１３との密着性
を低下させ半導体装置の品質を低下させると言う問題が
あった。This moisture is desorbed by heat during use of the semiconductor device 15 and diffused into the fluorine-containing insulating film 13. By this diffusion, fluorine and moisture are hydrolyzed, and hydrogen (HF) is formed in the insulating film 13 to corrode the element wirings 12a of the miniaturized semiconductor device or to form the element wirings 12a. There is a problem that the adhesiveness to the insulating film 13 is reduced and the quality of the semiconductor device is reduced.
【０００９】そこで本発明は多量のフッ素を含有させた
低誘電率のSiO2絶縁膜を低水素濃度絶縁膜により被覆し
水素の拡散により品質を低下させないようにした半導体
装置およびその製造方法を提供することを目的とするも
のである。Therefore, the present invention provides a semiconductor device in which a low dielectric constant SiO2 insulating film containing a large amount of fluorine is covered with a low hydrogen concentration insulating film so that the quality is not deteriorated by diffusion of hydrogen and a method of manufacturing the same. The purpose is to do so.
【００１０】[0010]
【課題を解決するための手段】請求項１の発明は多量の
フッ素を含有させたSiO2絶縁膜により素子配線を被覆す
る半導体装置において、この多量のフッ素を含有させた
SiO2絶縁膜に水素濃度を１at％以下としたSiO2絶縁膜に
より被覆または積層することを特徴とする半導体装置を
提供することを目的とするものである。According to a first aspect of the present invention, there is provided a semiconductor device in which an element wiring is covered with an SiO2 insulating film containing a large amount of fluorine.
It is an object of the present invention to provide a semiconductor device characterized by covering or laminating an SiO2 insulating film with an SiO2 insulating film having a hydrogen concentration of 1 at% or less.
【００１１】また、請求項２の発明は水素濃度を１at％
以下としたSiO2絶縁膜はフッ素濃度を0.２５at％以上
１．２５at％以下としたことを特徴とする半導体装置を
提供することを目的とするものである。Further, according to the invention of claim 2, the hydrogen concentration is 1 at%.
It is an object of the present invention to provide a semiconductor device characterized in that the SiO2 insulating film has a fluorine concentration of 0.25 at% or more and 1.25 at% or less.
【００１２】さらに、請求項３の発明は多量のフッ素を
含有させたSiO2絶縁膜と水素濃度を１at％以下としたSi
O2絶縁膜とを積層し、この積層した絶縁膜を保護絶縁膜
により被覆することを特徴とする半導体装置を提供する
ことを目的とするものである。Furthermore, the invention of claim 3 relates to a SiO2 insulating film containing a large amount of fluorine and a Si film having a hydrogen concentration of 1 at% or less.
It is an object of the present invention to provide a semiconductor device characterized by stacking an O2 insulating film and covering the stacked insulating film with a protective insulating film.
【００１３】さらに、請求項４の発明は保護絶縁膜はSi
N、SiONであることを特徴とする半導体装置半導体装置
を提供することを目的とするものである。Further, in the invention according to claim 4, the protective insulating film is made of Si.
It is an object of the present invention to provide a semiconductor device characterized by being N or SiON.
【００１４】さらに、請求項５の発明は水素濃度を１at
％以下としたSiO2絶縁膜は４００℃から５００℃までの
温度範囲によるプラズマ化学気相成長法により形成する
ことを特徴とする半導体装置の製造方法を提供すること
を目的とするものである。Further, the invention according to claim 5 has a hydrogen concentration of 1 at.
% Is intended to provide a method of manufacturing a semiconductor device, characterized by being formed by a plasma enhanced chemical vapor deposition method in a temperature range of 400 ° C. to 500 ° C.
【００１５】さらに、請求項６の発明は水素濃度を１at
％以下としたSiO2絶縁膜は５mTorr以下の高真空のプラ
ズマ化学気相成長法により形成することを特徴とする半
導体装置の製造方法を提供することを目的とするもので
ある。Further, according to the invention of claim 6, the hydrogen concentration is 1 at.
It is an object of the present invention to provide a method for manufacturing a semiconductor device, characterized in that an SiO2 insulating film having a concentration of not more than 5% is formed by a high-vacuum plasma chemical vapor deposition method of not more than 5 mTorr.
【００１６】[0016]
【発明の実施の形態】以下本発明半導体装置およびその
製造方法の実施の形態を添付図面を参照しながら説明す
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the accompanying drawings.
【００１７】まず、図１により本発明半導体装置を製造
する平行平板型プラズマ化学気相成長装置（以下「プラ
ズマCVD装置」と言う）について説明する。First, a parallel plate type plasma enhanced chemical vapor deposition apparatus (hereinafter referred to as "plasma CVD apparatus") for manufacturing the semiconductor device of the present invention will be described with reference to FIG.
【００１８】このプラズマCVD装置２０にはチャンバー
２１が備えられ、この上部に連結管２２を介して平行平
板型の電極２３が取り付けるとともに下部に支持柱２４
を介して平行平板型の電極２５を取り付けるようになっ
ている。The plasma CVD apparatus 20 is provided with a chamber 21. A parallel plate type electrode 23 is mounted on the upper part of the plasma CVD apparatus 20 through a connecting pipe 22, and a supporting column 24 is formed on a lower part.
The parallel plate type electrode 25 is attached via the.
【００１９】電極２３にはマッチングボックス２６を介
して１３．５６MHzの高周波電源２７が接続されるとと
もにマッチングボックス２８を介して４００kHzの高周
波電源２９が接続され、上下の平行平板型の電極２３、
２５間にプラズマを発生するようになっている。A 13.56 MHz high frequency power supply 27 is connected to the electrode 23 via a matching box 26, and a 400 kHz high frequency power supply 29 is connected via a matching box 28.
A plasma is generated between 25.
【００２０】電極２５には加熱ヒータ３１が備えられ、
電極２５に支持される半導体基板３５を所定の温度に加
熱しながら素子配線３６a、３６b、３６cの上部に化学
的気相法により絶縁膜３７を被覆するようになってい
る。The electrode 25 is provided with a heater 31.
While heating the semiconductor substrate 35 supported by the electrodes 25 to a predetermined temperature, the insulating film 37 is coated on the element wirings 36a, 36b, 36c by a chemical vapor deposition method.
【００２１】連結管２２にはガス配管３２が取り付けら
れ、テトラエトキシシラン（TEOS）、テトラエトキシシ
ランをキャリアーとしたHeガス、O２ガス、C2F6ガス等
の反応ガスを連結管２２、電極２３を介してチャンバー
２１内に均一に導入するようになっている。A gas pipe 32 is attached to the connecting pipe 22, and a reactive gas such as tetraethoxysilane (TEOS), a He gas, an O 2 gas, or a C 2 F 6 gas using tetraethoxysilane as a carrier is passed through the connecting pipe 22 and the electrode 23. Thus, the gas is uniformly introduced into the chamber 21.
【００２２】チャンバー２１は接地線２１eにより接地
され、使用者の安全を確保するようになっている。さら
に、チャンバー２１には連結管３３を介して真空ポンプ
３４が取り付けられ、チャンバー２１を真空に排気する
ようになっている。The chamber 21 is grounded by a grounding wire 21e to ensure user safety. Further, a vacuum pump 34 is attached to the chamber 21 via a connection pipe 33, and the chamber 21 is evacuated to a vacuum.
【００２３】このようなプラズマCVD装置２０を用いて
半導体基板３５の上部の各素子配線３６a…の上部にフ
ッ素（F）を所定量（at％）の含有させたSiO2等の絶縁
膜３７を被覆する方法を説明する。Using such a plasma CVD apparatus 20, an insulating film 37 made of SiO2 or the like containing a predetermined amount (at%) of fluorine (F) is coated on the element wirings 36a on the semiconductor substrate 35. How to do it.
【００２４】半導体装置を製造するには図２示すような
複数の素子配線３６a…を備えた半導体基板３５を電極
２５の上部に配置する。In order to manufacture a semiconductor device, a semiconductor substrate 35 having a plurality of element wirings 36a as shown in FIG.
【００２５】この半導体基板３５は図示しないが半導体
素子が設けられ、この上部に絶縁酸化膜３８を形成して
いる。この絶縁酸化膜３８の上部にはチタン・窒化チタ
ン・アルミニウム・チタン・窒化チタン（これは、通
常、Ti/TiN/Al/Ti/TiN配線と記載する）により構成した
信号を送受する前記複数の素子配線３６a…が備えられ
る。Although not shown, the semiconductor substrate 35 is provided with a semiconductor element, on which an insulating oxide film 38 is formed. On the insulating oxide film 38, a plurality of signals for transmitting and receiving signals composed of titanium, titanium nitride, aluminum, titanium, and titanium nitride (this is usually referred to as Ti / TiN / Al / Ti / TiN wiring) are provided. Element wirings 36a are provided.
【００２６】ついで、真空ポンプ３４を付勢しチャンバ
ー２１を真空に排気する。さらに、加熱ヒータ３１を付
勢し半導体基板３５等を４００℃の温度に加熱する。Next, the vacuum pump 34 is energized to evacuate the chamber 21 to a vacuum. Further, the heater 31 is energized to heat the semiconductor substrate 35 and the like to a temperature of 400 ° C.
【００２７】このような予備操作が終了した後ガス配管
３２から反応ガス、すなわち、テトラエトキシシランを
５０sccm、このテトラエトキシシランをキャリアーとし
たHeガスを５００sccm、O２ガスを５００sccm、C2F6ガ
スを０から５００sccm程度までを連結管２２、電極２３
を介してチャンバー２１の内部に導入してチャンバー２
１の内圧を５Torrにする。After the completion of the preliminary operation, the reaction gas, ie, 50 sccm of tetraethoxysilane, 500 sccm of He gas using this tetraethoxysilane as a carrier, 500 sccm of O2 gas, and 0 C2F6 gas from the gas pipe 32. Up to about 500 sccm, the connecting pipe 22, the electrode 23
And introduced into the chamber 21 through the chamber 2
The internal pressure of 1 is set to 5 Torr.
【００２８】これらの予備操作、ガス導入操作が終了し
たら高周波電源２７および高周波電源２９を付勢し、電
極２３、２５間に１３．５６MHzの高周波および４００k
Hzの高周波によりプラズマを放電させる。When the preliminary operation and the gas introduction operation are completed, the high frequency power supply 27 and the high frequency power supply 29 are energized, and a high frequency of 13.56 MHz and 400 kV are applied between the electrodes 23 and 25.
The plasma is discharged by a high frequency of Hz.
【００２９】このプラズマの放電により半導体基板３５
の素子配線３６a…の上面にフッ素を含有したSiO2の絶
縁膜３７を形成する。The semiconductor substrate 35 is discharged by this plasma discharge.
Are formed on the upper surfaces of the element wirings 36a.
【００３０】C2F6ガスが少ないときは図３、図４に示す
ようにフッ素の含有量が少ない絶縁膜３７が形成され、
C2F6ガスが多いときは同様にフッ素の含有量が多い絶縁
膜３７が形成される。When the amount of C2F6 gas is small, an insulating film 37 having a small fluorine content is formed as shown in FIGS.
When the amount of C2F6 gas is large, similarly, the insulating film 37 having a large content of fluorine is formed.
【００３１】これにより素子配線３６a…の上部にはフ
ッ素を含有を０at％、０.２５at％、０.５at％、０.７
５at％、１at％、１.２５at％、２at％、４at％、６at
％、８at％、１０at％…とした絶縁膜３７を被覆する。As a result, the upper portion of the element wires 36a contains fluorine at 0 at%, 0.25 at%, 0.5 at%, 0.7 at%.
5at%, 1at%, 1.25at%, 2at%, 4at%, 6at
%, 8 at%, 10 at%... Of the insulating film 37.
【００３２】この絶縁膜３７を製造直後の水分濃度、す
なわち、水分含有量at％はC2F6ガスを供給しないときは
２at％、絶縁膜３７のフッ素の含有量が０．２５at％の
ときは０．５at％、以下同様にフッ素の含有量が０．５
at％以上のときは０．５at％であった。The water concentration immediately after the production of the insulating film 37, that is, the water content at% is 2 at% when the C2F6 gas is not supplied, and 0.1% when the fluorine content of the insulating film 37 is 0.25 at%. 5 at%, and similarly when the fluorine content is 0.5
When it was at least at%, it was 0.5 at%.
【００３３】このように製造直後の水分含有量は反応ガ
スを供給しない初期には絶縁膜３７に２at％程度を含有
するがフッ素が０.２５at％以上含有すると水分が０．
５at％程度の値を維持する。As described above, the water content immediately after the production is about 2 at% in the insulating film 37 at the initial stage when the reactive gas is not supplied, but when the fluorine content is 0.25 at% or more, the water content becomes 0.2.
Maintain a value of about 5 at%.
【００３４】このような絶縁膜３７を被覆した絶縁膜３
７を一週間、すなわち、約１７０時間放置すると図３、
図４に１点鎖線で示すようにフッ素が０at％から１.２
５at％までの範囲内では水分含有量は増加しないが１.
２５at％を越えると次第に増大し、特に、６at％を越え
ると急激に増大する。この傾向はさらに長時間放置して
もほぼ同様な結果が得られる。The insulating film 3 covering such an insulating film 37
7 for one week, that is, about 170 hours, FIG.
As shown by the chain line in FIG. 4, the fluorine content is 0 at% to 1.2 at%.
In the range up to 5 at%, the water content does not increase, but is 1.
When it exceeds 25 at%, it gradually increases. In particular, when it exceeds 6 at%, it rapidly increases. This tendency is almost the same even if left for a long time.
【００３５】以上の結果からフッ素の含有量を０.２５a
t％から１.２５at％以下の範囲内にすれば水分含有量を
０.６at％程度の低い状態に維持することができる。From the above results, the fluorine content was reduced to 0.25a
When the content is in the range of t% to 1.25 at% or less, the water content can be maintained at a low state of about 0.6 at%.
【００３６】これは、また、フッ素の含有量が０.２５a
t％から１.２５at％の範囲内にあれば水素の拡散により
水分を取り込まない耐吸湿性の絶縁膜３７bを形成す
る。This is because the fluorine content is 0.25a
If it is in the range of t% to 1.25 at%, a moisture-absorbing insulating film 37b which does not take in moisture by diffusion of hydrogen is formed.
【００３７】そこで図５に示すように素子配線３６a…
の上部にフッ素を７at％を含むだ７００nmのSi02等の低
誘電率の絶縁膜３７aを被覆し、この低誘電率の絶縁膜
３７aの上部にフッ素を０at％から１.２５at％以下の範
囲の３００nmのSi02等の耐吸湿性の絶縁膜３７bを被覆
することにより吸湿の少ない半導体装置５０とすること
ができる。Therefore, as shown in FIG.
A low dielectric constant insulating film 37a such as 700 nm Si02 containing 7 at% of fluorine is coated on the upper portion of the lower insulating film 37a, and the upper portion of the low dielectric constant insulating film 37a is coated with fluorine in a range of 0 at% to 1.25 at% or less. The semiconductor device 50 with low moisture absorption can be obtained by coating the insulating film 37b having a moisture absorption resistance of 300 nm such as Si02.
【００３８】この半導体装置５０を４５０℃の温度で６
０分間加熱して低誘電率の絶縁膜３７a、耐吸湿性の絶
縁膜３７b間のフッ素の濃度の変化を測定たが図６に示
す製造直後の測定と図７に示す温度試験測定後の状態と
にはフッ素の濃度の変化はほとんど認められなかった。The semiconductor device 50 is heated at 450 ° C. for 6 hours.
Heating was performed for 0 minute to measure the change in the concentration of fluorine between the low-dielectric-constant insulating film 37a and the moisture-absorbing insulating film 37b. The measurement was performed immediately after the production shown in FIG. 6 and after the temperature test measurement shown in FIG. Almost no change in the fluorine concentration was observed.
【００３９】これは多量のフッ素を含有する低誘電率の
絶縁膜３７aの上部に少量のフッ素を含有する耐吸湿性
の度絶縁膜３７bに被覆することにより低誘電率の絶縁
膜３７aには上部絶縁膜から水素の拡散を防止すること
ができる。This is because the low-dielectric-constant insulating film 37b containing a small amount of fluorine is coated on the low-dielectric-constant insulating film 37b containing a large amount of fluorine to cover the low-dielectric-constant insulating film 37a. Diffusion of hydrogen from the insulating film can be prevented.
【００４０】そのため、半導体装置５０は使用中の熱に
より絶縁膜中の水分（水素）が離脱しフッ素を含んだ絶
縁膜に拡散し加水分解してフッカ水素となり素子配線３
６a…や他の配線等を腐食させたり素子配線３６a…や他
の配線等と低誘電率の絶縁膜３７aとの密着性の低下さ
せることがない。これにより微細化された半導体装置５
０であっても品質の高いものを製造することができる。For this reason, in the semiconductor device 50, moisture (hydrogen) in the insulating film is released by heat during use, diffuses into the insulating film containing fluorine, and is hydrolyzed to become hydrogen hydrogen.
And other wirings are not corroded, and the adhesion between the element wiring 36a and the other wirings and the low dielectric constant insulating film 37a is not reduced. The semiconductor device 5 thus miniaturized
Even if it is 0, a high quality product can be manufactured.
【００４１】この実施例はではフッ素を多量に含むSiO2
絶縁膜の上に水素濃度の低いSiO2絶縁膜を形成すること
を説明したが水素を含む全てのSiO2絶縁膜に、例えば、
フッ素を含むSiO2絶縁膜の下側のSiO2絶縁膜にも水素濃
度の低い絶縁膜を採用するとさらに品質の高いものを製
造することができる。In this embodiment, SiO 2 containing a large amount of fluorine is used.
Although it has been described that an SiO2 insulating film having a low hydrogen concentration is formed on the insulating film, all the SiO2 insulating films containing hydrogen include, for example,
If an insulating film having a low hydrogen concentration is also used as the SiO2 insulating film below the SiO2 insulating film containing fluorine, a higher-quality SiO2 insulating film can be manufactured.
【００４２】プラズマCVD装置２０により素子配線３６a
…の上部に低誘電率の絶縁膜３７a、耐吸湿性の絶縁膜
３７bを被覆するとき加熱ヒータ３１を図８に示すよう
に３５０℃に下げたると水分含有量を１．２at％まで上
昇させるが４５０℃、５００℃に上げると水分含有量を
０．３at％、０．１at％に低下させることができる。The device wiring 36a is formed by the plasma CVD device 20.
When the heater 31 is lowered to 350 ° C. as shown in FIG. 8 when the low dielectric constant insulating film 37a and the moisture-absorbing insulating film 37b are coated on the upper part of..., The water content increases to 1.2 at%. When the temperature is raised to 450 ° C. or 500 ° C., the water content can be reduced to 0.3 at% or 0.1 at%.
【００４３】そのため、各素子配線３６a…に低誘電率
の絶縁膜３７aや耐吸湿性の絶縁膜３７bを被覆するとき
加熱ヒータ３１の温度を３５０℃〜５００℃、理想的に
は４００℃〜４５０℃にすると低水分含有量の半導体装
置５０を製造することができる。Therefore, when the element wirings 36a are covered with the insulating film 37a having a low dielectric constant or the insulating film 37b having a moisture absorption resistance, the temperature of the heater 31 is set to 350 ° C. to 500 ° C., ideally 400 ° C. to 450 ° C. When the temperature is set to ° C., the semiconductor device 50 having a low moisture content can be manufactured.
【００４４】素子配線３６a、３６bをプラズマCVD装置
２０により低誘電率の絶縁膜３７aや耐吸湿性の絶縁膜
３７bを被覆する代わり図９に示すような高密度プラズ
マCVD装置（以下「HDP・CVD装置」と言う）９０を用い
て被覆するようにしてもよい。Instead of coating the element wirings 36a and 36b with the low dielectric constant insulating film 37a and the moisture absorbing insulating film 37b by the plasma CVD device 20, a high-density plasma CVD device as shown in FIG. 90).
【００４５】このHDP・CVD装置９０は基本的にはプラズ
マCVD装置２０に近似するでプラズマCVD装置２０と同一
部分は同一符号を付して説明する。The HDP / CVD apparatus 90 is basically similar to the plasma CVD apparatus 20, and the same parts as those of the plasma CVD apparatus 20 are denoted by the same reference numerals.
【００４６】チャンバー２１には支持柱２４を介して電
極２５が取り付けられ、半導体基板３５を支持するよう
になっている。この電極２５には加熱ヒータ３１が備え
られ、半導体基板３５を４００℃等の適宜の温度に加熱
するようになっている。An electrode 25 is attached to the chamber 21 via a support column 24 so as to support a semiconductor substrate 35. The electrode 25 is provided with a heater 31 for heating the semiconductor substrate 35 to an appropriate temperature such as 400 ° C.
【００４７】また、この支持柱２５にはマッチングボッ
クス２６を介して１３.５６MHzの高周波電源２７が接続
され、電極２５に高周波電力を供給するようになってい
る。A 13.56 MHz high frequency power supply 27 is connected to the support column 25 via a matching box 26 to supply high frequency power to the electrodes 25.
【００４８】チャンバー２１の上部にはセラミックドー
ム９１が覆われ、この外周部にアンテナ９２を巻装する
よになっている。このアンテナ９２にはマッチングボッ
クス２８を介して２MHzの高周波電源２９aが接続され、
アンテナ９２に高周波電力を供給するようになってい
る。The upper part of the chamber 21 is covered with a ceramic dome 91, and an antenna 92 is wound around the outer periphery. A 2 MHz high frequency power supply 29a is connected to the antenna 92 via the matching box 28,
The high frequency power is supplied to the antenna 92.
【００４９】このチャンバー２１には、さらに、ガス管
９３、９３が備えられ、このにSiH4、０2ガス、Arガ
ス、SiF4ガスを均一に導入するようになっている。The chamber 21 is further provided with gas pipes 93, 93, into which SiH4, 02 gas, Ar gas, and SiF4 gas are uniformly introduced.
【００５０】このチャンバー９１には、さらに、ターボ
ポンプ９４に連結管９５を介して真空ドライポンプ９６
を取り付けた排気装置９７が備えられ、チャンバー２１
とセラミックドーム９１との内部に形成される空間部を
高真空にするようになっている。The chamber 91 is further provided with a vacuum dry pump 96 via a connecting pipe 95 to a turbo pump 94.
An exhaust device 97 equipped with a chamber 21 is provided.
The space formed inside the ceramic dome 91 is made to have a high vacuum.
【００５１】このHDP・CVD装置９０による素子配線３６
a、３６bに絶縁膜３７を被覆する方法は図１に示した方
法とほぼ同様にSiH４ガスを０sccmから１００sccm、O２
ガスを１４０sccm、Arガスを１４０sccm、SiF4ガスを０
sccmから３００sccmの範囲の反応ガスをガス管９３、９
３を介してチャンバー２１の内部に導入してこれを５mT
orr程度の高真空にする。The element wiring 36 by the HDP / CVD apparatus 90
The method for coating the insulating film 37 on the a and 36b is almost the same as the method shown in FIG.
140 sccm gas, 140 sccm Ar gas, and 0 SiF4 gas.
The reaction gas in the range of sccm to 300 sccm is supplied to the gas pipes 93 and 9.
3 and introduced into the chamber 21 through 5 mT
Make a high vacuum of about orr.
【００５２】このような操作が終了したら高周波電源２
７および高周波電源２９を付勢し低圧領域のプラズマ放
電し電極２５とセラミックドーム９１との間に高密度の
プラズマを発生させる。When such an operation is completed, the high-frequency power source 2
7 and the high frequency power supply 29 are energized to generate a plasma discharge in a low pressure region to generate high density plasma between the electrode 25 and the ceramic dome 91.
【００５３】このプラズマにより反応ガス中のSi02が半
導体装置３０の素子配線３６a…の上面に引き寄せられ
フッ素を含む絶縁膜３７を形成する。By this plasma, Si02 in the reaction gas is attracted to the upper surfaces of the element wirings 36a of the semiconductor device 30 to form an insulating film 37 containing fluorine.
【００５４】これにより素子配線３６a…を被覆する絶
縁膜３７には図１０で示すように一点鎖線により示すプ
ラズマCVD装置２０に比べさらに低い実線で示す０.１at
％の水分含有量の多量のフッ素を含む低誘電率のSiO2絶
縁膜３７aや耐吸湿性の絶縁膜３７bを形成することがで
きる。As a result, as shown in FIG. 10, the insulating film 37 covering the element wirings 36a...
%, A low dielectric constant SiO2 insulating film 37a containing a large amount of fluorine and a moisture absorbing insulating film 37b can be formed.
【００５５】このHDP・CVD装置９０により図１１に示す
ような半導体基板３５の絶縁酸化膜３８の上の素子配線
３６a…に７００nmの多量のフッ素を含む低誘電率のSiO
2絶縁膜３７aを被覆し、この低誘電率の絶縁膜３７aに
３００nmの耐吸湿性の絶縁膜３７bを被覆し、さらに、
この耐吸湿性の絶縁膜３７bにSiN、Si0N等の水素（水
分）の透過しにくい保護絶縁膜１１１を被覆し、半導体
装置１１０を製造する。By means of the HDP / CVD apparatus 90, the element wirings 36a on the insulating oxide film 38 of the semiconductor substrate 35 as shown in FIG.
(2) Cover the insulating film 37a, cover the low-dielectric-constant insulating film 37a with a 300-nm moisture-absorbing insulating film 37b,
The semiconductor device 110 is manufactured by covering the moisture-absorbing insulating film 37b with a protective insulating film 111, such as SiN or Si0N, which is hardly permeable to hydrogen (moisture).
【００５６】この半導体装置１１０を前記図６、図７で
示したと同様に図１２に示すように４５０℃の温度で６
０分間加熱して多量にフッ素を含む低誘電率のSiO2絶縁
膜３７a、耐吸湿性の絶縁膜３７b間のフッ素の濃度の変
化を測定したが図１２に示すように多量のフッ素を含む
低誘電率のSiO2絶縁膜３７a、耐吸湿性の絶縁膜３７bを
製造直後に測定したものと図１３に示すように温度試験
を行った直後の測定したものの低誘電率の絶縁膜３７
a、耐吸湿性の絶縁膜３７b間にはフッ素の濃度の変化は
ほとんど認められなかった。The semiconductor device 110 was heated at a temperature of 450 ° C. as shown in FIG.
A change in the concentration of fluorine between the low dielectric constant SiO2 insulating film 37a and the moisture-absorbing insulating film 37b containing a large amount of fluorine by heating for 0 minutes was measured. As shown in FIG. The low-dielectric-constant insulating film 37a obtained by measuring the SiO2 insulating film 37a and the moisture-absorbing insulating film 37b having a low dielectric constant and the one obtained by measuring immediately after performing a temperature test as shown in FIG.
a, There was almost no change in the fluorine concentration between the moisture-absorbing insulating films 37b.
【００５７】水素濃度の低いSiO2絶縁膜３７bに対して
水素濃度の多いSiO2絶縁膜３７aをフッ素を多量に含む
絶縁膜と水を透過しにくい保護絶縁膜の間に積層して熱
処理した場合には水分（水素）が下側のフッ素を含むSi
O2絶縁膜に拡散しフッカ水素（HF）を形成し、上側のフ
ッ素の少ない耐吸湿性の絶縁膜３７bや保護絶縁膜１１
１中に拡散する。これにより遊離したフッ化水素により
素子配線３６a…が腐食することがないばかりか密着性
の低下を防止する。In the case where the SiO2 insulating film 37a having a high hydrogen concentration is laminated between the insulating film containing a large amount of fluorine and the protective insulating film which is difficult to transmit water, and the SiO2 insulating film 37a having a high hydrogen concentration is heat-treated, as compared with the SiO2 insulating film 37b having a low hydrogen concentration Si with water (hydrogen) containing lower fluorine
The H2 is diffused into the O2 insulating film to form hydrogen (HF), and the upper moisture-absorbing insulating film 37b and the protective insulating film 11 with less fluorine are formed.
Diffuses into one. This prevents not only the element wirings 36a from being corroded by the liberated hydrogen fluoride, but also prevents a decrease in adhesion.
【００５８】以上のように、半導体装置１１０を図１１
に示したような構成にすれば各素子配線３６a…の間は
低誘電率の絶縁膜３７aにより信号伝達の遅延が防止さ
れ、耐吸湿性の絶縁膜３７bにより低誘電率の絶縁膜３
７aには水素の拡散により水分の吸湿を阻止するから水
分とフッ素との加水分解により素子配線３６a…の腐食
を防止し素子配線３６a…と低誘電率絶縁膜３７aとの密
着性の低下を防ぐことができる。As described above, the semiconductor device 110 is
In the configuration shown in FIG. 6, the signal transmission delay is prevented by the low dielectric constant insulating film 37a between the element wirings 36a, and the low dielectric constant insulating film 3 is formed by the moisture absorption resistant insulating film 37b.
7a prevents the absorption of moisture by diffusion of hydrogen, so that the hydrolysis of moisture and fluorine prevents the corrosion of the element wirings 36a and prevents the adhesion between the element wirings 36a and the low dielectric constant insulating film 37a from decreasing. be able to.
【００５９】この積層膜の検討ではフッ素を含む絶縁膜
と水分の透過しにくい絶縁膜との間に水素濃度の低い絶
縁膜を採用したが必要に応じてフッ素を含む全ての絶縁
膜に水素濃度の低い絶縁膜にすればよい。In the examination of the laminated film, an insulating film having a low hydrogen concentration was employed between the insulating film containing fluorine and the insulating film which is not easily permeable to moisture. The insulating film may be made low.
【００６０】このような基礎的な特性をもとに図１４に
示す３層の半導体装置１4０の素子配線３６a、３６b、
３６c、３６aa、３６bb、３６aaaを低誘電率の絶縁膜３
７aにより被覆し、その低誘電率の絶縁膜３７aを耐吸湿
性の絶縁膜３７bにより被覆し、さらに、必要においじ
て、保護絶縁膜１１１により被覆すれば微細な半導体装
置１４０であっても信号伝達を遅延させないで、かつ、
充分に耐吸湿の高い半導体装置１４０を製造することが
できる。Based on such basic characteristics, the element wirings 36a and 36b of the three-layer semiconductor device 140 shown in FIG.
36c, 36aa, 36bb, 36aaa are insulating films 3 of low dielectric constant
7a, the low-dielectric-constant insulating film 37a is coated with a moisture-absorbing insulating film 37b, and, if necessary, the protective insulating film 111 is used. Without delaying transmission, and
The semiconductor device 140 having sufficiently high moisture absorption resistance can be manufactured.
【００６１】なお、上記各実施の形態では絶縁膜３７と
してSi02を使用したがこれをほぼ同様な性質を有するSi
N、Si0F、Si0N等を使用しても同様な効果を得ることが
できる。In each of the above embodiments, Si02 is used as the insulating film 37.
Similar effects can be obtained by using N, Si0F, Si0N or the like.
【００６２】また、上記各実施の形態の半導体装置では
素子配線３６a…としてチタン・窒化チタン・アルミニ
ウム・チタン・窒化チタン（Ti/TiN/Al/Ti/TiN）により
構成されたものを使用したがアルミニウム（Al）に代わ
り銅（Cu）、タングステン（W）、鉄（Fe）等を使用し
てもよい。In the semiconductor device of each of the above embodiments, the element wirings 36a are made of titanium, titanium nitride, aluminum, titanium, and titanium nitride (Ti / TiN / Al / Ti / TiN). Copper (Cu), tungsten (W), iron (Fe), or the like may be used instead of aluminum (Al).
【００６３】このようにすれば絶縁膜３７の形成温度を
５００℃程度まで高くし低い水分の含有量の低誘電率の
絶縁膜３７a、耐吸湿度性の絶縁膜３７bを製造すること
ができる。In this manner, the temperature for forming the insulating film 37 can be raised to about 500 ° C. to manufacture the insulating film 37a having a low moisture content and a low dielectric constant, and the insulating film 37b having a moisture absorption resistance.
【００６４】また、SiO2絶縁膜に溝加工を行い金属を埋
め込み、CMPにより配線を形成する方法（ダマシール配
線）に対しても有効である。Further, it is also effective for a method of forming a wiring in a SiO2 insulating film by embedding a metal by embedding a metal and forming a wiring by CMP (Dama seal wiring).
【００６５】さらに、上記各実施の形態の保護絶縁膜１
１１としてSiN、Si0N等を使用したがこれは低誘電率の
絶縁膜３７aや耐吸湿度性の絶縁膜３７bの表面が製造中
や使用中において損傷しなければ他の材料を使用した保
護絶縁膜であってもよい。Further, the protective insulating film 1 of each of the above embodiments
11 is SiN, Si0N, or the like, which is a protective insulating film using another material if the surface of the insulating film 37a having a low dielectric constant or the insulating film 37b having a moisture absorption resistance is not damaged during manufacturing or use. There may be.
【００６６】その他、本発明では同一絶縁膜にフッ素の
含有量を異ならすだけで微細化半導体装置を製造できる
から半導体装置の製造が極めて容易にできる等の特徴も
ある。In addition, the present invention has another feature in that a miniaturized semiconductor device can be manufactured only by changing the content of fluorine in the same insulating film, so that the semiconductor device can be manufactured very easily.
【００６７】[0067]
【発明の効果】請求項１の発明は多量のフッ素を含有さ
せたSiO2絶縁膜により素子配線を被覆する半導体装置に
おいて、この多量のフッ素を含有させたSiO2絶縁膜に水
素濃度を１at％以下としたSiO2絶縁膜により被覆または
積層するようにしたから水素濃度を１at％以下としたSi
O2絶縁膜から多量のフッ素を含有させた低誘電率のSiO2
絶縁膜に対する水分の拡散を防止することができる。According to a first aspect of the present invention, there is provided a semiconductor device in which element wiring is covered with an SiO2 insulating film containing a large amount of fluorine, wherein the SiO2 insulating film containing a large amount of fluorine has a hydrogen concentration of 1 at% or less. The hydrogen concentration is set to 1 at% or less because the silicon is covered or laminated with the formed SiO2 insulating film.
Low dielectric constant SiO2 containing a large amount of fluorine from O2 insulating film
Diffusion of moisture into the insulating film can be prevented.
【００６８】また、請求項２の発明は水素濃度を１at％
以下としたSiO2絶縁膜はフッ素濃度を0.２５at％以上
１．２５at％以下としたから多量のフッ素を含有させた
低誘電率のSiO2絶縁膜に対する水分の拡散を防止し素子
配線の腐食や素子配線間の密着性の低下を防止すること
ができる。Further, according to the invention of claim 2, the hydrogen concentration is 1 at%.
Since the fluorine concentration of the SiO2 insulating film is set to 0.25 at% or more and 1.25 at% or less, the diffusion of water into the low dielectric constant SiO 2 insulating film containing a large amount of fluorine is prevented, and the corrosion of the element wiring and the element are prevented. It is possible to prevent a decrease in adhesion between the wirings.
【００６９】さらに、請求項３および４の発明は多量の
フッ素を含有させたSiO2絶縁膜と水素濃度を１at％以下
としたSiO2絶縁膜とを積層し、この積層した絶縁膜を保
護絶縁膜により被覆するようにしたから多量のフッ素を
含有させた低誘電率のSiO2絶縁膜や水素濃度を１at％以
下の耐湿性のSiO2絶縁膜の保護を確実に行うことができ
る。Further, according to the third and fourth aspects of the present invention, an SiO2 insulating film containing a large amount of fluorine and an SiO2 insulating film having a hydrogen concentration of 1 at% or less are laminated, and the laminated insulating film is formed by a protective insulating film. Since the coating is made to cover, a low dielectric constant SiO2 insulating film containing a large amount of fluorine and a moisture resistant SiO2 insulating film having a hydrogen concentration of 1 at% or less can be reliably protected.
【００７０】さらに、請求項５および６の発明は水素濃
度を１at％以下としたSiO2絶縁膜は４００℃から５００
℃までの温度範囲によるプラズマ化学気相成長法により
形成するようにしたから水素濃度を１at％以下にするSi
O2絶縁膜等の水分を低下することができる。Further, according to the fifth and sixth aspects of the present invention, the SiO2 insulating film in which the hydrogen concentration is 1 at% or less is used.
Si is formed by plasma enhanced chemical vapor deposition in a temperature range up to ℃.
Moisture in the O2 insulating film or the like can be reduced.
【図１】本発明半導体装置を製造する平行平板型プラズ
マ化学気相成長装置の概要を示す断面図。FIG. 1 is a sectional view showing an outline of a parallel plate type plasma enhanced chemical vapor deposition apparatus for manufacturing a semiconductor device of the present invention.
【図２】絶縁膜を被覆する素子配線を備えた半導体基板
の概要を示す断面図。FIG. 2 is a cross-sectional view showing an outline of a semiconductor substrate provided with an element wiring covering an insulating film.
【図３】絶縁膜被覆時および絶縁膜被覆後の水分含有量
とフッ素含有量との関係を示す特性図。FIG. 3 is a characteristic diagram showing the relationship between the water content and the fluorine content when and after the insulating film is coated.
【図４】図３の一部を拡大して示す特性図。FIG. 4 is a characteristic diagram showing a part of FIG. 3 in an enlarged manner.
【図５】本発明半導体装置の１例を示す断面図。FIG. 5 is a cross-sectional view showing one example of the semiconductor device of the present invention.
【図６】絶縁膜被覆直後の水分含有量とフッ素含有量と
の関係を示す特性図。FIG. 6 is a characteristic diagram showing a relationship between a water content and a fluorine content immediately after covering an insulating film.
【図７】絶縁膜被覆後温度試験した後の水分含有量とフ
ッ素含有量との関係を示す特性図。FIG. 7 is a characteristic diagram showing a relationship between a water content and a fluorine content after a temperature test after insulating film coating.
【図８】温度を変えて絶縁膜を製造した時の水分含有量
とフッ素含有量との関係を示す特性図。FIG. 8 is a characteristic diagram showing a relationship between a water content and a fluorine content when an insulating film is manufactured at different temperatures.
【図９】本発明半導体装置を製造する高密度プラズマCV
D装置の概要を示す断面図。FIG. 9 shows a high-density plasma CV for manufacturing the semiconductor device of the present invention.
Sectional drawing which shows the outline | summary of D apparatus.
【図１０】高密度プラズマCVD装置により絶縁膜を被覆
した直後の水分含有量とフッ素含有量との関係を示す特
性図。FIG. 10 is a characteristic diagram showing a relationship between a water content and a fluorine content immediately after coating an insulating film with a high-density plasma CVD apparatus.
【図１１】本発明半導体装置の他の例を示す断面図。FIG. 11 is a sectional view showing another example of the semiconductor device of the present invention.
【図１２】高密度プラズマCVD装置により絶縁膜被覆後
の水分含有量とフッ素含有量との関係を示す特性図。FIG. 12 is a characteristic diagram showing a relationship between a water content and a fluorine content after insulating film coating by a high-density plasma CVD apparatus.
【図１３】高密度プラズマCVD装置により絶縁膜被覆し
温度試験した後の水分含有量とフッ素含有量との関係を
示す特性図。FIG. 13 is a characteristic diagram showing a relationship between a water content and a fluorine content after an insulating film is coated with a high-density plasma CVD apparatus and subjected to a temperature test.
【図１４】本発明半導体装置の他例を示す断面図。FIG. 14 is a sectional view showing another example of the semiconductor device of the present invention.
【図１５】従来の半導体装置の概要を示す断面図。FIG. 15 is a cross-sectional view illustrating an outline of a conventional semiconductor device.
【図１６】従来の微細化半導体装置の概要を示す断面
図。FIG. 16 is a cross-sectional view showing an outline of a conventional miniaturized semiconductor device.
【図１７】一般的な絶縁膜の誘電率とフッ素含有量との
関係を示す特性図。FIG. 17 is a characteristic diagram showing a relationship between a dielectric constant and a fluorine content of a general insulating film.
【図１８】多量のフッ素を含有する絶縁膜の水分含有量
を示す特性図。FIG. 18 is a characteristic diagram showing a water content of an insulating film containing a large amount of fluorine.
１０、３５ 半導体基板 １２a、１２b、１２c、３６a、３６b、３６c 素子配線 １３、３７ 絶縁膜 ２０ プラズマCVD装置 ２１ チャンバー ２７、２９、２９a 高周波電源 ３１ 加熱ヒータ ３４ 真空ポンプ ５０、１１０、１４０ 半導体装置 ９０ 高密度プラズマCVD装置 ９１ セラミックドーム ９４ ターボポンプ ９６ 真空ドライポンプ 10, 35 Semiconductor substrate 12a, 12b, 12c, 36a, 36b, 36c Element wiring 13, 37 Insulating film 20 Plasma CVD device 21 Chamber 27, 29, 29a High frequency power supply 31 Heater 34 Vacuum pump 50, 110, 140 Semiconductor device 90 High density plasma CVD equipment 91 Ceramic dome 94 Turbo pump 96 Vacuum dry pump
───────────────────────────────────────────────────── フロントページの続き (72)発明者 梶 成 彦 神奈川県横浜市磯子区新杉田町８番地 株 式会社東芝横浜事業所内 Ｆターム(参考） 5F033 HH07 HH08 HH11 HH18 HH19 HH33 MM01 MM08 MM13 RR04 RR06 RR08 RR11 RR12 SS01 SS04 SS15 TT02 WW03 WW04 XX18 XX24 5F045 AA07 AA08 AB32 AB33 AB34 AC01 AC07 AC11 AC17 AD08 AD09 AE13 AE15 DC53 DC61 DC64 DP03 DP04 EH11 EH13 5F058 BA20 BB06 BC02 BC04 BC08 BD02 BF07 BF08 BF23 BF25 BF29 BF54 BJ02 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor: Narihiko Kaji 8 Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture F-term (reference) 5F033 HH07 HH08 HH11 HH18 HH19 HH33 MM01 MM08 MM13 RR04 RR06 RR08 RR11 RR12 SS01 SS04 SS15 TT02 WW03 WW04 XX18 XX24 5F045 AA07 AA08 AB32 AB33 AB34 AC01 AC07 AC11 AC17 AD08 AD09 AE13 AE15 DC53 DC61 DC64 DP03 DP04 EH11 EH13 5F058 BA20 BB06 BC02 BC04 BC08 BD02 BF07 BF02 BF07
Claims (6)
り素子配線を被覆する半導体装置において、 この多量のフッ素を含有させたSiO2絶縁膜に水素濃度を
１at％以下としたSiO2絶縁膜により被覆または積層する
ことを特徴とする半導体装置。In a semiconductor device in which element wiring is covered with an SiO2 insulating film containing a large amount of fluorine, the SiO2 insulating film containing a large amount of fluorine is covered with an SiO2 insulating film having a hydrogen concentration of 1 at% or less. Alternatively, a semiconductor device which is stacked.
フッ素濃度を0.２５at％以上１．２５at％以下としたこ
とを特徴とする請求項１記載の半導体装置。2. The semiconductor device according to claim 1, wherein the SiO2 insulating film having a hydrogen concentration of 1 at% or less has a fluorine concentration of 0.25 at% or more and 1.25 at% or less.
素濃度を１at％以下としたSiO2絶縁膜とを積層し、この
積層した絶縁膜を保護絶縁膜により被覆することを特徴
とする請求項１または２記載の半導体装置。3. An SiO2 insulating film containing a large amount of fluorine and an SiO2 insulating film having a hydrogen concentration of 1 at% or less are laminated, and the laminated insulating film is covered with a protective insulating film. Item 3. The semiconductor device according to item 1 or 2.
とする請求項３記載の半導体装置。4. The semiconductor device according to claim 3, wherein the protective insulating film is made of SiN or SiON.
４００℃から５００℃までの温度範囲によるプラズマ化
学気相成長法により形成することを特徴とする半導体装
置の製造方法。5. A method for manufacturing a semiconductor device, wherein an SiO2 insulating film having a hydrogen concentration of 1 at% or less is formed by a plasma chemical vapor deposition method in a temperature range from 400.degree. C. to 500.degree.
５mTorr以下の高真空のプラズマ化学気相成長法により
形成することを特徴とする半導体装置の製造方法。6. A method of manufacturing a semiconductor device, wherein an SiO2 insulating film having a hydrogen concentration of 1 at% or less is formed by a high-vacuum plasma chemical vapor deposition method of 5 mTorr or less.
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|---|---|---|---|
| JP25603199A JP2001085420A (en) | 1999-09-09 | 1999-09-09 | Semiconductor device and manufacturing method therefor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25603199A JP2001085420A (en) | 1999-09-09 | 1999-09-09 | Semiconductor device and manufacturing method therefor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009117821A (en) * | 2007-10-18 | 2009-05-28 | Semiconductor Energy Lab Co Ltd | Method for manufacturing semiconductor device, semiconductor device, and electronic appliance |
| JP6918386B1 (en) * | 2020-12-09 | 2021-08-11 | 株式会社アビット・テクノロジーズ | Manufacturing method of insulating film |
-
1999
- 1999-09-09 JP JP25603199A patent/JP2001085420A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009117821A (en) * | 2007-10-18 | 2009-05-28 | Semiconductor Energy Lab Co Ltd | Method for manufacturing semiconductor device, semiconductor device, and electronic appliance |
| JP6918386B1 (en) * | 2020-12-09 | 2021-08-11 | 株式会社アビット・テクノロジーズ | Manufacturing method of insulating film |
| JP2022091642A (en) * | 2020-12-09 | 2022-06-21 | 株式会社アビット・テクノロジーズ | Method for producing insulation film |
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