JP2001077497A - Printed board and manufacture thereof - Google Patents

Printed board and manufacture thereof

Info

Publication number
JP2001077497A
JP2001077497A JP24779399A JP24779399A JP2001077497A JP 2001077497 A JP2001077497 A JP 2001077497A JP 24779399 A JP24779399 A JP 24779399A JP 24779399 A JP24779399 A JP 24779399A JP 2001077497 A JP2001077497 A JP 2001077497A
Authority
JP
Japan
Prior art keywords
via hole
insulating layer
metal
conductor
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24779399A
Other languages
Japanese (ja)
Inventor
Yoshitaro Yazaki
芳太郎 矢崎
Koji Kondo
宏司 近藤
Tomoyuki Miyagawa
知之 宮川
Takeshi Nagai
武司 永井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP24779399A priority Critical patent/JP2001077497A/en
Priority to DE2000142344 priority patent/DE10042344A1/en
Publication of JP2001077497A publication Critical patent/JP2001077497A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09827—Tapered, e.g. tapered hole, via or groove
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10234—Metallic balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a printed board having via holes which exhibit a high reliability of interlayer connection and its manufacture method. SOLUTION: This printed board has an insulating layer 5, in which at least one via hole 3 is formed, a spherical metal 1 which is inserted into the via hole 3 and has at least a size equal to the thickness of the insulating layer 5 and electrode layers 2 which are formed on the upper and lower sides of the insulating layer 5. The spherical metal 1 and the electrode layers 2 are metal diffusion bonded at the upper and lower openings of the via hole 3.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【技術分野】本発明は，プリント基板及びその製造方法
に関し，特にビアホール内の金属ボール層間接続技術
（ＭＥＢＩＴ：Metal Ball or Balk Interconnection T
echnology)に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board and a method for manufacturing the same, and more particularly to a metal ball or bulk interconnection technology (MEBIT) in a via hole.
echnology).

【０００２】[0002]

【従来技術】プリント基板には，基板層間の電気導通を
行うためのビアホールが設けられている。ビアホールに
導電性を付与する方法として，従来，ビアホール内壁に
金属めっき膜を形成する方法がある。また，基板の配線
高密度化に対応するために，ビアホール内を金属めっき
により埋める方法（特開昭５８−１２１６９８号公報）
や，導電ペーストにてビアホールの穴埋めをしその上下
に電極層を形成し熱プレスにて基板層間の接続を行う方
法（特開平７−１７６８４６号公報）がある。2. Description of the Related Art A printed circuit board is provided with a via hole for electrical conduction between the board layers. As a method for imparting conductivity to a via hole, there is a method of forming a metal plating film on the inner wall of the via hole. Also, a method of filling the inside of a via hole with metal plating in order to cope with high-density wiring of a substrate (Japanese Patent Laid-Open No. 58-121698).
Alternatively, there is a method in which a via hole is filled with a conductive paste, electrode layers are formed above and below the via hole, and connection between the substrate layers is performed by hot pressing (Japanese Patent Laid-Open No. 7-176846).

【０００３】[0003]

【解決しようとする課題】しかしながら，上記導電ペー
ストを用いる従来の層間接続形成方法では，銅箔（電極
層）との接続はペースト成分の樹脂との接着で成り立っ
ており，更にはペースト表面の凹凸，充填密度のバラツ
キによる二次的影響もあり，銅箔とペーストの接続信頼
性が低い。However, in the conventional interlayer connection forming method using the conductive paste, the connection with the copper foil (electrode layer) is realized by bonding with the resin of the paste component, and furthermore, the unevenness on the surface of the paste. Also, there is a secondary effect due to variations in the packing density, and the connection reliability between the copper foil and the paste is low.

【０００４】このため，曲げ応力，熱衝撃などが加わっ
たとき，ビアホール内をめっきで埋める上記従来法と比
べて，ペーストと銅箔との接続が容易に断たれる可能性
がある。[0004] Therefore, when bending stress, thermal shock, or the like is applied, the connection between the paste and the copper foil may be easily broken as compared with the conventional method in which the inside of the via hole is filled with plating.

【０００５】また，ペーストを用いた印刷方法による穴
埋めでは，工程上，製品に有効利用される材料歩留まり
が低く，材料のコストの低下が妨げられていた。また，
ペースト表面のレベリングが必要な場合は研磨工程が必
要となる。一方，デスペンサー法による穴埋め方法は，
材料歩留まりは良いが，一括で穴埋めすることが工法上
困難であるため，穴数が多く，基板面積が大きい場合に
は，工程の負荷がかかる。[0005] In filling holes by a printing method using a paste, the yield of materials effectively used for products is low in the process, and a reduction in material costs has been prevented. Also,
When leveling of the paste surface is required, a polishing step is required. On the other hand, the filling method by the dispenser method is as follows.
Although the material yield is good, it is difficult to fill holes all at once due to the construction method. Therefore, when the number of holes is large and the substrate area is large, the process load is increased.

【０００６】本発明はかかる従来の問題点に鑑み，層間
接続信頼性に優れたビアホールを有するプリント基板及
びその製造方法を提供しようとするものである。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has as its object to provide a printed circuit board having a via hole with excellent interlayer connection reliability and a method of manufacturing the same.

【０００７】[0007]

【課題の解決手段】請求項１の発明は，少なくとも１つ
のビアホールが形成された絶縁層と，上記ビアホール内
に挿入され少なくとも上記絶縁層の厚み以上の大きさを
有する導電体と，上記絶縁層の上下両面に形成された電
極層とを有し，上記ビアホールの上下開口部において，
上記導電体と上記電極層とは金属拡散接合されているこ
とを特徴とするプリント基板である。According to a first aspect of the present invention, there is provided an insulating layer having at least one via hole formed therein, a conductor inserted into the via hole and having a size greater than at least the thickness of the insulating layer, and the insulating layer. And electrode layers formed on both upper and lower surfaces of the via hole.
A printed circuit board, wherein the conductor and the electrode layer are bonded by metal diffusion.

【０００８】本発明において最も注目すべきことは，ビ
アホールの内部に絶縁層の厚み以上の大きさを有する導
電体が挿入されていること，ビアホールの上下開口部を
被覆する電極層と導電体とは金属拡散接合していること
である。In the present invention, the most remarkable point is that a conductor having a size larger than the thickness of the insulating layer is inserted into the via hole, the electrode layer covering the upper and lower openings of the via hole, and the conductor. Means that metal diffusion bonding is performed.

【０００９】本発明の作用及び効果を説明する。ビアホ
ール内の導電体は，その上下開口部を被覆する電極層と
金属拡散接合されている。そのため，導電体の金属成分
が電極層へ拡散し，強固な金属結合を形成する。したが
って，ビアホールの層間接続信頼性が大幅に向上する。The operation and effect of the present invention will be described. The conductor in the via hole is metal-diffusion bonded to an electrode layer covering the upper and lower openings. Therefore, the metal component of the conductor diffuses into the electrode layer, and forms a strong metal bond. Therefore, the reliability of via connection between layers is greatly improved.

【００１０】また，ビアホール内に挿入されている導電
体は，絶縁層の厚み以上の大きさを有する。このため，
導電体をビアホール内に挿入すると，導電体はビアホー
ルの上下開口部と同一面に位置するか又はそれよりもわ
ずかに突出する。それゆえ，加圧加熱により，ビアホー
ルの上下開口部において，導電体と電極層とが確実に金
属拡散接合される。The conductor inserted into the via hole has a size larger than the thickness of the insulating layer. For this reason,
When the conductor is inserted into the via hole, the conductor is flush with or slightly protrudes from the upper and lower openings of the via hole. Therefore, the conductor and the electrode layer are securely bonded to the electrode layer at the upper and lower openings of the via hole by pressurizing and heating.

【００１１】更に，１つの導電体に対してその上下の電
極層と金属拡散接合しているため，プリント基板に曲げ
応力などが加わっても，接続信頼性を確保できる。ま
た，導電体は予め所定形状に成形された有形物であるた
め，ビアホール内の充填密度を均一にすることができ，
従来の導電ペーストのような樹脂の絶縁体が存在しない
ため，優れた低抵抗を示す。以上のように，本発明によ
れば，層間接続性に優れたビアホールを有するプリント
基板を提供することができる。Furthermore, since one conductor is bonded to the upper and lower electrode layers by metal diffusion bonding, connection reliability can be ensured even when bending stress is applied to the printed circuit board. In addition, since the conductor is a tangible material that has been formed in a predetermined shape in advance, the filling density in the via hole can be made uniform,
Since there is no resin insulator such as the conventional conductive paste, it exhibits excellent low resistance. As described above, according to the present invention, it is possible to provide a printed circuit board having a via hole having excellent interlayer connectivity.

【００１２】絶縁層は，熱可塑性樹脂だけでなく，熱硬
化性樹脂も用いることができるが，請求項２の発明のよ
うに，熱可塑性樹脂を用いることが好ましい。熱可塑性
樹脂からなる絶縁層は，導電体と電極層とを金属拡散接
合する際に，軟化し，流動しやすくなるため，確実に電
極層と導電体とが接合する。また，真空中で熱プレスす
ることにより，ビアホール周縁がビアホールと導電体と
の間の間隙を埋めるように回り込み，ビアホールと導電
体とが密着する。したがって，ビアホール内のボイド発
生を抑制できる。As the insulating layer, not only a thermoplastic resin but also a thermosetting resin can be used, but it is preferable to use a thermoplastic resin as in the second aspect of the present invention. The insulating layer made of a thermoplastic resin is softened and easily flows when the conductor and the electrode layer are bonded by metal diffusion, so that the electrode layer and the conductor are securely joined. In addition, by hot pressing in a vacuum, the periphery of the via hole goes around so as to fill the gap between the via hole and the conductor, and the via hole and the conductor adhere to each other. Therefore, generation of voids in the via holes can be suppressed.

【００１３】一方，熱硬化性樹脂の場合には，加熱によ
り絶縁層が硬くなる。そのため，導電体の大きさのバラ
ツキにより，僅かでも絶縁層の厚さよりも導電体の大き
さが小さくなると，電極層との金属拡散接合が不十分に
なるおそれがある。On the other hand, in the case of a thermosetting resin, the insulating layer is hardened by heating. Therefore, if the size of the conductor is slightly smaller than the thickness of the insulating layer due to variation in the size of the conductor, metal diffusion bonding with the electrode layer may be insufficient.

【００１４】絶縁層に用いられる熱可塑性樹脂として
は，例えば，ＰＥＥＫ，ＰＥＩ，ＳＰＳまたはこれらを
ブレンドしたものなどを用いることができ，熱硬化性樹
脂としては，例えばエポキシ系樹脂，フェノール樹脂な
どを用いることができる。絶縁層は，樹脂だけから構成
されていてもよいし，また樹脂とガラスクロス，ガラス
ファイバーなどの補強材との混合材料から構成されてい
てもよい。また，プリント基板は，フレキシブル基板，
リジッド基板，多層基板，ビルドアップ基板などでもよ
い。As the thermoplastic resin used for the insulating layer, for example, PEEK, PEI, SPS or a blend thereof can be used. As the thermosetting resin, for example, epoxy resin, phenol resin, etc. Can be used. The insulating layer may be made of only a resin, or may be made of a mixed material of a resin and a reinforcing material such as glass cloth or glass fiber. The printed circuit board is a flexible board,
A rigid substrate, a multilayer substrate, a build-up substrate, or the like may be used.

【００１５】絶縁層は，１層のみからプリント基板を構
成していてもよいし，複数層積層されて多層プリント基
板を構成していてもよい。請求項３の発明のように，上
記絶縁層は複数枚積層され，積層された各絶縁層には，
上記ビアホールが形成されていることが好ましい。これ
により，プリント基板の高密度実装化を図ることができ
る。プリント基板が多層の絶縁層からなる場合には，隣
接する絶縁層の同一位置にビアホールを設けることによ
り，ビアホールが連なったビアオンビア構造を形成する
ことができる。The printed circuit board may be composed of only one insulating layer, or a multilayer printed circuit board may be composed of a plurality of laminated layers. According to a third aspect of the present invention, a plurality of the insulating layers are stacked, and each of the stacked insulating layers includes:
Preferably, the via hole is formed. As a result, high-density mounting of the printed circuit board can be achieved. When the printed circuit board is composed of multiple insulating layers, a via-on-via structure in which the via holes are connected can be formed by providing via holes at the same position in adjacent insulating layers.

【００１６】絶縁層に形成されているビアホールの上下
開口部の直径は，同じであってもよい。この場合には，
ビアホールは円筒形状になる。また，ビアホールの上下
開口部のうち一方の開口部の直径は，他方の開口部が他
方の開口部よりも大きくてもよい。この場合には，ビア
ホールはテーパ状になる。The diameters of the upper and lower openings of the via holes formed in the insulating layer may be the same. In this case,
The via hole has a cylindrical shape. Further, the diameter of one of the upper and lower openings of the via hole may be larger in the other opening than in the other opening. In this case, the via hole becomes tapered.

【００１７】請求項４の発明のように，上記導電体は，
球状金属からなることが好ましい。導電体の向きを考慮
することなく，ビアホール内に挿入できるからである。
導電体は，卵型，筒状，柱状などでもよい。According to a fourth aspect of the present invention, the conductor is
It is preferred to be made of a spherical metal. This is because it can be inserted into the via hole without considering the direction of the conductor.
The conductor may be oval, cylindrical, columnar, or the like.

【００１８】請求項５の発明のように，上記球状金属の
直径は，上記絶縁層の厚み以上の大きさであることが好
ましい。図１，図２に示すごとく，球状金属１の直径ｂ
が絶縁層５の厚さＴ１と同じか又はそれよりも大きい場
合（ｂ≧Ｔ１）には，球状金属１をビアホール３内に挿
入したときに球状金属１はビアホール３の上下開口部と
同一面に位置するかまたはそれよりも突出する。それゆ
え，加熱加圧により球状金属１と電極層とが確実に接触
し金属拡散接合し，層間接続信頼性が向上する。一方，
球状金属の直径ｂが絶縁層の厚さＴ１よりも小さい場合
(ｂ＜Ｔ１， No.1-4)には，球状金属１がビアホール３
の上下開口部から突出せず，電極層との金属拡散結合が
不十分で接合信頼性が低下するおそれがある。As in the invention of claim 5, the diameter of the spherical metal is preferably larger than the thickness of the insulating layer. As shown in FIGS. 1 and 2, the diameter b of the spherical metal 1
Is equal to or larger than the thickness T1 of the insulating layer 5 (b ≧ T1), when the spherical metal 1 is inserted into the via hole 3, the spherical metal 1 is flush with the upper and lower openings of the via hole 3. Or protruding beyond it. Therefore, the spherical metal 1 and the electrode layer are surely brought into contact with each other by the heat and pressure, and the metal diffusion bonding is performed, and the reliability of interlayer connection is improved. on the other hand,
When the diameter b of the spherical metal is smaller than the thickness T1 of the insulating layer
(b <T1, No. 1-4), the spherical metal 1
And does not protrude from the upper and lower openings, and the metal diffusion bonding with the electrode layer is insufficient, and the bonding reliability may be reduced.

【００１９】球状金属１の直径ｂは，ビアホール３の大
きい方の開口部（図２では下部開口部３１）の直径Ｌ１
と同じかまたはそれよりも小さいこと（ｂ≦Ｌ１）が好
ましい。大きい場合（ｂ＞Ｔ１， No. 8-10)には，球
状金属１をビアホール３内に挿入し難くなるからであ
る。The diameter b of the spherical metal 1 is equal to the diameter L1 of the larger opening (the lower opening 31 in FIG. 2) of the via hole 3.
It is preferable that (b ≦ L1) is equal to or smaller than (b ≦ L1). This is because, when it is large (b> T1, No. 8-10), it becomes difficult to insert the spherical metal 1 into the via hole 3.

【００２０】また，ビアホール３の大きい方の開口部
（図２では下部開口部３１）の直径Ｌ１は，絶縁層５の
厚みＴ１と同じか，またはそれよりも大きいこと（Ｌ１
≧Ｔ１）が好ましい。小さい場合(Ｔ１＞Ｌ１， No.1)
には，球状金属１の直径ｂが絶縁層５の厚みＴ１よりも
小さくならざるを得ず，球状金属１と電極層との金属拡
散接合の信頼性が低下するからである。The diameter L1 of the larger opening (the lower opening 31 in FIG. 2) of the via hole 3 is equal to or larger than the thickness T1 of the insulating layer 5 (L1).
≧ T1) is preferred. When small (T1> L1, No.1)
This is because the diameter b of the spherical metal 1 must be smaller than the thickness T1 of the insulating layer 5, and the reliability of metal diffusion bonding between the spherical metal 1 and the electrode layer decreases.

【００２１】更には，請求項６の発明のように，上記ビ
アホールの上下開口部のうち小さい方の開口部（図２で
は上部開口部３２）の直径Ｌ２は，絶縁層の厚みＴ１以
上の大きさであること（Ｌ２≧Ｔ１）が好ましい。小さ
い場合(Ｌ２＜Ｔ１， No. 7)には，球状金属１をビア
ホール３の中に挿入し難くなり，球状金属１と上下を被
覆する電極層とを金属拡散接合しにくくなるおそれがあ
るからである。以上より，球状金属１の直径ｂは，大き
い方の開口部の直径Ｌ１以下で，かつ絶縁層の厚みＴ１
は小さい方の開口部の直径Ｌ２以下であること（ｂ≦Ｌ
１，Ｔ１≦Ｌ２， No.5,6)が望ましい。Furthermore, the diameter L2 of the smaller one of the upper and lower openings of the via hole (the upper opening 32 in FIG. 2) is larger than the thickness T1 of the insulating layer. (L2 ≧ T1). When the diameter is small (L2 <T1, No. 7), it becomes difficult to insert the spherical metal 1 into the via hole 3, and there is a possibility that the metal diffusion bonding between the spherical metal 1 and the electrode layer covering the upper and lower sides becomes difficult. It is. From the above, the diameter b of the spherical metal 1 is smaller than the diameter L1 of the larger opening and the thickness T1 of the insulating layer.
Is smaller than the diameter L2 of the smaller opening (b ≦ L
1, T1 ≦ L2, No. 5, 6) is desirable.

【００２２】請求項７の発明のように，上記導電体の融
点は，２００〜５００℃であることが好ましい。２００
℃未満では，リフローなどの部品実装時に導電体が溶融
するおそれがあり，５００℃を超える場合には，電極層
との金属拡散接合が低下するおそれがある。Preferably, the conductor has a melting point of 200 to 500 ° C. 200
If the temperature is lower than ℃, the conductor may be melted at the time of component mounting such as reflow. If the temperature is higher than 500 ° C, metal diffusion bonding with the electrode layer may be reduced.

【００２３】上記導電体は，第１の金属と，該第１の金
属の表面に被覆される，第１の金属の融点より低い融点
を有する第２の金属とからなるものでもよい。このよう
な２種類の金属から構成される導電体は，請求項８の発
明のように，第１の金属と，該第１の金属の表面に被覆
される第２の金属とからなり，上記第１の金属の融点は
５００℃以上で，かつ上記第２の金属の融点は上記第１
の金属の融点より低いことが好ましい。これにより，ビ
アホールの層間接続信頼性を向上させることができる。The conductor may be composed of a first metal and a second metal coated on the surface of the first metal and having a melting point lower than the melting point of the first metal. The conductor composed of such two kinds of metals is comprised of a first metal and a second metal coated on the surface of the first metal, as in the invention of claim 8. The melting point of the first metal is 500 ° C. or higher, and the melting point of the second metal is the first metal.
Is preferably lower than the melting point of the metal. As a result, the reliability of via connection between layers can be improved.

【００２４】上記導電体としては，例えば，通常のＳｎ
−Ｐｂ系はんだの他，Ｓｎ，Ｓｎ−Ｃｕ，Ｓｎ−Ａｇ，
Ｓｎ−Ａｕ，Ｓｎ−Ｓｂ，Ｚｎ，Ｓｎ−Ｚｎ，Ｓｎ−Ｃ
ｕ−Ｎｉ，Ｓｎ−Ｃｕ−Ａｇなどを用いることができ
る。As the conductor, for example, ordinary Sn
-Pb-based solder, Sn, Sn-Cu, Sn-Ag,
Sn-Au, Sn-Sb, Zn, Sn-Zn, Sn-C
u-Ni, Sn-Cu-Ag, or the like can be used.

【００２５】本発明のプリント基板は，例えば，車載用
フレキシブル基板，ビルドアップ基板，携帯端末用基板
などを用いることができる。As the printed board of the present invention, for example, a flexible board for a vehicle, a build-up board, a board for a portable terminal, or the like can be used.

【００２６】次に，請求項９の発明は，絶縁層にビアホ
ールを形成する工程と，上記ビアホール内に，上記絶縁
層の厚さ以上の大きさを有する導電体を配置する工程
と，上記絶縁層の上下両面に電極層を形成する工程と，
上記電極層を加熱しながら押圧して，ビアホールの上下
開口部において，上記導電体と上記電極層とを金属拡散
接合する工程とからなることを特徴とするプリント基板
の製造方法である。Next, a ninth aspect of the present invention provides a method of forming a via hole in an insulating layer, a step of arranging a conductor having a size larger than the thickness of the insulating layer in the via hole, Forming electrode layers on both upper and lower surfaces of the layer;
A step of pressing the electrode layer while heating, and performing metal diffusion bonding between the conductor and the electrode layer at upper and lower openings of the via hole.

【００２７】本製造方法では，ビアホール内に導電体を
挿入した後にその上下を被覆する電極層を加熱しながら
押圧している。そのため，導電体の金属成分が電極層へ
拡散すると共に濡れ広がり，強固な金属結合を形成す
る。したがって，ビアホールの層間接続信頼性が大幅に
向上する。In this manufacturing method, after the conductor is inserted into the via hole, the electrode layer covering the upper and lower portions is pressed while heating. As a result, the metal component of the conductor diffuses into the electrode layer and spreads out, forming a strong metal bond. Therefore, the reliability of via connection between layers is greatly improved.

【００２８】また，ビアホール内に挿入されている導電
体は，絶縁層の厚み以上の大きさを有するため，導電体
をビアホール内に挿入すると，導電体の上下端はビアホ
ールの上下開口部と同一面に位置するか又はそれよりも
突出する。それゆえ，ビアホールの上下を被覆する電極
層を加熱しながら押圧すると，導電体と電極層とが確実
に金属拡散接合され，接続抵抗は低く，層間接続信頼性
が向上する。Also, since the conductor inserted into the via hole has a size larger than the thickness of the insulating layer, when the conductor is inserted into the via hole, the upper and lower ends of the conductor are the same as the upper and lower openings of the via hole. Located on the surface or protruding beyond it. Therefore, when the electrode layer covering the upper and lower portions of the via hole is pressed while being heated, the conductor and the electrode layer are securely metal-diffused, the connection resistance is low, and the interlayer connection reliability is improved.

【００２９】更に，１つの導電体に対して上下の電極層
と金属拡散接合しているため，プリント基板に曲げ応力
などが加わっても，接続信頼性を確保できる。また，導
電体は予め所定形状に成形された有形物であるため，ビ
アホール内の充填密度を均一にすることができる。ま
た，表面のレベリング工程が不要となる。Further, since the upper and lower electrode layers are metal-diffusion-bonded to one conductor, connection reliability can be ensured even if bending stress is applied to the printed circuit board. In addition, since the conductor is a tangible material that is formed in a predetermined shape in advance, the filling density in the via hole can be made uniform. Also, a surface leveling step is not required.

【００３０】ビアホールの内部に導電体を挿入するにあ
たっては，導電体を吸引してビアホール内に挿入する方
法，導電体を載せた絶縁層を振動させてビアホール内に
落下させる方法，またはスキージで絶縁層表面近傍を掃
いて導電体をビアホール内に落下させる方法などを用い
ることができる。When a conductor is inserted into the via hole, the conductor is sucked and inserted into the via hole, the insulating layer on which the conductor is placed is vibrated to drop into the via hole, or a squeegee is used for insulation. A method in which the conductor is dropped into the via hole by sweeping the vicinity of the layer surface can be used.

【００３１】ビアホールの上下開口部は，導電体挿入後
に，電極層により被覆され，加熱しながら上下方向から
押圧される。このときの加熱温度は，２００℃〜３００
℃であることが好ましい。２００℃未満では導電体と電
極層とを金属拡散接合しにくくなり，３００℃を超える
場合には，絶縁層が熱可塑性樹脂である場合に，絶縁層
が溶融するおそれがあるからである。The upper and lower openings of the via hole are covered with an electrode layer after the conductor is inserted, and are pressed from above and below while heating. The heating temperature at this time is 200 ° C to 300 ° C.
C. is preferred. If the temperature is lower than 200 ° C., it is difficult to perform metal diffusion bonding between the conductor and the electrode layer. If the temperature exceeds 300 ° C., the insulating layer may be melted when the insulating layer is a thermoplastic resin.

【００３２】また，電極層の押圧力は，１０ｋｇ／ｃｍ
２〜１００ｋｇ／ｃｍ２であることが好ましい。１０ｋ
ｇ／ｃｍ２未満では，導電体と電極層との接合強度が不
足し，１００ｋｇ／ｃｍ２を超える場合には，導電体，
絶縁層の過剰な塑性変形あるいは成形型からの流れ出し
が生じるおそれがあるからである。その他は，上記プリ
ント基板と同様である。The pressing force of the electrode layer is 10 kg / cm
It is preferably 2 to 100 kg / cm 2 . 10k
If it is less than g / cm 2 , the bonding strength between the conductor and the electrode layer is insufficient. If it exceeds 100 kg / cm 2 , the conductor,
This is because excessive plastic deformation of the insulating layer or flow out of the mold may occur. Others are the same as the above-mentioned printed circuit board.

【００３３】[0033]

【発明の実施の形態】実施形態例１ 本発明の実施形態に係るプリント基板について，図３〜
図６を用いて説明する。本例のプリント基板は，図３
（ａ）に示すごとく，複数のビアホール３が形成された
絶縁層５と，ビアホール３内に挿入された球状金属１
と，絶縁層５の上下両面に形成された電極層２とを有す
る。球状金属１は，直径０．５ｍｍの導電体であり，融
点２００〜３００℃，硬度５０ＭＰａのＳｎ−Ａｇ−Ｉ
ｎ−Ｂｉ系材料からなる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment A printed circuit board according to an embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG. The printed circuit board of this example is shown in FIG.
As shown in FIG. 1A, an insulating layer 5 having a plurality of via holes 3 formed therein and a spherical metal 1 inserted into the via holes 3 are provided.
And the electrode layers 2 formed on both upper and lower surfaces of the insulating layer 5. The spherical metal 1 is a conductor having a diameter of 0.5 mm, a melting point of 200 to 300 ° C., and a hardness of 50 MPa, Sn-Ag-I.
It is made of an n-Bi-based material.

【００３４】電極層２は，ビアホール３の上下開口部を
被覆している。ビアホール３の上下開口部において，球
状金属１と電極層２とは金属拡散接合されている。プリ
ント基板７は，１層のみの絶縁層５からなる両面フレキ
シブル基板である。絶縁層５は熱可塑性樹脂からなり，
厚みは０．４ｍｍである。The electrode layer 2 covers the upper and lower openings of the via hole 3. At the upper and lower openings of the via hole 3, the spherical metal 1 and the electrode layer 2 are metal diffusion bonded. The printed board 7 is a double-sided flexible board including only one insulating layer 5. The insulating layer 5 is made of a thermoplastic resin,
The thickness is 0.4 mm.

【００３５】次に，本例のプリント基板の製造方法につ
いて説明する。まず，図４（ａ）に示すごとく，Ｓ１工
程において，厚み０．４ｍｍのフレキシブル基板（ＰＥ
ＥＫとＰＥＩをブレンドした熱可塑性樹脂）を準備し，
これを絶縁層５とする。次に，絶縁層５に，ＮＣドリル
加工またはレーザー加工にてビアホール３を形成する。
ビアホール３は，テーパー状とし，一方の開口部の直径
は０．６ｍｍと大きくし，他方の開口部の直径は０．４
５ｍｍと小さくする。Next, a method of manufacturing the printed circuit board of this embodiment will be described. First, as shown in FIG. 4A, in a step S1, a flexible substrate (PE having a thickness of 0.4 mm) is formed.
EK and PEI blended thermoplastic resin)
This is referred to as an insulating layer 5. Next, via holes 3 are formed in the insulating layer 5 by NC drilling or laser processing.
The via hole 3 is tapered, the diameter of one opening is as large as 0.6 mm, and the diameter of the other opening is 0.4 mm.
Make it as small as 5 mm.

【００３６】次に，Ｓ２工程において，図４（ｂ）に示
すごとく，吸引口６０を有する吸引装置６１によって多
孔質セラミック材６２を介して絶縁層５を吸着する。こ
のとき大きい方の開口部を下に向ける。Next, in the step S2, as shown in FIG. 4B, the insulating layer 5 is sucked through the porous ceramic material 62 by the suction device 61 having the suction port 60. At this time, the larger opening is turned downward.

【００３７】次に，Ｓ３工程において，図４（ｃ）に示
すごとく，絶縁層５を，ケース１９内に収容されている
球状金属１の上に移動させ，絶縁層５を球状金属１に近
づける。すると，球状金属１が，絶縁層５のビアホール
３内に吸引される。この際に，絶縁層５に形成した全て
のビアホール３の中に球状金属１が吸引されるようにす
る。次いで，絶縁層５を振動させ余分な球状金属１をふ
るい落とす。Next, in step S3, as shown in FIG. 4C, the insulating layer 5 is moved onto the spherical metal 1 housed in the case 19, and the insulating layer 5 is brought closer to the spherical metal 1. . Then, the spherical metal 1 is sucked into the via hole 3 of the insulating layer 5. At this time, the spherical metal 1 is sucked into all the via holes 3 formed in the insulating layer 5. Next, the insulating layer 5 is vibrated to remove excess spherical metal 1.

【００３８】次に，Ｓ４工程において，絶縁層５のすべ
てのビアホール３に球状金属１が挿入されたか否かを検
査する。検査方法は，絶縁層の画像を取り込み，正常な
導電体の配列パターンとの比較により導電体の欠品・余
剰の導電体の存在を自動認識する。また，人間の目で導
電体の欠品・余剰を確認してもよい。このとき，正常な
導電体の配列でない場合には，上記Ｓ３工程（図４
（ｃ））にもどる。正常な配列の場合には，次のＳ５工
程（図５（ａ））に進む。Next, in step S4, whether or not the spherical metal 1 has been inserted into all the via holes 3 in the insulating layer 5 is inspected. The inspection method captures an image of the insulating layer and automatically recognizes a missing or surplus conductor by comparing it with a normal conductor array pattern. Further, the missing or surplus of the conductor may be confirmed by human eyes. At this time, if the arrangement of the conductors is not normal, the above S3 step (FIG. 4)
Return to (c)). If the sequence is normal, the process proceeds to the next step S5 (FIG. 5A).

【００３９】Ｓ５工程では，図５（ａ）に示すごとく，
絶縁層５の上下両面に，銅箔を配置し仮プレス加工して
絶縁層５に貼着して，電極層２を形成する。In step S5, as shown in FIG.
Copper foil is arranged on the upper and lower surfaces of the insulating layer 5, temporarily pressed, and adhered to the insulating layer 5 to form the electrode layer 2.

【００４０】次に，Ｓ６工程において，図５（ｂ）に示
すごとく，真空雰囲気中にて絶縁層５を加熱しながら上
下から加圧装置８１，８２により加圧（本プレス）す
る。図５（ｂ）において，符号８４は真空ポンプであ
る。加熱温度は２４０℃であり，圧力は５０ｋｇ／ｃｍ
２である。Next, in step S6, as shown in FIG. 5 (b), the insulating layer 5 is pressurized (main press) by pressing devices 81 and 82 from above and below while heating the insulating layer 5 in a vacuum atmosphere. In FIG. 5B, reference numeral 84 denotes a vacuum pump. Heating temperature is 240 ° C, pressure is 50kg / cm
2 .

【００４１】球状金属１の直径は，絶縁層５の厚みより
も大きいため，加圧加熱されると，図６（ａ）に示すご
とく，ビアホール３内の球状金属１と電極層２とが金属
拡散接合する。更に加圧加熱を続けると，図６（ｂ）に
示すごとく，絶縁層５のビアホール３の周縁が軟化し
て，薄くなるため，確実に電極層２と球状金属１とが確
実に接合される。更に，ビアホール周縁の絶縁層５がプ
レス圧によりビアホール３と球状金属１との間の空隙に
回り込み，図６（ｃ）に示すごとく，ビアホール３と球
状金属１とが密着し，ビアホール内のボイド発生を抑制
できる。Since the diameter of the spherical metal 1 is larger than the thickness of the insulating layer 5, when heated under pressure, as shown in FIG. Diffusion bonding. If the pressure and heating are further continued, as shown in FIG. 6B, the periphery of the via hole 3 in the insulating layer 5 is softened and thinned, so that the electrode layer 2 and the spherical metal 1 are securely joined. . Further, the insulating layer 5 at the periphery of the via hole wraps around the gap between the via hole 3 and the spherical metal 1 due to the pressing pressure, and as shown in FIG. Generation can be suppressed.

【００４２】次に，Ｓ７工程において，図３（ａ）に示
すごとく，電極層２のパターンニングをする。以上によ
り，図３（ａ）に示すプリント基板７が得られる。Next, in step S7, as shown in FIG. 3A, the electrode layer 2 is patterned. Thus, the printed circuit board 7 shown in FIG. 3A is obtained.

【００４３】本例の作用及び効果について説明する。図
３（ａ），図６（ｃ）に示すごとく，ビアホール３内の
球状金属１は，その上下開口部を被覆する電極層２と金
属拡散接合されている。そのため，球状金属１の金属成
分が電極層２へ拡散し，強固な金属結合１０を形成す
る。したがって，ビアホール３の層間接続信頼性が大幅
に向上する。The operation and effect of this embodiment will be described. As shown in FIGS. 3A and 6C, the spherical metal 1 in the via hole 3 is metal diffusion bonded to the electrode layer 2 covering the upper and lower openings. Therefore, the metal component of the spherical metal 1 diffuses into the electrode layer 2 and forms a strong metal bond 10. Therefore, the reliability of interlayer connection of the via hole 3 is greatly improved.

【００４４】また，ビアホール３内に挿入されている球
状金属１は，絶縁層５の厚み以上の大きさを有する。こ
のため，球状金属１をビアホール３内に挿入すると，球
状金属１はビアホール３の上下開口部と同一面に位置す
るか又はそれよりもわずかに突出する。それゆえ，球状
金属１と電極層２とが確実に金属拡散接合される。The spherical metal 1 inserted into the via hole 3 has a size larger than the thickness of the insulating layer 5. Therefore, when the spherical metal 1 is inserted into the via hole 3, the spherical metal 1 is located on the same plane as the upper and lower openings of the via hole 3 or slightly projects therefrom. Therefore, the spherical metal 1 and the electrode layer 2 are surely metal diffusion bonded.

【００４５】更に，１つの球状金属１に対して上下の電
極層２と金属拡散接合しているため，プリント基板に曲
げ応力などが加わっても，接続信頼性を確保できる。ま
た，導電体は予め所定形状に成形された有形物であるた
め，ビアホール内の充填密度を均一にすることができ
る。Furthermore, since the upper and lower electrode layers 2 are metal diffusion bonded to one spherical metal 1, connection reliability can be ensured even if bending stress is applied to the printed circuit board. In addition, since the conductor is a tangible material that is formed in a predetermined shape in advance, the filling density in the via hole can be made uniform.

【００４６】実施形態例２ 本例のプリント基板７は，図３（ｂ）に示すごとく，３
層の絶縁層５からなる多層フレキシブル基板である。各
絶縁層５には，球状金属１を挿入したビアホール３が設
けられている。球状金属１は，ビアホール３の上下開口
部を被覆する電極層２と金属拡散接合している。Embodiment 2 As shown in FIG. 3B, the printed circuit board 7 of this embodiment
This is a multi-layer flexible substrate including a plurality of insulating layers 5. Each insulating layer 5 is provided with a via hole 3 into which the spherical metal 1 is inserted. The spherical metal 1 is metal diffusion bonded to the electrode layer 2 covering the upper and lower openings of the via hole 3.

【００４７】本例のプリント基板を製造するにあたって
は，３枚の絶縁層のそれぞれについて，実施形態例１の
Ｓ１〜Ｓ５（図４（ａ）〜図５（ａ））と同様に，ビア
ホール内への導電体の挿入及び電極層の形成を行う。次
に，図７（ａ）に示すごとく，電極層２のパターンニン
グを行う。このとき，最外層となる電極層２はパターン
ニングしないでおく。In manufacturing the printed circuit board of this example, the three insulating layers were formed in the via holes in the same manner as in S1 to S5 of the first embodiment (FIGS. 4A to 5A). The conductor is inserted into the substrate and the electrode layer is formed. Next, as shown in FIG. 7A, patterning of the electrode layer 2 is performed. At this time, the outermost electrode layer 2 is not patterned.

【００４８】次に，図７（ｂ）に示すごとく，絶縁層５
を積層し，加熱しながら上下方向から加圧装置８１，８
２により加圧する。加熱温度は２４０℃であり，圧力は
５０ｋｇ／ｃｍ２である。これにより，ビアホール３内
の球状金属１と電極層２とが金属拡散接合する。次に，
パターンニングされていない最外層の電極層２のパター
ンニングを行う。以上により，図３（ｂ）に示す本例の
プリント基板７を得る。Next, as shown in FIG.
And pressurizing devices 81, 8 from above and below while heating.
Pressurize by 2. The heating temperature is 240 ° C. and the pressure is 50 kg / cm 2 . As a result, the spherical metal 1 in the via hole 3 and the electrode layer 2 are subjected to metal diffusion bonding. next,
The outermost electrode layer 2 that has not been patterned is patterned. Thus, the printed circuit board 7 of the present example shown in FIG. 3B is obtained.

【００４９】本例のプリント基板も，実施形態例１と同
様に，層間接続信頼性に優れたビアホールを有する。The printed circuit board of this embodiment also has via holes having excellent interlayer connection reliability, as in the first embodiment.

【００５０】実施形態例３ 本例のプリント基板７は，図８（ａ）に示すごとく，５
枚の絶縁層５，５０からなり，その中央の絶縁層５０は
ガラスクロス５０９にエポキシ樹脂（熱硬化性樹脂）を
含浸させたリジッド基板であり，他の絶縁層５はフレキ
シブル基板である。このようにして多層プリント基板７
を構成することにより，中央に配置されたリジッド基板
によって基板強度を確保することができる。Embodiment 3 As shown in FIG. 8A, the printed circuit board 7 of this embodiment
The center insulating layer 50 is a rigid substrate in which a glass cloth 509 is impregnated with an epoxy resin (thermosetting resin), and the other insulating layer 5 is a flexible substrate. Thus, the multilayer printed circuit board 7
With this configuration, the strength of the substrate can be ensured by the rigid substrate disposed at the center.

【００５１】中央の絶縁層５０には，図８（ａ）に示す
ごとく，Ｃｕなどの導電性ペースト９を充填したビアホ
ール３９が設けられている。ビアホール３９の壁面は，
図８（ｂ）に示すごとく，金属めっき膜９８を施した後
に，導電性ペースト９を充填しても良い。また，図９に
示すごとく，ビアホール３９の内部全体を金属めっき９
７で充填してもよい。As shown in FIG. 8A, the central insulating layer 50 is provided with a via hole 39 filled with a conductive paste 9 such as Cu. The wall of the via hole 39
As shown in FIG. 8B, the conductive paste 9 may be filled after the metal plating film 98 is formed. Also, as shown in FIG.
7, it may be filled.

【００５２】中央の絶縁層５０の上下両面には，それぞ
れ２層の絶縁層５が積層されている。絶縁層５には，実
施形態例１と同様に球状金属１が挿入されたビアホール
３が設けられている。球状金属１は，ビアホール３の上
下開口部を被覆する電極層２と金属拡散接合されてい
る。本例のプリント基板７も，実施形態例１と同様に，
層間接続信頼性に優れたビアホール３を有する。On the upper and lower surfaces of the central insulating layer 50, two insulating layers 5 are respectively laminated. The insulating layer 5 is provided with a via hole 3 into which the spherical metal 1 is inserted as in the first embodiment. The spherical metal 1 is metal diffusion bonded to the electrode layer 2 covering the upper and lower openings of the via hole 3. The printed circuit board 7 of this example is also similar to the first embodiment,
It has a via hole 3 having excellent interlayer connection reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明のプリント基板における，ビアホール及
び球状金属の寸法を示すための説明図（ａ），（ｂ）。FIGS. 1A and 1B are diagrams illustrating dimensions of via holes and spherical metal in a printed circuit board according to the present invention. FIGS.

【図２】本発明のプリント基板における，ビアホール及
び球状金属の寸法関係を示すための説明図。FIG. 2 is an explanatory diagram showing a dimensional relationship between a via hole and a spherical metal in the printed circuit board of the present invention.

【図３】実施形態例１のプリント基板の断面説明図
（ａ），及び実施形態例２のプリント基板の断面説明図
（ｂ）。FIGS. 3A and 3B are explanatory cross-sectional views of a printed circuit board according to a first embodiment, and FIGS.

【図４】実施形態例１のプリント基板の製造方法を示す
ための説明図（ａ）〜（ｃ）。FIGS. 4A to 4C are diagrams illustrating a method of manufacturing a printed circuit board according to the first embodiment.

【図５】図４に続く，実施形態例１のプリント基板の製
造方法を示すための説明図（ａ），（ｂ）。FIGS. 5A and 5B are explanatory views subsequent to FIG. 4 for illustrating a method of manufacturing the printed circuit board according to the first embodiment;

【図６】実施形態例１における，ビアホール内の導電体
と電極層との金属拡散接合状態を示すための説明図
（ａ）〜（ｃ）。FIGS. 6A to 6C are diagrams illustrating a metal diffusion bonding state between a conductor in a via hole and an electrode layer according to the first embodiment.

【図７】実施形態例２における，プリント基板の製造方
法説明図（ａ），（ｂ）。FIGS. 7A and 7B are explanatory diagrams of a method of manufacturing a printed circuit board according to the second embodiment.

【図８】実施形態例３のプリント基板の断面説明図
（ａ），（ｂ）。FIGS. 8A and 8B are cross-sectional explanatory views of a printed circuit board according to a third embodiment.

【図９】実施形態例３のプリント基板の断面説明図。FIG. 9 is an explanatory sectional view of a printed circuit board according to a third embodiment;

【符号の説明】[Explanation of symbols]

１．．．導電体， ２．．．電極層， ３，３９．．．ビアホール， ５，５０．．．絶縁層， ７．．．プリント基板， 1. . . Conductor, 2. . . Electrode layer, 3,39. . . Via hole, 5,50. . . 6. insulating layer; . . Printed board,

───────────────────────────────────────────────────── フロントページの続き (72)発明者 宮川 知之 愛知県刈谷市昭和町１丁目１番地 株式会 社デンソー内 (72)発明者 永井 武司 愛知県刈谷市昭和町１丁目１番地 株式会 社デンソー内 Ｆターム(参考） 5E317 AA24 AA25 BB01 BB02 BB03 BB12 BB13 BB14 BB15 BB18 CC01 CC15 CC52 CD21 CD29 CD32 GG16 5E346 AA43 CC08 FF23 FF37 GG08 GG09 GG28 HH31  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Tomoyuki Miyagawa 1-1-1, Showa-cho, Kariya-shi, Aichi Prefecture Inside Denso Corporation (72) Inventor Takeshi Nagai 1-1-1, Showa-cho, Kariya-shi, Aichi Prefecture Denso Corporation F term (reference) 5E317 AA24 AA25 BB01 BB02 BB03 BB12 BB13 BB14 BB15 BB18 CC01 CC15 CC52 CD21 CD29 CD32 GG16 5E346 AA43 CC08 FF23 FF37 GG08 GG09 GG28 HH31

Claims (9)

【特許請求の範囲】[Claims] 【請求項１】 少なくとも１つのビアホールが形成され
た絶縁層と，上記ビアホール内に挿入され少なくとも上
記絶縁層の厚み以上の大きさを有する導電体と，上記絶
縁層の上下両面に形成された電極層とを有し，上記ビア
ホールの上下開口部において，上記導電体と上記電極層
とは金属拡散接合されていることを特徴とするプリント
基板。1. An insulating layer having at least one via hole formed therein, a conductor inserted into the via hole and having a size greater than at least the thickness of the insulating layer, and electrodes formed on both upper and lower surfaces of the insulating layer. And a metal diffusion bonding between the conductor and the electrode layer at upper and lower openings of the via hole. 【請求項２】 請求項１において，上記絶縁層は熱可塑
性樹脂からなることを特徴とするプリント基板。2. The printed circuit board according to claim 1, wherein said insulating layer is made of a thermoplastic resin. 【請求項３】 請求項１または２において，上記絶縁層
は複数枚積層され，積層された各絶縁層には，上記ビア
ホールが形成されていることを特徴とするプリント基
板。3. The printed circuit board according to claim 1, wherein a plurality of the insulating layers are stacked, and the via holes are formed in each of the stacked insulating layers. 【請求項４】 請求項１〜３のいずれか１項において，
上記導電体は，球状金属からなることを特徴とするプリ
ント基板。4. The method according to claim 1, wherein:
The printed circuit board, wherein the conductor is made of a spherical metal. 【請求項５】 請求項４において，上記球状金属の直径
は，上記絶縁層の厚み以上の大きさであることを特徴と
するプリント基板。5. The printed circuit board according to claim 4, wherein the diameter of the spherical metal is larger than the thickness of the insulating layer. 【請求項６】 請求項１〜５のいずれか１項において，
上記ビアホールの上下開口部のうち小さい方の開口部の
直径は，絶縁層の厚み以上の大きさであることを特徴と
するプリント基板。6. The method according to claim 1, wherein:
A printed circuit board, wherein a diameter of a smaller one of upper and lower openings of the via hole is larger than a thickness of an insulating layer. 【請求項７】 請求項１〜６のいずれか１項において，
上記導電体の融点は，２００〜５００℃であることを特
徴とするプリント基板。7. The method according to claim 1, wherein:
A printed circuit board, wherein the conductor has a melting point of 200 to 500C. 【請求項８】 請求項１〜７のいずれか１項において，
上記導電体は，第１の金属と，該第１の金属の表面に被
覆される第２の金属とからなり，上記第１の金属の融点
は５００℃以上で，かつ上記第２の金属の融点は上記第
１の金属の融点より低いことを特徴とするプリント基
板。8. The method according to claim 1, wherein:
The conductor comprises a first metal and a second metal coated on the surface of the first metal, the first metal having a melting point of 500 ° C. or more, and the second metal having a melting point of 500 ° C. or more. A printed circuit board having a melting point lower than the melting point of the first metal. 【請求項９】 絶縁層にビアホールを形成する工程と，
上記ビアホール内に，上記絶縁層の厚さ以上の大きさを
有する導電体を配置する工程と，上記絶縁層の上下両面
に電極層を形成する工程と，上記電極層を加熱しながら
押圧して，ビアホールの上下開口部において，上記導電
体と上記電極層とを金属拡散接合する工程とからなるこ
とを特徴とするプリント基板の製造方法。9. A step of forming a via hole in the insulating layer,
A step of disposing a conductor having a size equal to or greater than the thickness of the insulating layer in the via hole, a step of forming electrode layers on both upper and lower surfaces of the insulating layer, and pressing the electrode layer while heating. And a step of metal-diffusion-bonding the conductor and the electrode layer at upper and lower openings of the via hole.
JP24779399A 1999-09-01 1999-09-01 Printed board and manufacture thereof Pending JP2001077497A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP24779399A JP2001077497A (en) 1999-09-01 1999-09-01 Printed board and manufacture thereof
DE2000142344 DE10042344A1 (en) 1999-09-01 2000-08-29 Printed circuit board has conductive elements fitted in openings in insulation layer for providing connections between electrode layers on opposite sides of insulation layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24779399A JP2001077497A (en) 1999-09-01 1999-09-01 Printed board and manufacture thereof

Publications (1)

Publication Number Publication Date
JP2001077497A true JP2001077497A (en) 2001-03-23

Family

ID=17168744

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (2)

Country Link
JP (1) JP2001077497A (en)
DE (1) DE10042344A1 (en)

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