JP2000049382A - Semiconductor light-emitting device and its manufacture - Google Patents
Semiconductor light-emitting device and its manufactureInfo
- Publication number
- JP2000049382A JP2000049382A JP10210604A JP21060498A JP2000049382A JP 2000049382 A JP2000049382 A JP 2000049382A JP 10210604 A JP10210604 A JP 10210604A JP 21060498 A JP21060498 A JP 21060498A JP 2000049382 A JP2000049382 A JP 2000049382A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- copper foil
- electrode
- emitting device
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、面実装型の半導体
発光装置に係り、特に半導体発光素子（以下、「ＬＥ
Ｄ」と記す）を搭載する基板に設ける電極も含めてパッ
ケージに内包して小型化できるようにした半導体発光装
置とその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device of a surface mount type, and more particularly to a semiconductor light emitting device (hereinafter referred to as "LE").
D) is included in a package including an electrode provided on a substrate on which the semiconductor light-emitting device is mounted, and can be miniaturized, and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】たとえば携帯電話やポケットベル等の小
型電子機器の画像表示部には、小型で薄型のチップ型Ｌ
ＥＤが主として利用されている。チップＬＥＤは、絶縁
性の基板の表裏両面に互いに導通し合う一対の電極を設
け、表面の一方の電極にＬＥＤの下面のたとえばｎ電極
を導通させて搭載するとともに上面のｐ電極をワイヤに
よって他方の電極にボンディングするというのがその基
本的な構成である。2. Description of the Related Art For example, an image display section of a small electronic device such as a mobile phone or a pager has a small and thin chip type L.
ED is mainly used. The chip LED is provided with a pair of electrodes that are electrically connected to each other on both the front and back surfaces of an insulating substrate, and is mounted with one electrode on the front surface, for example, an n-electrode on the lower surface of the LED being electrically connected, and the p-electrode on the upper surface is connected to the other by a wire. The basic configuration is to bond to the electrodes.
【０００３】このようなチップＬＥＤとして、たとえば
特公平７−９３３３８号公報に記載のものがあり、図５
にその外観図を示す。As such a chip LED, there is one described in, for example, Japanese Patent Publication No. Hei 7-93338.
Fig. 2 shows its external view.
【０００４】図５において、絶縁性の基板５１の両端部
には、スルーホール５２ａ，５２ｂを通して表面側と裏
面側に導通展開させた表面電極５３，５４と裏面電極５
５，５６が形成されている。一方の表面電極５４は基板
５１の中央部まで延びてステージ５４ａを形成し、その
上にＬＥＤ素子５７を導通させて搭載している。他方の
表面電極５３にはステージ５４ａ側に突き出したボンデ
ィングエリア５３ａを形成し、このボンディングエリア
５３ａとＬＥＤ素子５７の表面側の電極とをワイヤ５８
によってボンディングしている。そして、ほぼ円弧状の
表面電極５３，５４部分を除いて樹脂のパッケージ５９
によって封止され、これによりチップＬＥＤが得られ
る。In FIG. 5, at both ends of an insulating substrate 51, front electrodes 53 and 54 and back electrodes 5 which are conductively developed on the front and rear sides through through holes 52a and 52b are provided.
5, 56 are formed. One surface electrode 54 extends to the center of the substrate 51 to form a stage 54a, on which the LED element 57 is mounted in a conductive state. A bonding area 53a protruding toward the stage 54a is formed on the other surface electrode 53, and the bonding area 53a and the electrode on the surface side of the LED element 57 are connected to a wire 58.
Bonding. Then, the resin package 59 is removed except for the substantially arc-shaped surface electrodes 53 and 54.
To obtain a chip LED.
【０００５】チップＬＥＤの電子機器の表示部への実装
は、表示部に備えたプリント配線基板（図示せず）の配
線パターンに対応させて裏面電極５５，５６を搭載し半
田付けによって導通固定される。そして、プリント配線
基板側の配線パターンとＬＥＤ素子５７とはスルーホー
ル５２ａ，５２ｂによって導通している表裏両面の電極
５３，５４，５５，５６によって接続され、画像信号に
基づいてＬＥＤ素子５７を点滅させることができる。When mounting the chip LED on the display section of the electronic device, the back electrodes 55 and 56 are mounted in correspondence with the wiring pattern of a printed wiring board (not shown) provided in the display section, and are conductively fixed by soldering. You. The wiring pattern on the printed wiring board and the LED element 57 are connected by electrodes 53, 54, 55, and 56 on both the front and back surfaces, which are conductive through the through holes 52a and 52b, and blink the LED element 57 based on an image signal. Can be done.
【０００６】図示のような構造を持つチップＬＥＤの製
造は、一般的には次の工程の順による。The manufacture of a chip LED having the structure shown in the figure generally follows the following steps.
【０００７】まず、基板５１の素材となる平板状の絶縁
材料に一定のピッチで孔を開けておき、この孔の内部と
これに連なる表裏両面に電極及びスルーホールを形成す
るための金属層をメッキ処理によって形成したものを準
備する。次いで、ステージ５４ａの上にＬＥＤ素子５７
を実装するとともにワイヤ５８を表面電極５３のボンデ
ィングエリア５３ａにボンディングする。そして、絶縁
材料の全面にＬＥＤ素子５７の実装とワイヤ５８のボン
ディングが施された後、金型を被せて樹脂を注入するこ
とによりパッケージ５９を形成する。この後、最終工程
として、絶縁材料の孔の中心を通る面と表裏両面の電極
５３〜５６を挟む面とをカット面としてダイシングする
ことによって、図５に示すチップＬＥＤが得られる。First, holes are formed at a constant pitch in a flat insulating material serving as a material of the substrate 51, and a metal layer for forming electrodes and through holes is formed on the inside of the holes and on both front and back surfaces connected to the holes. A product formed by plating is prepared. Next, the LED element 57 is placed on the stage 54a.
And bonding the wire 58 to the bonding area 53 a of the surface electrode 53. Then, after mounting the LED elements 57 and bonding the wires 58 on the entire surface of the insulating material, the package 59 is formed by covering the mold and injecting resin. Thereafter, as a final step, the chip LED shown in FIG. 5 is obtained by dicing the surface passing through the center of the hole of the insulating material and the surface sandwiching the electrodes 53 to 56 on the front and back surfaces as a cut surface.
【０００８】[0008]
【発明が解決しようとする課題】ところが、絶縁材料の
孔を突っ切る方向にダイシングするときに、絶縁材料に
比べて硬い金属層を剪断するので、ダイシングソーの剪
断負荷を比較的大きくとる必要がある。このためダイシ
ングソーとしては樹脂や絶縁材料のカットの場合に比べ
ると肉厚のものを使うことになり、したがってダイシン
グによって剪断される切り幅も大きくなる。このため、
平板状の絶縁材料から最終製品を得るときに、この切り
幅によるロス分に対応して製品部数が減ることになり、
絶縁材料の利用効率の低下や生産性にも影響を及ぼす。However, when dicing in a direction to cut through the hole of the insulating material, the metal layer harder than the insulating material is sheared, so that the shearing load of the dicing saw needs to be relatively large. . For this reason, a thicker dicing saw is used as compared with the case of cutting a resin or an insulating material, and therefore, the cutting width sheared by dicing becomes larger. For this reason,
When obtaining the final product from a flat insulating material, the number of product parts will be reduced corresponding to the loss due to this cutting width,
This also affects the efficiency of use of insulating materials and productivity.
【０００９】また、図５の従来例において、表面電極５
３はスルーホール５２ａを介して裏面電極５５に導通さ
せる部分に加えて、ワイヤ５８接続のためのボンディン
グエリア５３ａを拡げておく必要がある。このため、ス
テージ５４ａを基板５１の中央部分まで延ばした表面電
極５４とボンディングエリア５３ａを突き出した表面電
極５３とがそれぞれ対向する方向の寸法は長くなってし
まう。Further, in the conventional example shown in FIG.
No. 3 requires that the bonding area 53a for connecting the wire 58 be expanded in addition to the portion for conducting to the back electrode 55 through the through hole 52a. For this reason, the dimension in the direction in which the surface electrode 54 extending the stage 54a to the center of the substrate 51 and the surface electrode 53 projecting from the bonding area 53a face each other becomes longer.
【００１０】一方、ＬＥＤ素子５７をワイヤ５８でボン
ディングする場合では、ワイヤ５８の断線の予防のため
逆Ｕ字状に立ち上げる配線とすることが多い。このため
パッケージ５９もこのワイヤ５８を納めるのに必要な高
さ寸法に制約されるので、チップＬＥＤの分野では一般
的に薄型化には限界があるとされている。On the other hand, when bonding the LED element 57 with the wire 58, the wire is often raised in an inverted U-shape in order to prevent the wire 58 from breaking. For this reason, the package 59 is also restricted by the height required for accommodating the wire 58, and it is generally said that there is a limit to the reduction in thickness in the field of chip LEDs.
【００１１】以上のことから、従来構造では、チップＬ
ＥＤの高さ方向及び平面形状のいずれについてもその小
型化に制約を受け、搭載する携帯用の電子機器への汎用
性に影響を及ぼすことになる。From the above, according to the conventional structure, the chip L
Both the height direction and the planar shape of the ED are restricted by miniaturization, which affects the versatility of the portable electronic device to be mounted.
【００１２】このように、スルーホールを利用して表面
側と裏面側の電極を導通させるチップ型のＬＥＤでは基
板用の絶縁材料の有効利用や製品歩留りの点で十分では
なく、得られる最終製品の小型化にも限界があるという
問題がある。As described above, the chip type LED in which the electrodes on the front surface and the back surface are electrically connected by using the through holes is not sufficient in terms of the effective use of the insulating material for the substrate and the product yield. There is a problem in that there is a limit to miniaturization of the device.
【００１３】本発明において解決すべき課題は、基板用
の絶縁材料からの製品取得数を増やして材料利用率を向
上させるとともにより一層小型化が図れる面実装型の半
導体発光装置を提供することにある。The problem to be solved in the present invention is to provide a surface-mounted semiconductor light-emitting device which can increase the number of products obtained from insulating materials for a substrate, improve the material utilization rate, and can further reduce the size. is there.
【００１４】[0014]
【課題を解決するための手段】本発明の半導体発光装置
は、絶縁性の基板と、前記基板の裏面にパターン形成さ
れた裏面電極と、前記基板の表面にパターン形成された
表面電極と、この表面電極のパターンに導電性接着剤に
よりｐ側及びｎ側の電極を導通させて搭載する発光素子
とを備え、前記基板には前記裏面電極を表面電極側に臨
ませる導通用孔を貫通させて設け、前記表面電極を前記
導通用孔の内部に没入させて前記裏面電極の表面に導通
接続してなることを特徴とする。A semiconductor light emitting device according to the present invention comprises an insulating substrate, a back electrode patterned on the back surface of the substrate, a front electrode patterned on the surface of the substrate, and A light-emitting element for mounting the p-side and n-side electrodes in a conductive adhesive on the pattern of the front electrode, and mounting the light-emitting element on the substrate. The front surface electrode is immersed in the inside of the hole for conduction, and is electrically connected to the surface of the back electrode.
【００１５】この構成では、発光素子と裏面電極との間
を、導通用孔の中まで没入させる表面電極を利用して導
通させるので、従来のスルーホールとボンディングエリ
アの役目の両方を表面電極に担わせることができる。In this configuration, the light emitting element and the back surface electrode are electrically connected by using the front surface electrode which is immersed into the conduction hole. Therefore, both the conventional through hole and the bonding area are used as the front surface electrode. Can be carried.
【００１６】[0016]
【発明の実施の形態】請求項１に記載の発明は、絶縁性
の基板と、前記基板の裏面にパターン形成された裏面電
極と、前記基板の表面にパターン形成された表面電極
と、この表面電極のパターンに導電性接着剤によりｐ側
及びｎ側の電極を導通させて搭載する発光素子とを備
え、前記基板には前記裏面電極を表面電極側に臨ませる
導通用孔を貫通させて設け、前記表面電極を前記導通用
孔の内部に没入させて前記裏面電極の表面に導通接続し
てなるものであり、従来のスルーホールとボンディング
エリアの役目の両方を表面電極に担わせることができ、
装置全体の小型化が図れるという作用を有する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention according to claim 1 is an invention comprising an insulating substrate, a back electrode patterned on the back surface of the substrate, a front electrode patterned on the surface of the substrate, A light-emitting element for mounting the p-side and n-side electrodes in conduction with a conductive adhesive on the electrode pattern, and the substrate is provided with a conduction hole that exposes the back surface electrode to the front surface electrode. The surface electrode is immersed inside the conduction hole and is electrically connected to the surface of the back electrode, so that the surface electrode can serve both as a conventional through hole and a bonding area. ,
This has the effect of reducing the size of the entire device.
【００１７】請求項２に記載の発明は、前記導通用孔の
中に没入する表面電極を前記導通用孔の内周面に沿う断
面形状とし、前記導通用孔の中の表面電極によって形成
される凹部を前記導電性接着剤の余剰分の溜まり部とし
てなる請求項１記載の半導体発光装置であり、導電性接
着剤の塗布量が過大になっても導通用孔部分の凹部に溜
めることでパッケージの外側への漏れを防止するという
作用を有する。According to a second aspect of the present invention, the surface electrode immersed in the conductive hole has a cross-sectional shape along the inner peripheral surface of the conductive hole, and is formed by the surface electrode in the conductive hole. 2. The semiconductor light-emitting device according to claim 1, wherein the recessed portion serves as a surplus portion of the conductive adhesive. Even when the amount of the conductive adhesive applied is excessive, the portion is stored in the recessed portion of the conduction hole. This has the effect of preventing leakage to the outside of the package.
【００１８】請求項３に記載の発明は、前記発光素子と
導通用孔を含む外郭形状の樹脂のパッケージを前記基材
側と一体に成形してなる請求項１または２記載の半導体
発光装置であり、パッケージ内部に裏面側の電極との導
通部も含めてまとめて収納できるという作用を有する。According to a third aspect of the present invention, there is provided the semiconductor light emitting device according to the first or second aspect, wherein an outer shape resin package including the light emitting element and the conduction hole is formed integrally with the base material side. There is an effect that the package can be collectively stored inside the package, including a conductive portion with the electrode on the back side.
【００１９】請求項４に記載の発明は、請求項３記載の
半導体発光装置の製造方法であって、裏面に裏面銅箔を
形成した絶縁性の基材に前記導通用孔を開ける工程と、
前記基材の表面側の表面銅箔を張り巡らすとともに前記
導通用孔に対応する部分をこの導入孔の中に没入させて
前記裏面銅箔に接合する工程と、前記裏面銅箔及び表面
銅箔のそれぞれをエッチング法によりパターン形成する
工程と、エッチングされた前記表面銅箔のパターン上に
発光素子を実装搭載する工程と、前記発光素子のｐ側及
びｎ側の電極を含んで充填される導電性接着剤により前
記発光素子を前記表面銅箔に導通させて前記基材側に固
定する工程と、前記発光素子を含んで前記基材の表面側
を光透過性の樹脂によって封止する工程と、前記基材と
表裏両面の銅箔を前記導通用孔よりも外側の領域をカッ
ト面としてダイシングする工程とを含む半導体発光装置
の製造方法であり、裏面側の電極との導通部を含めて樹
脂のパッケージで封止して小型化できるという作用を有
する。According to a fourth aspect of the present invention, there is provided the method for manufacturing a semiconductor light emitting device according to the third aspect, wherein the conductive hole is formed in an insulating base material having a back surface copper foil formed on a back surface;
A step of spreading a surface copper foil on the front surface side of the base material and immersing a portion corresponding to the hole for conduction into the introduction hole and joining it to the rear surface copper foil; and Forming a pattern by an etching method, mounting and mounting a light emitting element on the etched pattern of the surface copper foil, and filling the conductive layer including the p-side and n-side electrodes of the light emitting element. Fixing the light emitting element to the substrate side by conducting the light emitting element to the surface copper foil with a conductive adhesive, and sealing the surface side of the substrate including the light emitting element with a light transmitting resin. Dicing the substrate and the copper foil on both the front and back surfaces with a region outside the hole for conduction as a cut surface, including a conductive portion with the electrode on the back surface side. In resin package Sealed such an action can be miniaturized.
【００２０】請求項５に記載の発明は、前記表面銅箔を
前記導通用孔の中に没入させて前記裏面銅箔に接合する
工程を、レーザー溶融法により実行する請求項４記載の
半導体発光装置の製造方法であり、表面及び裏面の電極
の必要な部分だけをレーザー溶融によって溶接部が形成
されるように絞り込みができるので、容易に且つ高精度
で接続できるという作用を有する。According to a fifth aspect of the present invention, in the semiconductor light emitting device according to the fourth aspect, the step of immersing the front surface copper foil in the conduction hole and joining the lower surface copper foil to the rear surface copper foil is performed by a laser melting method. This is a method of manufacturing the device, and since only necessary portions of the electrodes on the front surface and the back surface can be narrowed down so that a welded portion is formed by laser melting, there is an effect that the connection can be easily and accurately performed.
【００２１】請求項６に記載の発明は、前記表面銅箔を
前記導通用孔の中に没入させて前記裏面銅箔に接合する
工程を、超音波圧着によるかしめ法により実行する請求
項４記載の半導体発光装置の製造方法であり、表面及び
裏面の電極の必要な部分だけを超音波圧着によって溶接
部が形成されるように絞り込みができるので、容易に且
つ高精度で接続できるという作用を有する。According to a sixth aspect of the present invention, the step of immersing the front surface copper foil in the conduction hole and joining the rear surface copper foil to the rear surface copper foil is performed by a caulking method using ultrasonic pressure bonding. The method of manufacturing a semiconductor light emitting device according to the above, wherein only necessary portions of the electrodes on the front surface and the back surface can be narrowed down so that a welded portion is formed by ultrasonic pressure bonding, so that the connection can be easily and accurately performed. .
【００２２】請求項７に記載の発明は、前記表面銅箔を
前記導通用孔の中に没入させて前記裏面銅箔に接合する
工程を、無電解銅メッキ法により実行する請求項４記載
の半導体発光装置の製造方法であり、レーザー溶融法や
超音波圧着の設備がなくても従来のプリント配線基板の
製造のためのめっき設備をそのまま利用して簡単に製造
できるという作用を有する。According to a seventh aspect of the present invention, the step of immersing the front surface copper foil in the hole for conduction and joining the copper foil to the rear surface copper foil is performed by an electroless copper plating method. This is a method for manufacturing a semiconductor light emitting device, and has an effect that it can be easily manufactured using the conventional plating equipment for manufacturing a printed wiring board as it is without the equipment for laser melting or ultrasonic pressure bonding.
【００２３】以下に、本発明の実施の形態の具体例につ
いて図面を参照しながら説明する。図１は本発明の面実
装型の半導体発光装置の縦断面図、図２はその外観斜視
図である。Hereinafter, specific examples of the embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a longitudinal sectional view of a surface-mount type semiconductor light emitting device of the present invention, and FIG. 2 is an external perspective view thereof.
【００２４】図１において、絶縁性の基板１の底面に裏
面電極２を形成するとともに、基板１の表面側に裏面電
極２に導通接合された表面電極３が形成されている。こ
れらの裏面電極２及び表面電極３には、ＮｉまたはＡｌ
等を素材としたメッキ層２ａ，３ａを積層し、表面電極
３のメッキ層３ａの上に発光素子４を搭載している。In FIG. 1, a back electrode 2 is formed on the bottom surface of an insulating substrate 1 and a front electrode 3 electrically connected to the back electrode 2 is formed on the front surface of the substrate 1. The back electrode 2 and the front electrode 3 are made of Ni or Al.
The light emitting element 4 is mounted on the plating layer 3a of the surface electrode 3 by laminating the plating layers 2a and 3a made of the same material.
【００２５】発光素子４は、たとえばＧａＡｌＡｓやＧ
ａＰ等の半導体化合物を利用したもので、その結晶成長
基板の表面にｎ側電極４ａを備えるとともにｐ型層の表
面にｐ側電極４ｂを形成している。このような発光素子
４は、ＬＥＤランプに組み込む場合ではｎ側電極４ａを
リードフレームに搭載してｐ側電極４ｂを発光方向とし
てアセンブリされるが、本発明ではｎ側及びｐ側の電極
４ａ，４ｂが左右を向く姿勢として搭載する。したがっ
て、ｎ型層とｐ型層との接合域の発光層４ｃはほぼ鉛直
の姿勢の層として形成され、この発光層４ｃからの光は
図示の姿勢の発光素子４の上面から取り出される。The light emitting element 4 is made of, for example, GaAlAs or G
It utilizes a semiconductor compound such as aP, and has an n-side electrode 4a on the surface of the crystal growth substrate and a p-side electrode 4b on the surface of the p-type layer. When such a light emitting element 4 is incorporated in an LED lamp, the n-side electrode 4a is mounted on a lead frame and the p-side electrode 4b is assembled with the light emitting direction. In the present invention, the n-side and p-side electrodes 4a, 4b is mounted as a posture facing left and right. Therefore, the light-emitting layer 4c in the junction region between the n-type layer and the p-type layer is formed as a substantially vertical layer, and light from the light-emitting layer 4c is extracted from the upper surface of the light-emitting element 4 in the illustrated position.
【００２６】表面電極３のメッキ層３ａの上に搭載され
た発光素子４は、導電性接着剤たとえば硬化性樹脂の中
にＡｇをフィラーとして混入したＡｇペースト５によっ
て固定される。このＡｇペースト５はメッキ層３ａの表
面に積層されるとともにｎ側及びｐ側の電極４ａ，４ｂ
を被覆することにより、発光素子４は裏面電極２側と導
通する。したがって、基板１を表示装置のプリント配線
基板（図示せず）の表面に実装して裏面電極２を配線パ
ターンに導通させることにより、発光素子４に画像情報
に基づく順方向の電流を流すことができる。The light emitting element 4 mounted on the plating layer 3a of the surface electrode 3 is fixed by an Ag paste 5 in which Ag is mixed as a filler in a conductive adhesive such as a curable resin. The Ag paste 5 is laminated on the surface of the plating layer 3a, and the n-side and p-side electrodes 4a, 4b
, The light emitting element 4 conducts with the back electrode 2 side. Therefore, by mounting the substrate 1 on the surface of a printed wiring board (not shown) of the display device and conducting the back electrode 2 to the wiring pattern, a forward current based on the image information can flow through the light emitting element 4. it can.
【００２７】更に、Ａｇペースト５によって固定された
発光素子４を含めて光透過性の樹脂を用いて封止し、こ
の樹脂封止を型製作によってパッケージ６とすることで
面実装型の半導体発光装置が得られる。Further, the light-emitting element 4 including the light-emitting element 4 fixed by the Ag paste 5 is sealed with a light-transmitting resin, and this resin sealing is made into a package 6 by molding to form a surface-mounted semiconductor light emitting element. A device is obtained.
【００２８】ここで、本発明の半導体発光装置では、発
光素子４を搭載する基板１には、この発光素子４を挟ん
だ部分に一対の導通用孔１ａが設けられている。この導
通用孔１ａは、図５の従来例におけるスルーホールと同
様の役割を持たせようとしたものである。すなわち、図
１から明らかなように、表面電極３を導通用孔１ａの中
に没入させ、その下端部を裏面電極２の表面に重合して
導通させ、これによってプリント配線基板と発光素子４
とを導通させることができる。Here, in the semiconductor light-emitting device of the present invention, the substrate 1 on which the light-emitting element 4 is mounted is provided with a pair of conduction holes 1a at a portion sandwiching the light-emitting element 4. This conduction hole 1a is intended to have the same role as the through hole in the conventional example of FIG. That is, as is apparent from FIG. 1, the surface electrode 3 is immersed in the conduction hole 1a, and the lower end thereof is superimposed on the surface of the back electrode 2 to conduct electricity.
Can be conducted.
【００２９】また、Ａｇペースト５は発光素子４の左右
両面部分に塗布される。このとき、Ａｇペースト５の塗
布量と領域は適正に制御されているが、不足すると発光
素子４が不安定となるほか電気的導通にも支障をきたす
ので、塗布量を多めにすることが好ましい。ところが、
塗布量が多すぎると、ダイシングするときにパッケージ
６のエッジからＡｇペースト５がはみ出すことがあり、
アセンブリに与える影響は大きく、プリント配線基板上
に実装して製品化するときの短絡の恐れもある。The Ag paste 5 is applied to both left and right sides of the light emitting element 4. At this time, the application amount and the area of the Ag paste 5 are properly controlled. However, if the application amount is insufficient, the light emitting element 4 becomes unstable and the electrical conduction is hindered. Therefore, it is preferable to increase the application amount. . However,
If the coating amount is too large, the Ag paste 5 may protrude from the edge of the package 6 when dicing,
The influence on the assembly is large, and there is also a risk of short-circuiting when the product is mounted on a printed wiring board and commercialized.
【００３０】これに対し、本発明では基板１に導通用孔
１ａを開けているので、余剰のＡｇペースト５はこの導
通用孔１ａの中に流れ込み、基板１のエッジ側への漏れ
出しが抑えられる。したがって、パッケージ６から剥き
出しになることなく短絡が防止され、メッキ層３ａとの
接触面積も広くなるので、発光素子４の安定した固定及
び表面電極３との間の確実な導通が得られる。On the other hand, in the present invention, since the conductive holes 1a are formed in the substrate 1, the excess Ag paste 5 flows into the conductive holes 1a, and the leakage of the Ag paste 5 to the edge side of the substrate 1 is suppressed. Can be Therefore, a short circuit is prevented without being exposed from the package 6, and the contact area with the plating layer 3a is increased, so that stable fixing of the light emitting element 4 and reliable conduction with the surface electrode 3 can be obtained.
【００３１】更に、発光素子４についてはワイヤレスボ
ンディングとなるので、図５の従来構造に比べると高さ
寸法を小さくできる。また、従来構造では、裏面側の電
極との導通のためのスルーホールとワイヤボンディング
のためのボンディングエリアとの両方を電極に持たせる
必要があった。これに対し、本発明では、導通用孔１ａ
に入り込んだ表面電極３とそのメッキ層３ａは、従来構
造におけるワイヤのボンディング（本発明では、Ａｇペ
ースト５の塗布）と裏面電極との導通の両方を兼ねる。
したがって、ボンディングエリアとスルーホールが占め
る嵩を大幅に小さくでき、全体の小型化が図られる。Further, since the light emitting element 4 is wirelessly bonded, the height can be reduced as compared with the conventional structure shown in FIG. Further, in the conventional structure, it is necessary to provide the electrode with both a through hole for conduction with the electrode on the back side and a bonding area for wire bonding. On the other hand, in the present invention, the conduction hole 1a
The penetrated front surface electrode 3 and its plating layer 3a have both functions of wire bonding (application of the Ag paste 5 in the present invention) and conduction with the back surface electrode in the conventional structure.
Therefore, the bulk occupied by the bonding area and the through hole can be significantly reduced, and the overall size can be reduced.
【００３２】図３及び図４は本発明の半導体発光装置の
製造工程を順に示す概略図であって、ひとつのＬＥＤチ
ップが得られるまでを示す。FIGS. 3 and 4 are schematic views sequentially showing the steps of manufacturing the semiconductor light emitting device of the present invention, and show the steps until one LED chip is obtained.
【００３３】図３の（ａ）において、ウエハー状態の絶
縁性の基材１１の底面に裏面銅箔１２を積層したものを
初期材料として準備する。そして、基材１１には製造し
ようとするチップＬＥＤの大きさに対応させた配列ピッ
チで導通用孔１１ａを貫通させる。これらの導通用孔１
１ａは基材１１のみに形成するものとし、その下端部に
位置している裏面銅箔１２はそのまま残す。なお、裏面
銅箔１２を貼る前に導通用孔１１ａを予め開けたものを
基材１１として準備してもよく、導通用孔１１ａは機械
加工によって穿つことで対応できる。In FIG. 3 (a), a material in which a back surface copper foil 12 is laminated on the bottom surface of an insulating base material 11 in a wafer state is prepared as an initial material. Then, the conduction holes 11a are made to penetrate the base material 11 at an arrangement pitch corresponding to the size of the chip LED to be manufactured. These conduction holes 1
1a is formed only on the base material 11, and the back surface copper foil 12 located at the lower end thereof is left as it is. The base 11 may be prepared by previously forming the conductive holes 11a before attaching the rear surface copper foil 12, and the conductive holes 11a may be formed by machining.
【００３４】導通用孔１１ａの形成の後には、同図の
（ｂ）において一点鎖線で示すように表面銅箔１３を被
せる。このとき、表面銅箔１３にはテンションを強くか
けないようにし、導通用孔１１ａに被さる部分では表面
銅箔１３がこの導通用孔１１ａの中に落ち込んで少し撓
んだ状態とすることが好ましい。After the formation of the conduction holes 11a, the surface copper foil 13 is covered as shown by the dashed line in FIG. At this time, it is preferable that the surface copper foil 13 is not subjected to a strong tension, and that the surface copper foil 13 falls into the conduction hole 11a and is slightly bent at a portion covering the conduction hole 11a. .
【００３５】次いで、同図の（ｃ）に示すように、表面
銅箔１３を全ての導通用孔１１ａの中に絞り込むように
して没入させる。この工程では、表面銅箔１３の銅の延
性を利用して導通用孔１１ａの内周面の全体からその底
部に位置している裏面銅箔１２の表面までに一様に重合
するように加工する。そして、この工程によって、表面
銅箔１３は導通用孔１１ａに没入させた部分が裏面銅箔
１２に接合され、裏面銅箔１２と表面銅箔１３とが電気
的に導通する。Next, as shown in FIG. 3C, the surface copper foil 13 is immersed so as to be narrowed down in all the conducting holes 11a. In this step, utilizing the ductility of the copper of the surface copper foil 13, processing is performed so as to uniformly polymerize from the entire inner peripheral surface of the conduction hole 11 a to the surface of the back surface copper foil 12 located at the bottom thereof. I do. In this step, the portion of the surface copper foil 13 immersed in the conduction hole 11a is joined to the back surface copper foil 12, and the back surface copper foil 12 and the surface copper foil 13 are electrically connected.
【００３６】ここで、表面銅箔１３の導通用孔１１ａへ
の没入の工程は、レーザー溶融法や超音波による圧着を
利用したかしめ法を利用することができ、また無電解め
っき法によっても可能である。レーザー溶融法や超音波
による圧着を利用したかしめ法は電子部品の製造分野で
従来から利用されているが、本発明の半導体発光装置の
製造においては好適である。また、無電解めっき法は半
導体発光装置の製造において一般的に設備されているも
のなので、新たなラインを組み込む必要がない点で好ま
しいといえる。Here, the step of immersing the surface copper foil 13 into the conduction holes 11a can be performed by a laser melting method, a caulking method using ultrasonic pressure bonding, or can be performed by an electroless plating method. It is. The caulking method using laser melting or crimping using ultrasonic waves has been conventionally used in the field of manufacturing electronic components, but is suitable for manufacturing the semiconductor light emitting device of the present invention. In addition, since the electroless plating method is generally provided in the manufacture of a semiconductor light emitting device, it can be said that it is preferable in that it is not necessary to incorporate a new line.
【００３７】以上の３通りのいずれかの方法によって表
面銅箔１３を導通用孔１１ａに没入して裏面銅箔１２に
接合した後には、裏面銅箔１２と表面銅箔１３の一部を
エッチング法によって除去する。エッチングする部分
は、同図の（ｄ）に示すように、一対の導通用孔１１ａ
に挟まれた部分の中央領域である。そして、同図の
（ｅ）に示すようにこのエッチングの後には、フォトマ
スクを利用して裏面銅箔１２及び表面銅箔１３のそれぞ
れの表面にＮｉまたはＡｌを用いてメッキ層１２ａ，１
３ａを形成する。After the front surface copper foil 13 is immersed in the conduction hole 11a and bonded to the back surface copper foil 12 by any one of the above three methods, a part of the back surface copper foil 12 and a part of the front surface copper foil 13 are etched. Removed by method. The portion to be etched is a pair of conduction holes 11a as shown in FIG.
It is the central region of the portion sandwiched between the. Then, as shown in FIG. 3E, after this etching, the plating layers 12a, 1 are formed on the respective surfaces of the back copper foil 12 and the front copper foil 13 using Ni or Al using a photomask.
3a is formed.
【００３８】ここまでの工程は、ウエハー状態にある基
材１１に対する処理操作によって行われ、この後に図４
で示す発光素子の実装とダイシング工程に移る。The steps up to this point are performed by a processing operation on the base material 11 in a wafer state.
The process proceeds to the mounting and dicing process of the light emitting element indicated by.
【００３９】図４の（ａ）は発光素子４を基材１１側に
載せる工程であり、基材１１の表面側の表面銅箔１３と
メッキ層１３ａがエッチング除去された部分を跨いで発
光素子４を搭載する。すなわち、ｎ側電極４ａは右側の
導通用孔１１ａを向き、ｐ側電極４ｂは左側の導通用孔
１１ａに臨む姿勢として発光素子４を位置決めして搭載
する。FIG. 4A shows a step of mounting the light emitting element 4 on the base material 11 side. The light emitting element 4 straddles the surface copper foil 13 on the front side of the base material 11 and the portion where the plating layer 13a is removed by etching. 4 is mounted. That is, the n-side electrode 4a faces the conduction hole 11a on the right side, and the p-side electrode 4b positions and mounts the light emitting element 4 so as to face the conduction hole 11a on the left side.
【００４０】次いで、同図の（ｂ）に示すようにＡｇペ
ースト５をｎ側及びｐ側の電極４ａ，４ｂを含むように
して充填する。このとき、先に説明したようにＡｇペー
スト５はメッキ層１３ａの表面だけでなく、導通用孔１
１ａに没入している表面銅箔１３とそのメッキ層１３ａ
の部分にまで流れ込むが、余剰のＡｇペースト５はこの
没入部分にとどまる。これにより、発光素子４はメッキ
層１３ａを介して表面銅箔１３に導通するとともに、基
材１１に固定される。Next, as shown in FIG. 2B, the Ag paste 5 is filled so as to include the n-side and p-side electrodes 4a and 4b. At this time, as described above, the Ag paste 5 is applied not only to the surface of the plating layer 13a but also to the conduction holes 1.
1a immersed surface copper foil 13 and its plating layer 13a
, But the surplus Ag paste 5 stays in this immersed portion. Thereby, the light emitting element 4 is electrically connected to the surface copper foil 13 via the plating layer 13a and is fixed to the base material 11.
【００４１】基材１１上の全ての発光素子４について導
通固定の工程が終えると、発光素子４の実装ステージか
ら樹脂封止のための型装置に基材１１のウエハーを移動
させる。そして、型に溶融樹脂を注入して加圧養生後に
離型することによって、同図の（ｃ）に示すように光透
過性の樹脂によるパッケージ６が成形される。When the process of conducting and fixing all the light emitting elements 4 on the base 11 is completed, the wafer of the base 11 is moved from the mounting stage of the light emitting elements 4 to the mold device for resin sealing. Then, by injecting the molten resin into the mold and releasing it after curing under pressure, the package 6 made of a light-transmitting resin is formed as shown in FIG.
【００４２】次いで、最終工程として、同図の（ｃ）の
一点鎖線で示すカット面とこれらに直交するカット面を
ダイサーによってダイシングする。このダイシングで
は、発光素子４がパッケージ６の中心に位置するような
カット形状とすることは無論である。そして、発光素子
４を囲んでいる導通用孔１１ａの全てが同図の（ｄ）に
示すように成形されたパッケージ６に含まれるようにす
る。Next, as a final step, a cut surface indicated by a dashed line (c) in the same figure and a cut surface orthogonal thereto are diced by a dicer. In this dicing, it is a matter of course that the cut shape is such that the light emitting element 4 is located at the center of the package 6. Then, all of the conduction holes 11a surrounding the light emitting element 4 are included in the package 6 formed as shown in FIG.
【００４３】以上の工程により、図１に示した１個の面
実装型の半導体発光装置が得られる。なお、図３及び図
４で説明した基材１１と導通用孔１１ａは、図１におい
てそれぞれ基板１，導通用孔１ａとして成形され、裏面
銅箔１２，表面銅箔１３及びメッキ層１２ａ，１３ａは
それぞれ裏面電極２，表面電極３及びメッキ層２ａ，３
ａとして成形される。Through the above steps, one surface-mounted semiconductor light emitting device shown in FIG. 1 is obtained. The base material 11 and the conduction hole 11a described with reference to FIGS. 3 and 4 are formed as the substrate 1 and the conduction hole 1a in FIG. 1, respectively, and the back copper foil 12, the front copper foil 13, and the plating layers 12a and 13a are formed. Are the back electrode 2, the front electrode 3, and the plating layers 2a, 3 respectively.
a.
【００４４】[0044]
【発明の効果】本発明では、従来のスルーホールとボン
ディングエリアを持つ電極構造のものに比べると、絶縁
性の基板に設けた導通用孔に表面電極を没入させて裏面
側の裏面電極に導通させるので、基板の平面形状を小さ
くできる。そして、発光素子もワイヤレスボンディング
として導電性接着剤によって導通固定するので、高さ寸
法も抑えることができ、したがって樹脂のパッケージも
含めて発光装置の全体を大幅に小型化できる。According to the present invention, as compared with the conventional electrode structure having a through hole and a bonding area, the surface electrode is immersed in the conduction hole provided in the insulating substrate, and the conduction to the back surface electrode on the back side is achieved. Therefore, the planar shape of the substrate can be reduced. In addition, since the light emitting element is also conductively fixed by a conductive adhesive as wireless bonding, the height dimension can be suppressed, and thus the entire light emitting device including the resin package can be significantly reduced in size.
【００４５】また、導通用孔によってできる凹みを余剰
の導電性接着剤の溜まり部として利用できるので、接着
剤を誤って過剰に塗布してもパッケージの外へ漏れ出る
こともなく、製品歩留りが向上する。Further, since the recess formed by the conductive hole can be used as a surplus portion of the excess conductive adhesive, even if the adhesive is applied excessively by mistake, it does not leak out of the package and the product yield is reduced. improves.
【図１】本発明の一実施の形態による半導体発光装置の
縦断面図FIG. 1 is a longitudinal sectional view of a semiconductor light emitting device according to an embodiment of the present invention.
【図２】図１の半導体発光装置の外観を示す斜視図FIG. 2 is a perspective view showing the appearance of the semiconductor light emitting device of FIG. 1;
【図３】本発明の製造方法であって、基材からメッキ層
の形成までの工程を順に示す概略図FIG. 3 is a schematic view showing a manufacturing method of the present invention, in which steps from a base material to formation of a plating layer are sequentially shown.
【図４】図３の工程に続く工程であって発光素子の搭載
からダイシングによる製品化までを順に示す概略図FIG. 4 is a schematic view showing a process subsequent to the process of FIG. 3 from mounting of the light emitting element to commercialization by dicing.
【図５】従来の面実装型の半導体発光装置の外観斜視図FIG. 5 is an external perspective view of a conventional surface mount type semiconductor light emitting device.
【符号の説明】 １ 基板 １ａ 導通用孔 ２ 裏面電極 ２ａ メッキ層 ３ 表面電極 ３ａ メッキ層 ４ 発光素子 ４ａ ｎ側電極 ４ｂ ｐ側電極 ４ｃ 発光層 ５ Ａｇペースト ６ パッケージ １１ 基材 １１ａ 導通用孔 １２ 裏面銅箔 １２ａ メッキ層 １３ 表面銅箔 １３ａ メッキ層DESCRIPTION OF SYMBOLS 1 Substrate 1a Conducting hole 2 Back electrode 2a Plating layer 3 Front electrode 3a Plating layer 4 Light emitting element 4a n side electrode 4b p side electrode 4c Light emitting layer 5 Ag paste 6 Package 11 Base material 11a Conducting hole 12 Back copper foil 12a Plating layer 13 Front copper foil 13a Plating layer
Claims (7)
ーン形成された裏面電極と、前記基板の表面にパターン
形成された表面電極と、この表面電極のパターンに導電
性接着剤によりｐ側及びｎ側の電極を導通させて搭載す
る発光素子とを備え、前記基板には前記裏面電極を表面
電極側に臨ませる導通用孔を貫通させて設け、前記表面
電極を前記導通用孔の内部に没入させて前記裏面電極の
表面に導通接続してなる半導体発光装置。1. An insulating substrate, a back electrode patterned on the back surface of the substrate, a front electrode patterned on the front surface of the substrate, and a p-side conductive pattern on the pattern of the front electrode. And a light-emitting element for mounting the n-side electrode in a conductive state. The substrate is provided with a through-hole through which the back electrode faces the front electrode, and the front electrode is provided inside the conductive hole. A semiconductor light emitting device which is immersed in the semiconductor device and is electrically connected to the surface of the back electrode.
記導通用孔の内周面に沿う断面形状とし、前記導通用孔
の中の表面電極によって形成される凹部を前記導電性接
着剤の余剰分の溜まり部としてなる請求項１記載の半導
体発光装置。2. A surface electrode immersed in the conductive hole has a cross-sectional shape along an inner peripheral surface of the conductive hole, and a recess formed by the surface electrode in the conductive hole is formed of the conductive adhesive. 2. The semiconductor light-emitting device according to claim 1, wherein the semiconductor light-emitting device serves as a surplus portion of the semiconductor light-emitting device.
の樹脂のパッケージを前記基材側と一体に成形してなる
請求項１または２記載の半導体発光装置。3. The semiconductor light emitting device according to claim 1, wherein an outer shape resin package including the light emitting element and a conduction hole is formed integrally with the base material side.
法であって、（１） 裏面に裏面銅箔を形成した絶縁性
の基材に前記導通用孔を開ける工程と、 （２） 前記基材の表面側の表面銅箔を張り巡らすとと
もに前記導通用孔に対応する部分をこの導入孔の中に没
入させて前記裏面銅箔に接合する工程と、 （３） 前記裏面銅箔及び表面銅箔のそれぞれをエッチ
ング法によりパターン形成する工程と、 （４） エッチングされた前記表面銅箔のパターン上に
発光素子を実装搭載する工程と、 （５） 前記発光素子のｐ側及びｎ側の電極を含んで充
填される導電性接着剤により前記発光素子を前記表面銅
箔に導通させて前記基材側に固定する工程と、 （６） 前記発光素子を含んで前記基材の表面側を光透
過性の樹脂によって封止する工程と、 （７） 前記基材と表裏両面の銅箔を前記導通用孔より
も外側の領域をカット面としてダイシングする工程とを
含む半導体発光装置の製造方法。4. The method for manufacturing a semiconductor light emitting device according to claim 3, wherein: (1) a step of forming the conduction hole in an insulating substrate having a back surface copper foil formed on a back surface; A step of spreading a surface copper foil on the front surface side of the base material, immersing a portion corresponding to the hole for conduction into the introduction hole, and joining to the rear surface copper foil, (3) the rear surface copper foil and the front surface A step of forming a pattern on each of the copper foils by an etching method; (4) a step of mounting and mounting a light emitting element on the etched pattern of the surface copper foil; and (5) a p-side and an n-side of the light emitting element. A step of conducting the light emitting element to the surface copper foil by a conductive adhesive filled with electrodes and fixing the light emitting element to the base material side; and (6) a step of forming a surface side of the base material including the light emitting element. (7) a step of sealing with a light-transmitting resin; Dicing the base material and the copper foils on the front and back surfaces with a region outside the conduction hole as a cut surface.
させて前記裏面銅箔に接合する工程を、レーザー溶融法
により実行する請求項４記載の半導体発光装置の製造方
法。5. The method for manufacturing a semiconductor light emitting device according to claim 4, wherein the step of immersing the front surface copper foil in the conduction hole and joining the same to the rear surface copper foil is performed by a laser melting method.
させて前記裏面銅箔に接合する工程を、超音波圧着によ
るかしめ法により実行する請求項４記載の半導体発光装
置の製造方法。6. The method for manufacturing a semiconductor light emitting device according to claim 4, wherein the step of immersing the front surface copper foil in the conduction hole and joining the same to the rear surface copper foil is performed by a caulking method using ultrasonic pressure bonding. .
させて前記裏面銅箔に接合する工程を、無電解銅メッキ
法により実行する請求項４記載の半導体発光装置の製造
方法。7. The method of manufacturing a semiconductor light emitting device according to claim 4, wherein the step of immersing the front surface copper foil in the conduction hole and joining the same to the rear surface copper foil is performed by an electroless copper plating method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10210604A JP2000049382A (en) | 1998-07-27 | 1998-07-27 | Semiconductor light-emitting device and its manufacture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10210604A JP2000049382A (en) | 1998-07-27 | 1998-07-27 | Semiconductor light-emitting device and its manufacture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000049382A true JP2000049382A (en) | 2000-02-18 |
Family
ID=16592086
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10210604A Pending JP2000049382A (en) | 1998-07-27 | 1998-07-27 | Semiconductor light-emitting device and its manufacture |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000049382A (en) |
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|---|---|---|---|---|
| DE10234978A1 (en) * | 2002-07-31 | 2004-02-12 | Osram Opto Semiconductors Gmbh | Surface-mounted semiconductor component used in the production of luminescent diodes in mobile telephone keypads comprises a semiconductor chip, external electrical connections, and a chip casing |
| DE10306557A1 (en) * | 2002-08-05 | 2004-02-26 | Osram Opto Semiconductors Gmbh | Method for producing an electrical lead frame, method for producing a surface-mountable semiconductor component and lead frame strips |
| US7199470B2 (en) | 2002-07-31 | 2007-04-03 | Osram Opto Semiconductors Gmbh | Surface-mountable semiconductor component and method for producing it |
| DE102007004301A1 (en) * | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Semiconductor component i.e. film semiconductor component, or element group manufacturing method, involves forming semiconductor material with layer sequence, and arranging electrical connection area on side facing carrier layer |
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| US8058147B2 (en) | 2005-08-05 | 2011-11-15 | Osram Opto Semiconductors Gmbh | Method for producing semiconductor components and thin-film semiconductor component |
| US8872330B2 (en) | 2006-08-04 | 2014-10-28 | Osram Opto Semiconductors Gmbh | Thin-film semiconductor component and component assembly |
| US9142720B2 (en) | 2007-01-29 | 2015-09-22 | Osram Opto Semiconductors Gmbh | Thin-film light emitting diode chip and method for producing a thin-film light emitting diode chip |
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-
1998
- 1998-07-27 JP JP10210604A patent/JP2000049382A/en active Pending
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7199470B2 (en) | 2002-07-31 | 2007-04-03 | Osram Opto Semiconductors Gmbh | Surface-mountable semiconductor component and method for producing it |
| DE10234978A1 (en) * | 2002-07-31 | 2004-02-12 | Osram Opto Semiconductors Gmbh | Surface-mounted semiconductor component used in the production of luminescent diodes in mobile telephone keypads comprises a semiconductor chip, external electrical connections, and a chip casing |
| US7488622B2 (en) | 2002-07-31 | 2009-02-10 | Osram Opto Semiconductors Gmbh | Method for producing a surface-mountable semiconductor component |
| US7695990B2 (en) | 2002-08-05 | 2010-04-13 | Osram Opto Semiconductors Gmbh | Fabricating surface mountable semiconductor components with leadframe strips |
| US6995029B2 (en) | 2002-08-05 | 2006-02-07 | Osram Opta Semiconductors Gmbh | Fabricating surface mountable semiconductor components with leadframe strips |
| DE10306557A1 (en) * | 2002-08-05 | 2004-02-26 | Osram Opto Semiconductors Gmbh | Method for producing an electrical lead frame, method for producing a surface-mountable semiconductor component and lead frame strips |
| US8058147B2 (en) | 2005-08-05 | 2011-11-15 | Osram Opto Semiconductors Gmbh | Method for producing semiconductor components and thin-film semiconductor component |
| DE102007004301A1 (en) * | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Semiconductor component i.e. film semiconductor component, or element group manufacturing method, involves forming semiconductor material with layer sequence, and arranging electrical connection area on side facing carrier layer |
| US8872330B2 (en) | 2006-08-04 | 2014-10-28 | Osram Opto Semiconductors Gmbh | Thin-film semiconductor component and component assembly |
| US9142720B2 (en) | 2007-01-29 | 2015-09-22 | Osram Opto Semiconductors Gmbh | Thin-film light emitting diode chip and method for producing a thin-film light emitting diode chip |
| WO2011040703A2 (en) * | 2009-09-30 | 2011-04-07 | 주식회사 세미콘라이트 | Semiconductor light emitting device |
| WO2011040703A3 (en) * | 2009-09-30 | 2011-05-26 | 주식회사 세미콘라이트 | Semiconductor light emitting device |
| US8431939B2 (en) | 2009-09-30 | 2013-04-30 | Semicon Light Co., Ltd. | Semiconductor light-emitting device |
| CN111769188A (en) * | 2020-07-31 | 2020-10-13 | 佛山紫熙慧众科技有限公司 | Novel ultraviolet LED chip electrode preparation method |
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