ITRM20030338A1 - Circuito di generazione e regolazione di alta tensione - Google Patents

Circuito di generazione e regolazione di alta tensione

Info

Publication number
ITRM20030338A1
ITRM20030338A1 IT000338A ITRM20030338A ITRM20030338A1 IT RM20030338 A1 ITRM20030338 A1 IT RM20030338A1 IT 000338 A IT000338 A IT 000338A IT RM20030338 A ITRM20030338 A IT RM20030338A IT RM20030338 A1 ITRM20030338 A1 IT RM20030338A1
Authority
IT
Italy
Prior art keywords
high voltage
voltage generation
regulation circuit
regulation
circuit
Prior art date
Application number
IT000338A
Other languages
English (en)
Inventor
Agostino A Macerola
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to IT000338A priority Critical patent/ITRM20030338A1/it
Publication of ITRM20030338A0 publication Critical patent/ITRM20030338A0/it
Priority to US10/726,265 priority patent/US6944059B2/en
Publication of ITRM20030338A1 publication Critical patent/ITRM20030338A1/it
Priority to US11/195,904 priority patent/US7245538B2/en
Priority to US11/762,279 priority patent/US7372739B2/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/30Power supply circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
IT000338A 2003-07-11 2003-07-11 Circuito di generazione e regolazione di alta tensione ITRM20030338A1 (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT000338A ITRM20030338A1 (it) 2003-07-11 2003-07-11 Circuito di generazione e regolazione di alta tensione
US10/726,265 US6944059B2 (en) 2003-07-11 2003-12-02 High voltage generation and regulation circuit in a memory device
US11/195,904 US7245538B2 (en) 2003-07-11 2005-08-03 High voltage generation and regulation circuit in a memory device
US11/762,279 US7372739B2 (en) 2003-07-11 2007-06-13 High voltage generation and regulation circuit in a memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT000338A ITRM20030338A1 (it) 2003-07-11 2003-07-11 Circuito di generazione e regolazione di alta tensione

Publications (2)

Publication Number Publication Date
ITRM20030338A0 ITRM20030338A0 (it) 2003-07-11
ITRM20030338A1 true ITRM20030338A1 (it) 2005-01-12

Family

ID=29765908

Family Applications (1)

Application Number Title Priority Date Filing Date
IT000338A ITRM20030338A1 (it) 2003-07-11 2003-07-11 Circuito di generazione e regolazione di alta tensione

Country Status (2)

Country Link
US (3) US6944059B2 (it)
IT (1) ITRM20030338A1 (it)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100536613B1 (ko) * 2004-04-09 2005-12-14 삼성전자주식회사 프로그램 시간을 단축할 수 있는 노어형 플래시 메모리장치 및 그것의 프로그램 방법
US7286417B2 (en) * 2005-06-21 2007-10-23 Micron Technology, Inc. Low power dissipation voltage generator
US7248521B2 (en) * 2005-07-12 2007-07-24 Micron Technology, Inc. Negative voltage discharge scheme to improve snapback in a non-volatile memory
KR100735009B1 (ko) * 2005-08-30 2007-07-03 삼성전자주식회사 소거 시간을 줄일 수 있는 플래시 메모리 장치
US7855924B2 (en) * 2006-05-19 2010-12-21 Arm Limited Data processing memory circuit having pull-down circuit with on/off configuration
US7599231B2 (en) * 2006-10-11 2009-10-06 Atmel Corporation Adaptive regulator for idle state in a charge pump circuit of a memory device
US20090154215A1 (en) * 2007-12-14 2009-06-18 Spansion Llc Reducing noise and disturbance between memory storage elements using angled wordlines
US8159881B2 (en) * 2009-06-03 2012-04-17 Marvell World Trade Ltd. Reference voltage optimization for flash memory
US8120968B2 (en) * 2010-02-12 2012-02-21 International Business Machines Corporation High voltage word line driver
US8553463B1 (en) 2011-03-21 2013-10-08 Lattice Semiconductor Corporation Voltage discharge circuit having divided discharge current
US8750051B1 (en) * 2011-12-02 2014-06-10 Cypress Semiconductor Corporation Systems and methods for providing high voltage to memory devices
US9117547B2 (en) 2013-05-06 2015-08-25 International Business Machines Corporation Reduced stress high voltage word line driver
US20160006348A1 (en) * 2014-07-07 2016-01-07 Ememory Technology Inc. Charge pump apparatus
JP6808479B2 (ja) * 2016-12-27 2021-01-06 ラピスセミコンダクタ株式会社 半導体メモリ
US10854245B1 (en) * 2019-07-17 2020-12-01 Intel Corporation Techniques to adapt DC bias of voltage regulators for memory devices as a function of bandwidth demand

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4389705A (en) * 1981-08-21 1983-06-21 Mostek Corporation Semiconductor memory circuit with depletion data transfer transistor
EP0757356B1 (en) * 1995-07-31 2001-06-06 STMicroelectronics S.r.l. Flash EEPROM with controlled discharge time of the word lines and source potentials after erase
US5781477A (en) * 1996-02-23 1998-07-14 Micron Quantum Devices, Inc. Flash memory system having fast erase operation
US5774406A (en) * 1996-10-03 1998-06-30 Programmable Microelectronic Corporation Switching circuit for controlled transition between high program and erase voltages and a power supply voltage for memory cells
KR100481841B1 (ko) * 1997-11-25 2005-08-25 삼성전자주식회사 음의고전압을방전시키기위한회로를구비한플래시메모리장치
US6219293B1 (en) * 1999-09-01 2001-04-17 Micron Technology Inc. Method and apparatus for supplying regulated power to memory device components
JP3633853B2 (ja) * 2000-06-09 2005-03-30 Necエレクトロニクス株式会社 フラッシュメモリの消去動作制御方法およびフラッシュメモリの消去動作制御装置
EP1176603A1 (en) * 2000-07-26 2002-01-30 STMicroelectronics S.r.l. A non-volatile memory with a charge pump with regulated voltage
DE10055920C2 (de) * 2000-11-10 2003-03-27 Infineon Technologies Ag Integrierter Speicher mit einer Spannungsregelungsschaltung
KR100376262B1 (ko) * 2000-12-29 2003-03-17 주식회사 하이닉스반도체 비트라인 전압 레귤레이션 회로
US6707715B2 (en) * 2001-08-02 2004-03-16 Stmicroelectronics, Inc. Reference generator circuit and method for nonvolatile memory devices
US6714458B2 (en) * 2002-02-11 2004-03-30 Micron Technology, Inc. High voltage positive and negative two-phase discharge system and method for channel erase in flash memory devices

Also Published As

Publication number Publication date
US20050007832A1 (en) 2005-01-13
ITRM20030338A0 (it) 2003-07-11
US20070230248A1 (en) 2007-10-04
US6944059B2 (en) 2005-09-13
US7372739B2 (en) 2008-05-13
US7245538B2 (en) 2007-07-17
US20050265111A1 (en) 2005-12-01

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