IT8747549A0 - Dispositivo integrato di protezione mediante varistore di un componente elettronico dagli effetti di un campo elettromagnetico o di cariche statiche - Google Patents
Dispositivo integrato di protezione mediante varistore di un componente elettronico dagli effetti di un campo elettromagnetico o di cariche staticheInfo
- Publication number
- IT8747549A0 IT8747549A0 IT8747549A IT4754987A IT8747549A0 IT 8747549 A0 IT8747549 A0 IT 8747549A0 IT 8747549 A IT8747549 A IT 8747549A IT 4754987 A IT4754987 A IT 4754987A IT 8747549 A0 IT8747549 A0 IT 8747549A0
- Authority
- IT
- Italy
- Prior art keywords
- varistor
- effects
- protection
- electronic component
- electromagnetic field
- Prior art date
Links
- 230000000694 effects Effects 0.000 title 1
- 230000005672 electromagnetic field Effects 0.000 title 1
- 230000003068 static effect Effects 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/647—Resistive arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12033—Gunn diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Thermistors And Varistors (AREA)
- Emergency Protection Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8601379A FR2726941A1 (fr) | 1986-01-28 | 1986-01-28 | Dispositif integre de protection par varistance d'un composant electronique contre les effets d'un champ electro-magnetique ou de charges statiques |
Publications (1)
Publication Number | Publication Date |
---|---|
IT8747549A0 true IT8747549A0 (it) | 1987-01-22 |
Family
ID=9331687
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8747549A IT8747549A0 (it) | 1986-01-28 | 1987-01-22 | Dispositivo integrato di protezione mediante varistore di un componente elettronico dagli effetti di un campo elettromagnetico o di cariche statiche |
Country Status (5)
Country | Link |
---|---|
DE (1) | DE3702780A1 (fr) |
FR (1) | FR2726941A1 (fr) |
GB (1) | GB2300514B (fr) |
IT (1) | IT8747549A0 (fr) |
SE (1) | SE8700379A0 (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19945426C1 (de) | 1999-09-22 | 2001-01-18 | Siemens Ag | Steckverbinder eines elektrischen Geräts |
FR2802706B1 (fr) * | 1999-12-15 | 2002-03-01 | 3D Plus Sa | Procede et dispositif d'interconnexion en trois dimensions de composants electroniques |
EP1494284A1 (fr) * | 2003-06-30 | 2005-01-05 | Freescale Semiconductor, Inc. | Dispositif de protection contre les surtensions |
DE102007013986A1 (de) * | 2007-03-23 | 2008-09-25 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauteil mit einer Schutzstruktur gegen Überspannungen und Herstellungsverfahren |
FR2940521B1 (fr) | 2008-12-19 | 2011-11-11 | 3D Plus | Procede de fabrication collective de modules electroniques pour montage en surface |
DE102011050567A1 (de) | 2011-05-23 | 2012-11-29 | Kurt Stimpfl | Steckverbinder und seine Verwendung zum Schutz eines elektrischen Systems gegen Überspannungsentladung sowie Verfahren zu seiner Herstellung |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3743897A (en) * | 1971-08-05 | 1973-07-03 | Gen Electric | Hybrid circuit arrangement with metal oxide varistor shunt |
US3747420A (en) * | 1971-11-15 | 1973-07-24 | Mallory & Co Inc P R | Drive means for interval timer |
US3900432A (en) * | 1973-10-15 | 1975-08-19 | Du Pont | Varistor compositions |
DE2735484C2 (de) * | 1977-08-05 | 1984-06-07 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur Herstellung von Dickfilm-Varistoren mit Zinkoxid als Hauptkomponente |
FR2475791A1 (fr) * | 1980-02-12 | 1981-08-14 | Thomson Csf | Resistance ceramique non lineaire a faible tension de seuil, et son procede de fabrication |
JPS5884455A (ja) * | 1981-11-13 | 1983-05-20 | Fujitsu Ltd | 半導体記憶装置 |
FR2527039A1 (fr) * | 1982-05-14 | 1983-11-18 | Inf Milit Spatiale Aeronaut | Dispositif de protection d'un dispositif electronique contre les tensions engendrees par un champ electromagnetique |
DE3231118C1 (de) * | 1982-08-20 | 1983-11-03 | Siemens AG, 1000 Berlin und 8000 München | Kombinierte Schaltungsanordnung mit Varistor und Verfahren zu ihrer Herstellung |
DE3335195A1 (de) * | 1983-09-28 | 1985-04-04 | Siemens AG, 1000 Berlin und 8000 München | Kombinierte schaltung mit varistor |
-
1986
- 1986-01-28 FR FR8601379A patent/FR2726941A1/fr active Pending
-
1987
- 1987-01-22 IT IT8747549A patent/IT8747549A0/it unknown
- 1987-01-29 GB GB8701991A patent/GB2300514B/en not_active Expired - Fee Related
- 1987-01-30 SE SE8700379A patent/SE8700379A0/sv not_active Application Discontinuation
- 1987-01-30 DE DE19873702780 patent/DE3702780A1/de not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
GB2300514A (en) | 1996-11-06 |
SE8700379A0 (sv) | 1996-06-06 |
FR2726941A1 (fr) | 1996-05-15 |
SE8700379D0 (sv) | 1987-01-30 |
GB8701991D0 (en) | 1996-04-24 |
DE3702780A1 (de) | 1996-07-04 |
GB2300514B (en) | 1997-03-19 |
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