GB2300514B - Integrated device for the protection of an electronic component by variable resistance from the effects of an electromagnetic field or of static charges - Google Patents

Integrated device for the protection of an electronic component by variable resistance from the effects of an electromagnetic field or of static charges

Info

Publication number
GB2300514B
GB2300514B GB8701991A GB8701991A GB2300514B GB 2300514 B GB2300514 B GB 2300514B GB 8701991 A GB8701991 A GB 8701991A GB 8701991 A GB8701991 A GB 8701991A GB 2300514 B GB2300514 B GB 2300514B
Authority
GB
United Kingdom
Prior art keywords
effects
protection
electronic component
electromagnetic field
variable resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB8701991A
Other versions
GB2300514A (en
GB8701991D0 (en
Inventor
Christian Val
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cimsa Sintra SA
Original Assignee
Cimsa Sintra SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cimsa Sintra SA filed Critical Cimsa Sintra SA
Publication of GB8701991D0 publication Critical patent/GB8701991D0/en
Publication of GB2300514A publication Critical patent/GB2300514A/en
Application granted granted Critical
Publication of GB2300514B publication Critical patent/GB2300514B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/647Resistive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01039Yttrium [Y]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12033Gunn diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Thermistors And Varistors (AREA)
  • Emergency Protection Circuit Devices (AREA)
GB8701991A 1986-01-28 1987-01-29 Integrated device for the protection of an electronic component by variable resistance from the effects of an electromagnetic field or of static charges Expired - Fee Related GB2300514B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8601379A FR2726941A1 (en) 1986-01-28 1986-01-28 INTEGRATED VARISTOR PROTECTION DEVICE OF AN ELECTRONIC COMPONENT AGAINST THE EFFECTS OF AN ELECTRO-MAGNETIC FIELD OR STATIC LOADS

Publications (3)

Publication Number Publication Date
GB8701991D0 GB8701991D0 (en) 1996-04-24
GB2300514A GB2300514A (en) 1996-11-06
GB2300514B true GB2300514B (en) 1997-03-19

Family

ID=9331687

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8701991A Expired - Fee Related GB2300514B (en) 1986-01-28 1987-01-29 Integrated device for the protection of an electronic component by variable resistance from the effects of an electromagnetic field or of static charges

Country Status (5)

Country Link
DE (1) DE3702780A1 (en)
FR (1) FR2726941A1 (en)
GB (1) GB2300514B (en)
IT (1) IT8747549A0 (en)
SE (1) SE8700379A0 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19945426C1 (en) 1999-09-22 2001-01-18 Siemens Ag Plug connector protecting e.g. components of circuit card from electrostatic discharge, has pins embedded in plastic including material insulating at working voltage, but conducting above it
FR2802706B1 (en) * 1999-12-15 2002-03-01 3D Plus Sa METHOD AND DEVICE FOR THREE-DIMENSIONAL INTERCONNECTION OF ELECTRONIC COMPONENTS
EP1494284A1 (en) * 2003-06-30 2005-01-05 Freescale Semiconductor, Inc. Overvoltage protection device
DE102007013986A1 (en) * 2007-03-23 2008-09-25 Osram Opto Semiconductors Gmbh Optoelectronic component e.g. LED, has protective structure comprising material e.g. ceramic material or metal oxide e.g. zinc oxide, attached to structural element and/or to contact terminal, where material is provided as pasty mass
FR2940521B1 (en) 2008-12-19 2011-11-11 3D Plus COLLECTIVE MANUFACTURING METHOD OF ELECTRONIC MODULES FOR SURFACE MOUNTING
DE102011050567A1 (en) 2011-05-23 2012-11-29 Kurt Stimpfl Connectors and their use to protect an electrical system against overvoltage discharge and method of making the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3743897A (en) * 1971-08-05 1973-07-03 Gen Electric Hybrid circuit arrangement with metal oxide varistor shunt
US4559579A (en) * 1982-05-14 1985-12-17 Thomson Csf Device for the protection of an electronic component and/or circuit against the disturbances (voltages) generated by an external electromagnetic field

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3747420A (en) * 1971-11-15 1973-07-24 Mallory & Co Inc P R Drive means for interval timer
US3900432A (en) * 1973-10-15 1975-08-19 Du Pont Varistor compositions
DE2735484C2 (en) * 1977-08-05 1984-06-07 Siemens AG, 1000 Berlin und 8000 München Process for the production of thick film varistors with zinc oxide as the main component
FR2475791A1 (en) * 1980-02-12 1981-08-14 Thomson Csf NON-LINEAR CERAMIC RESISTANCE WITH LOW THRESHOLD VOLTAGE AND METHOD OF MANUFACTURING THE SAME
JPS5884455A (en) * 1981-11-13 1983-05-20 Fujitsu Ltd Semiconductor memory device
DE3231118C1 (en) * 1982-08-20 1983-11-03 Siemens AG, 1000 Berlin und 8000 München Combined circuit arrangement with varistor and method for its production
DE3335195A1 (en) * 1983-09-28 1985-04-04 Siemens AG, 1000 Berlin und 8000 München COMBINED CIRCUIT WITH VARISTOR

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3743897A (en) * 1971-08-05 1973-07-03 Gen Electric Hybrid circuit arrangement with metal oxide varistor shunt
US4559579A (en) * 1982-05-14 1985-12-17 Thomson Csf Device for the protection of an electronic component and/or circuit against the disturbances (voltages) generated by an external electromagnetic field

Also Published As

Publication number Publication date
GB2300514A (en) 1996-11-06
SE8700379A0 (en) 1996-06-06
FR2726941A1 (en) 1996-05-15
IT8747549A0 (en) 1987-01-22
SE8700379D0 (en) 1987-01-30
GB8701991D0 (en) 1996-04-24
DE3702780A1 (en) 1996-07-04

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19970619