IT8722236A0 - FRAME SYNCHRONIZATION ARRANGEMENT FOR DUPLEX FRAME PHASES COMPLETION CIRCUIT IN TIME MULTIPLATION. - Google Patents

FRAME SYNCHRONIZATION ARRANGEMENT FOR DUPLEX FRAME PHASES COMPLETION CIRCUIT IN TIME MULTIPLATION.

Info

Publication number
IT8722236A0
IT8722236A0 IT8722236A IT2223687A IT8722236A0 IT 8722236 A0 IT8722236 A0 IT 8722236A0 IT 8722236 A IT8722236 A IT 8722236A IT 2223687 A IT2223687 A IT 2223687A IT 8722236 A0 IT8722236 A0 IT 8722236A0
Authority
IT
Italy
Prior art keywords
multiplation
frame
time
phases
synchronization arrangement
Prior art date
Application number
IT8722236A
Other languages
Italian (it)
Other versions
IT1222881B (en
Inventor
Renner Robert
Original Assignee
Gte Communication Syst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Communication Syst filed Critical Gte Communication Syst
Publication of IT8722236A0 publication Critical patent/IT8722236A0/en
Application granted granted Critical
Publication of IT1222881B publication Critical patent/IT1222881B/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Safety Devices In Control Systems (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
IT22236/87A 1986-10-30 1987-10-13 Sequence synchroniser for TDM duplex sequence restoration circuit IT1222881B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US92504386A 1986-10-30 1986-10-30

Publications (2)

Publication Number Publication Date
IT8722236A0 true IT8722236A0 (en) 1987-10-13
IT1222881B IT1222881B (en) 1990-09-12

Family

ID=25451116

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22236/87A IT1222881B (en) 1986-10-30 1987-10-13 Sequence synchroniser for TDM duplex sequence restoration circuit

Country Status (2)

Country Link
BE (1) BE1000172A6 (en)
IT (1) IT1222881B (en)

Also Published As

Publication number Publication date
BE1000172A6 (en) 1988-07-05
IT1222881B (en) 1990-09-12

Similar Documents

Publication Publication Date Title
DE3788457D1 (en) Frame synchronization arrangement.
DE3750627D1 (en) Image reader.
DE3584985D1 (en) PHASE SYNCHRONIZATION CIRCUIT.
DE69106012D1 (en) Frame synchronization arrangement.
IT8719979A0 (en) SYNCHRONIZATION DETECTION CIRCUIT.
DE3772714D1 (en) SYNCHRONIZING DEVICE.
DE69121157D1 (en) Circuit for synchronizing asynchronous state machines
DE3485782D1 (en) CLOCK SYNCHRONIZATION CIRCUIT.
DE3769283D1 (en) IMAGE READER.
DE3774407D1 (en) SYNCHRONIZATION CIRCUIT.
DE3781640D1 (en) IMAGE READER.
IT1228416B (en) POWER RECOVERY CIRCUIT.
IT8420261A0 (en) DEVICE FOR WEFT INSERTION.
IT8424010A0 (en) PHASE REGULATION CIRCUIT.
IT8620836A0 (en) POLARIZATION CURRENT RECOVERY CIRCUIT, PARTICULARLY FOR RAMP GENERATORS.
NO873163D0 (en) CARD CARD FOR TELETECHNICS.
IT8722236A0 (en) FRAME SYNCHRONIZATION ARRANGEMENT FOR DUPLEX FRAME PHASES COMPLETION CIRCUIT IN TIME MULTIPLATION.
DE69114624D1 (en) Synchronization circuit.
IT8722287A0 (en) WEFT CONTROL ARRANGEMENT FOR DUPLEX TIME MULTIPLATION WEFT REPHASE CIRCUIT.
IT1204395B (en) PHASE REGULATOR CIRCUIT, IN PARTICULAR HORIZONTAL PHASE FOR DATA DISPLAYERS
DE3766697D1 (en) IMAGE READER.
IT8722235A0 (en) SYNCHRONIZATION ARRANGEMENT FOR TIME MULTIPLATION DATA EXPLORATION CIRCUIT.
ES292175Y (en) ANATOMICAL PILLOW.
ES271468Y (en) FOLDING CARD HOLDER.
KR880020798U (en) Synchronous stabilization circuit