IT1222881B - Sequence synchroniser for TDM duplex sequence restoration circuit - Google Patents

Sequence synchroniser for TDM duplex sequence restoration circuit

Info

Publication number
IT1222881B
IT1222881B IT22236/87A IT2223687A IT1222881B IT 1222881 B IT1222881 B IT 1222881B IT 22236/87 A IT22236/87 A IT 22236/87A IT 2223687 A IT2223687 A IT 2223687A IT 1222881 B IT1222881 B IT 1222881B
Authority
IT
Italy
Prior art keywords
sequence
control units
tdm
synchroniser
digital
Prior art date
Application number
IT22236/87A
Other languages
Italian (it)
Other versions
IT8722236A0 (en
Inventor
Robert Renner
Original Assignee
Gte Communication Syst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Communication Syst filed Critical Gte Communication Syst
Publication of IT8722236A0 publication Critical patent/IT8722236A0/en
Application granted granted Critical
Publication of IT1222881B publication Critical patent/IT1222881B/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Safety Devices In Control Systems (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

The TDM synchronisation appts. operates with digital measurement fields are connected by digital control units (15,15') and interurban lines by analogue control units (17,17'), all under the supervision of a peripheral processor (70). In each duplex pair of digital control units (15,15'), one analyses the group, of digital measurement fields for the correct sequence synchronisation as a duty unit while the other ats as a standby. The synchronising unit incorporates a clock for time period signalling to a timer which transmits a counting signal at a predetermined frequency. A state machine responds to the counting signal and to sequence alarm signals from both control units.
IT22236/87A 1986-10-30 1987-10-13 Sequence synchroniser for TDM duplex sequence restoration circuit IT1222881B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US92504386A 1986-10-30 1986-10-30

Publications (2)

Publication Number Publication Date
IT8722236A0 IT8722236A0 (en) 1987-10-13
IT1222881B true IT1222881B (en) 1990-09-12

Family

ID=25451116

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22236/87A IT1222881B (en) 1986-10-30 1987-10-13 Sequence synchroniser for TDM duplex sequence restoration circuit

Country Status (2)

Country Link
BE (1) BE1000172A6 (en)
IT (1) IT1222881B (en)

Also Published As

Publication number Publication date
IT8722236A0 (en) 1987-10-13
BE1000172A6 (en) 1988-07-05

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