IT202000001819A1 - Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione - Google Patents
Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazioneInfo
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- IT202000001819A1 IT202000001819A1 IT102020000001819A IT202000001819A IT202000001819A1 IT 202000001819 A1 IT202000001819 A1 IT 202000001819A1 IT 102020000001819 A IT102020000001819 A IT 102020000001819A IT 202000001819 A IT202000001819 A IT 202000001819A IT 202000001819 A1 IT202000001819 A1 IT 202000001819A1
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- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
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- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H01L2224/732—Location after the connecting process
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- H01L2224/732—Location after the connecting process
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- H01L2224/73257—Bump and wire connectors
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- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/1423—Monolithic Microwave Integrated Circuit [MMIC]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
- H01L2924/19032—Structure including wave guides being a microstrip line type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
- H01L2924/19033—Structure including wave guides being a coplanar line type
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Combinations Of Printed Boards (AREA)
- Wire Bonding (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT102020000001819A IT202000001819A1 (it) | 2020-01-30 | 2020-01-30 | Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione |
EP21153537.2A EP3869541A3 (en) | 2020-01-30 | 2021-01-26 | Integrated circuit and electronic device comprising a plurality of integrated circuits electrically coupled through a synchronization signal |
US17/162,595 US11742311B2 (en) | 2020-01-30 | 2021-01-29 | Integrated circuit and electronic device comprising a plurality of integrated circuits electrically coupled through a synchronization signal |
CN202110139579.XA CN113206069A (zh) | 2020-01-30 | 2021-02-01 | 集成电路和包括多个集成电路的电子设备 |
CN202120282004.9U CN215600361U (zh) | 2020-01-30 | 2021-02-01 | 集成电路封装件和电子设备 |
US18/334,280 US20230335524A1 (en) | 2020-01-30 | 2023-06-13 | Integrated circuit and electronic device comprising a plurality of integrated circuits electrically coupled through a synchronization signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT102020000001819A IT202000001819A1 (it) | 2020-01-30 | 2020-01-30 | Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione |
Publications (1)
Publication Number | Publication Date |
---|---|
IT202000001819A1 true IT202000001819A1 (it) | 2021-07-30 |
Family
ID=70228713
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT102020000001819A IT202000001819A1 (it) | 2020-01-30 | 2020-01-30 | Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione |
Country Status (4)
Country | Link |
---|---|
US (2) | US11742311B2 (it) |
EP (1) | EP3869541A3 (it) |
CN (2) | CN113206069A (it) |
IT (1) | IT202000001819A1 (it) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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IT202000001819A1 (it) * | 2020-01-30 | 2021-07-30 | St Microelectronics Srl | Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione |
IT202000001822A1 (it) * | 2020-01-30 | 2021-07-30 | St Microelectronics Srl | Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione instradato attraverso il circuito integrato |
CN118016638B (zh) * | 2024-04-10 | 2024-07-12 | 成都天成电科科技有限公司 | 一种适用于晶圆级封装的低损耗宽带过渡结构 |
Citations (1)
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US5849606A (en) * | 1995-08-25 | 1998-12-15 | Hitachi, Ltd. | Semiconductor device and manufacturing of the same |
Family Cites Families (34)
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US6057600A (en) * | 1997-11-27 | 2000-05-02 | Kyocera Corporation | Structure for mounting a high-frequency package |
US6180445B1 (en) * | 2000-04-24 | 2001-01-30 | Taiwan Semiconductor Manufacturing Company | Method to fabricate high Q inductor by redistribution layer when flip-chip package is employed |
US6770955B1 (en) | 2001-12-15 | 2004-08-03 | Skyworks Solutions, Inc. | Shielded antenna in a semiconductor package |
JP3657246B2 (ja) * | 2002-07-29 | 2005-06-08 | Necエレクトロニクス株式会社 | 半導体装置 |
US20050002167A1 (en) * | 2003-07-02 | 2005-01-06 | John Hsuan | Microelectronic package |
US7994608B2 (en) * | 2005-08-24 | 2011-08-09 | Infineon Technologies Ag | Magnetically alignable integrated circuit device |
US20070141751A1 (en) * | 2005-12-16 | 2007-06-21 | Mistry Addi B | Stackable molded packages and methods of making the same |
US7915081B2 (en) * | 2006-03-31 | 2011-03-29 | Intel Corporation | Flexible interconnect pattern on semiconductor package |
US8860178B2 (en) * | 2006-07-03 | 2014-10-14 | Renesas Electronics Corporation | Semiconductor device having an inductor |
US8278749B2 (en) * | 2009-01-30 | 2012-10-02 | Infineon Technologies Ag | Integrated antennas in wafer level package |
DE102009033241B4 (de) | 2009-07-14 | 2013-07-04 | Audi Ag | Vermeidung von Maskerade durch Verwendung von Kennungssequenzen |
US8451618B2 (en) * | 2010-10-28 | 2013-05-28 | Infineon Technologies Ag | Integrated antennas in wafer level package |
JP5417389B2 (ja) * | 2011-07-13 | 2014-02-12 | 株式会社東芝 | 無線装置 |
JP5839267B2 (ja) * | 2011-09-28 | 2016-01-06 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法 |
US8648454B2 (en) | 2012-02-14 | 2014-02-11 | International Business Machines Corporation | Wafer-scale package structures with integrated antennas |
US8786060B2 (en) * | 2012-05-04 | 2014-07-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor package integrated with conformal shield and antenna |
US8866292B2 (en) * | 2012-10-19 | 2014-10-21 | Infineon Technologies Ag | Semiconductor packages with integrated antenna and methods of forming thereof |
JP6263948B2 (ja) | 2013-10-17 | 2018-01-24 | 住友電気工業株式会社 | 電極パッド構造 |
US9537199B2 (en) * | 2015-03-19 | 2017-01-03 | International Business Machines Corporation | Package structure having an integrated waveguide configured to communicate between first and second integrated circuit chips |
US10636753B2 (en) * | 2015-07-29 | 2020-04-28 | STATS ChipPAC Pte. Ltd. | Antenna in embedded wafer-level ball-grid array package |
DE112016003737T5 (de) | 2015-08-18 | 2018-05-03 | Mitsubishi Electric Corporation | Halbleitervorrichtung |
JP6643714B2 (ja) | 2016-03-10 | 2020-02-12 | 富士通株式会社 | 電子装置及び電子機器 |
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DE102017119212A1 (de) * | 2016-12-20 | 2018-06-21 | Infineon Technologies Ag | HF-Transceiver mit Testmöglichkeit |
DE102019106030A1 (de) * | 2018-03-22 | 2019-09-26 | Infineon Technologies Ag | Radar-system mit mehreren radar-chips |
DE102018114471B4 (de) * | 2018-06-15 | 2020-02-06 | Infineon Technologies Ag | Phasenmessung in einem radarsystem |
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US11791312B2 (en) * | 2018-12-04 | 2023-10-17 | Qorvo Us, Inc. | MMICs with backside interconnects for fanout-style packaging |
US11626340B2 (en) * | 2019-12-12 | 2023-04-11 | Qorvo Us, Inc. | Integrated circuit (IC) package with embedded heat spreader in a redistribution layer (RDL) |
US11296670B2 (en) | 2020-01-23 | 2022-04-05 | Qualcomm Incorporated | Impedance matching transceiver |
IT202000001819A1 (it) * | 2020-01-30 | 2021-07-30 | St Microelectronics Srl | Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione |
IT202000001822A1 (it) | 2020-01-30 | 2021-07-30 | St Microelectronics Srl | Circuito integrato e dispositivo elettronico comprendente una pluralita' di circuiti integrati accoppiati elettricamente tramite un segnale di sincronizzazione instradato attraverso il circuito integrato |
JP2023520029A (ja) | 2020-04-03 | 2023-05-15 | ウルフスピード インコーポレイテッド | 裏面ソース端子、ゲート端子及び/又はドレイン端子を有するiii族窒化物ベースの高周波増幅器 |
CN115668763A (zh) | 2020-04-03 | 2023-01-31 | 沃孚半导体公司 | 使用在栅极和/或漏极上具有穿过碳化硅通孔的晶体管管芯的堆叠rf电路拓扑 |
-
2020
- 2020-01-30 IT IT102020000001819A patent/IT202000001819A1/it unknown
-
2021
- 2021-01-26 EP EP21153537.2A patent/EP3869541A3/en active Pending
- 2021-01-29 US US17/162,595 patent/US11742311B2/en active Active
- 2021-02-01 CN CN202110139579.XA patent/CN113206069A/zh active Pending
- 2021-02-01 CN CN202120282004.9U patent/CN215600361U/zh active Active
-
2023
- 2023-06-13 US US18/334,280 patent/US20230335524A1/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5849606A (en) * | 1995-08-25 | 1998-12-15 | Hitachi, Ltd. | Semiconductor device and manufacturing of the same |
Also Published As
Publication number | Publication date |
---|---|
CN215600361U (zh) | 2022-01-21 |
EP3869541A3 (en) | 2021-12-08 |
EP3869541A2 (en) | 2021-08-25 |
US11742311B2 (en) | 2023-08-29 |
US20210242157A1 (en) | 2021-08-05 |
US20230335524A1 (en) | 2023-10-19 |
CN113206069A (zh) | 2021-08-03 |
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