IT1298938B1 - Circuito di polarizzazione di linea di bit per memorie non volatili - Google Patents

Circuito di polarizzazione di linea di bit per memorie non volatili

Info

Publication number
IT1298938B1
IT1298938B1 IT98MI000351A ITMI980351A IT1298938B1 IT 1298938 B1 IT1298938 B1 IT 1298938B1 IT 98MI000351 A IT98MI000351 A IT 98MI000351A IT MI980351 A ITMI980351 A IT MI980351A IT 1298938 B1 IT1298938 B1 IT 1298938B1
Authority
IT
Italy
Prior art keywords
bit line
volatile memories
line polarization
polarization circuit
circuit
Prior art date
Application number
IT98MI000351A
Other languages
English (en)
Inventor
Rosa Francesco La
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT98MI000351A priority Critical patent/IT1298938B1/it
Priority to US09/256,648 priority patent/US6049491A/en
Publication of ITMI980351A1 publication Critical patent/ITMI980351A1/it
Application granted granted Critical
Publication of IT1298938B1 publication Critical patent/IT1298938B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
IT98MI000351A 1998-02-23 1998-02-23 Circuito di polarizzazione di linea di bit per memorie non volatili IT1298938B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT98MI000351A IT1298938B1 (it) 1998-02-23 1998-02-23 Circuito di polarizzazione di linea di bit per memorie non volatili
US09/256,648 US6049491A (en) 1998-02-23 1999-02-23 Bitline bias circuit for non-volatile memory devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT98MI000351A IT1298938B1 (it) 1998-02-23 1998-02-23 Circuito di polarizzazione di linea di bit per memorie non volatili

Publications (2)

Publication Number Publication Date
ITMI980351A1 ITMI980351A1 (it) 1999-08-23
IT1298938B1 true IT1298938B1 (it) 2000-02-07

Family

ID=11379041

Family Applications (1)

Application Number Title Priority Date Filing Date
IT98MI000351A IT1298938B1 (it) 1998-02-23 1998-02-23 Circuito di polarizzazione di linea di bit per memorie non volatili

Country Status (2)

Country Link
US (1) US6049491A (it)
IT (1) IT1298938B1 (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6785177B2 (en) * 2002-12-10 2004-08-31 Freescale Semiconductor Inc. Method of accessing memory and device thereof
US7656714B2 (en) * 2004-11-03 2010-02-02 Samsung Electronics Co., Ltd. Bitline bias circuit and nor flash memory device including the bitline bias circuit
US7529135B2 (en) * 2006-12-28 2009-05-05 Sandisk Corporation Apparatus for controlling bitline bias voltage
US20080158972A1 (en) * 2006-12-28 2008-07-03 Sandisk Corporation Method of controlling bitline bias voltage
US7719899B2 (en) 2007-02-13 2010-05-18 Micron Technology, Inc. Circuits, systems and methods for driving high and low voltages on bit lines in non-volatile memory
CN101800081B (zh) * 2009-02-11 2012-05-02 北京兆易创新科技有限公司 一种用于mlc闪存的灵敏放大器和位线快速充电电路
US20150177433A1 (en) 2012-07-13 2015-06-25 Konica Minolta, Inc. Infrared shielding film

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5226013A (en) * 1987-12-01 1993-07-06 Sgs-Thomson Microelectronics S.R.L. Bias and precharging circuit for use in reading EPROM cells
EP0576774B1 (en) * 1992-06-30 1999-09-15 STMicroelectronics S.r.l. Voltage regulator for memory devices
US5768206A (en) * 1995-06-07 1998-06-16 Sgs-Thomson Microelectronics, Inc. Circuit and method for biasing bit lines
US5703827A (en) * 1996-02-29 1997-12-30 Monolithic System Technology, Inc. Method and structure for generating a boosted word line voltage and a back bias voltage for a memory array
US5907510A (en) * 1997-01-03 1999-05-25 Texas Instruments Incorporated Write bias generator for column multiplexed static random access memory
JP3972414B2 (ja) * 1997-06-20 2007-09-05 ソニー株式会社 データ判定回路およびデータ判定方法

Also Published As

Publication number Publication date
US6049491A (en) 2000-04-11
ITMI980351A1 (it) 1999-08-23

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Legal Events

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0001 Granted