IT1060573B - Stadio di comando integrabile monoliticamente - Google Patents

Stadio di comando integrabile monoliticamente

Info

Publication number
IT1060573B
IT1060573B IT2325076A IT2325076A IT1060573B IT 1060573 B IT1060573 B IT 1060573B IT 2325076 A IT2325076 A IT 2325076A IT 2325076 A IT2325076 A IT 2325076A IT 1060573 B IT1060573 B IT 1060573B
Authority
IT
Italy
Prior art keywords
control stage
monolithically integrable
integrable control
monolithically
stage
Prior art date
Application number
IT2325076A
Other languages
English (en)
Italian (it)
Original Assignee
Itt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Itt filed Critical Itt
Application granted granted Critical
Publication of IT1060573B publication Critical patent/IT1060573B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04Modifications for accelerating switching
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01714Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/02Shaping pulses by amplifying
    • H03K5/023Shaping pulses by amplifying using field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
IT2325076A 1975-05-16 1976-05-14 Stadio di comando integrabile monoliticamente IT1060573B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752521949 DE2521949A1 (de) 1975-05-16 1975-05-16 Monolithisch integrierbare mis- treiberstufe

Publications (1)

Publication Number Publication Date
IT1060573B true IT1060573B (it) 1982-08-20

Family

ID=5946771

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2325076A IT1060573B (it) 1975-05-16 1976-05-14 Stadio di comando integrabile monoliticamente

Country Status (6)

Country Link
JP (1) JPS51140544A (de)
DE (1) DE2521949A1 (de)
FR (1) FR2311407A1 (de)
GB (1) GB1520078A (de)
IT (1) IT1060573B (de)
NL (1) NL7605092A (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4071783A (en) * 1976-11-29 1978-01-31 International Business Machines Corporation Enhancement/depletion mode field effect transistor driver
US4093875A (en) * 1977-01-31 1978-06-06 International Business Machines Corporation Field effect transistor (FET) circuit utilizing substrate potential for turning off depletion mode devices
US4500799A (en) * 1980-07-28 1985-02-19 Inmos Corporation Bootstrap driver circuits for an MOS memory
USH97H (en) * 1982-12-21 1986-08-05 At&T Bell Laboratories Row-address-decoder-driver circuit
GB2133946B (en) * 1983-01-14 1986-02-26 Itt Ind Ltd Memory output circuit
IT1185851B (it) * 1985-08-02 1987-11-18 Sgs Microelettronica Spa Circuito di pilotaggio con boctstrap in tecnologia n-mos per carichi capacitivi

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1534428A (fr) * 1966-12-14 1968-07-26 North American Aviation Inc Dispositif d'excitation semi-conducteur à oxyde métallique et à réaction capacitive
US3508084A (en) * 1967-10-06 1970-04-21 Texas Instruments Inc Enhancement-mode mos circuitry

Also Published As

Publication number Publication date
JPS51140544A (en) 1976-12-03
DE2521949A1 (de) 1976-11-25
NL7605092A (nl) 1976-11-18
GB1520078A (en) 1978-08-02
FR2311407A1 (fr) 1976-12-10

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