HK1036854A1 - Levelizing transfer delays for a channel of memorydevices in a memory subsystem. - Google Patents

Levelizing transfer delays for a channel of memorydevices in a memory subsystem.

Info

Publication number
HK1036854A1
HK1036854A1 HK01106919A HK01106919A HK1036854A1 HK 1036854 A1 HK1036854 A1 HK 1036854A1 HK 01106919 A HK01106919 A HK 01106919A HK 01106919 A HK01106919 A HK 01106919A HK 1036854 A1 HK1036854 A1 HK 1036854A1
Authority
HK
Hong Kong
Prior art keywords
memorydevices
levelizing
channel
memory subsystem
transfer delays
Prior art date
Application number
HK01106919A
Other languages
English (en)
Inventor
William A Stevens
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1036854A1 publication Critical patent/HK1036854A1/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/842—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by introducing a delay in a signal path
HK01106919A 1998-11-03 2001-09-29 Levelizing transfer delays for a channel of memorydevices in a memory subsystem. HK1036854A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/186,042 US6173345B1 (en) 1998-11-03 1998-11-03 Method and apparatus for levelizing transfer delays for a channel of devices such as memory devices in a memory subsystem
PCT/US1999/024753 WO2000026789A1 (en) 1998-11-03 1999-10-22 Levelizing transfer delays for a channel of memory devices in a memory subsystem

Publications (1)

Publication Number Publication Date
HK1036854A1 true HK1036854A1 (en) 2002-01-18

Family

ID=22683418

Family Applications (1)

Application Number Title Priority Date Filing Date
HK01106919A HK1036854A1 (en) 1998-11-03 2001-09-29 Levelizing transfer delays for a channel of memorydevices in a memory subsystem.

Country Status (9)

Country Link
US (1) US6173345B1 (xx)
EP (1) EP1131718B1 (xx)
CN (1) CN1165845C (xx)
AU (1) AU1221200A (xx)
BR (1) BR9915826B1 (xx)
DE (1) DE69922835T2 (xx)
HK (1) HK1036854A1 (xx)
TW (1) TW538341B (xx)
WO (1) WO2000026789A1 (xx)

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Also Published As

Publication number Publication date
EP1131718A1 (en) 2001-09-12
BR9915826B1 (pt) 2012-02-07
BR9915826A (pt) 2001-08-14
US6173345B1 (en) 2001-01-09
TW538341B (en) 2003-06-21
AU1221200A (en) 2000-05-22
DE69922835D1 (de) 2005-01-27
WO2000026789A1 (en) 2000-05-11
DE69922835T2 (de) 2005-12-15
EP1131718A4 (en) 2003-08-06
CN1165845C (zh) 2004-09-08
CN1332869A (zh) 2002-01-23
EP1131718B1 (en) 2004-12-22

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20151022