GB9924488D0 - Semiconductor device having a plurality of mosfets on substrate and method of manufacturing the same - Google Patents
Semiconductor device having a plurality of mosfets on substrate and method of manufacturing the sameInfo
- Publication number
- GB9924488D0 GB9924488D0 GBGB9924488.1A GB9924488A GB9924488D0 GB 9924488 D0 GB9924488 D0 GB 9924488D0 GB 9924488 A GB9924488 A GB 9924488A GB 9924488 D0 GB9924488 D0 GB 9924488D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- mosfets
- substrate
- manufacturing
- semiconductor device
- same
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10294905A JP2000124325A (en) | 1998-10-16 | 1998-10-16 | Semiconductor device and manufacture thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9924488D0 true GB9924488D0 (en) | 1999-12-15 |
GB2342777A GB2342777A (en) | 2000-04-19 |
Family
ID=17813783
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9924488A Withdrawn GB2342777A (en) | 1998-10-16 | 1999-10-15 | Gate electrodes for integrated mosfets |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2000124325A (en) |
KR (1) | KR20000029067A (en) |
GB (1) | GB2342777A (en) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6602613B1 (en) | 2000-01-20 | 2003-08-05 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
JP2004507084A (en) | 2000-08-16 | 2004-03-04 | マサチューセッツ インスティテュート オブ テクノロジー | Manufacturing process of semiconductor products using graded epitaxial growth |
US6649480B2 (en) | 2000-12-04 | 2003-11-18 | Amberwave Systems Corporation | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
US6830976B2 (en) | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6593641B1 (en) | 2001-03-02 | 2003-07-15 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
WO2002071493A2 (en) * | 2001-03-02 | 2002-09-12 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed cmos electronics and high speed analog |
US6724008B2 (en) | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6723661B2 (en) | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6900103B2 (en) | 2001-03-02 | 2005-05-31 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6703688B1 (en) | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
WO2003025984A2 (en) | 2001-09-21 | 2003-03-27 | Amberwave Systems Corporation | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same |
WO2003028106A2 (en) | 2001-09-24 | 2003-04-03 | Amberwave Systems Corporation | Rf circuits including transistors having strained material layers |
US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US20030227057A1 (en) | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
US6982474B2 (en) | 2002-06-25 | 2006-01-03 | Amberwave Systems Corporation | Reacted conductive gate electrodes |
WO2004019391A2 (en) | 2002-08-23 | 2004-03-04 | Amberwave Systems Corporation | Semiconductor heterostructures having reduced dislocation pile-ups and related methods |
KR100546334B1 (en) * | 2003-07-01 | 2006-01-26 | 삼성전자주식회사 | Integrated circuit semiconductor device having different impurity concentration in respective regions of a semiconductor wafer, and fabrication method thereof |
JP2006049365A (en) * | 2004-07-30 | 2006-02-16 | Nec Electronics Corp | Semiconductor device |
US7393733B2 (en) | 2004-12-01 | 2008-07-01 | Amberwave Systems Corporation | Methods of forming hybrid fin field-effect transistor structures |
KR100739246B1 (en) * | 2005-04-11 | 2007-07-12 | 주식회사 하이닉스반도체 | Method of forming a source/drain region in semiconductor device |
JP2007005565A (en) | 2005-06-23 | 2007-01-11 | Fujitsu Ltd | Semiconductor device and its manufacturing method |
JP5930650B2 (en) * | 2011-10-07 | 2016-06-08 | キヤノン株式会社 | Manufacturing method of semiconductor device |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4135102A (en) * | 1977-07-18 | 1979-01-16 | Mostek Corporation | High performance inverter circuits |
JPS56120166A (en) * | 1980-02-27 | 1981-09-21 | Hitachi Ltd | Semiconductor ic device and manufacture thereof |
JP3163839B2 (en) * | 1993-05-20 | 2001-05-08 | 富士電機株式会社 | Semiconductor integrated circuit |
-
1998
- 1998-10-16 JP JP10294905A patent/JP2000124325A/en active Pending
-
1999
- 1999-10-14 KR KR1019990044480A patent/KR20000029067A/en not_active Application Discontinuation
- 1999-10-15 GB GB9924488A patent/GB2342777A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JP2000124325A (en) | 2000-04-28 |
GB2342777A (en) | 2000-04-19 |
KR20000029067A (en) | 2000-05-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |