GB9516396D0 - Data processing system signal receiving buffers - Google Patents
Data processing system signal receiving buffersInfo
- Publication number
- GB9516396D0 GB9516396D0 GBGB9516396.0A GB9516396A GB9516396D0 GB 9516396 D0 GB9516396 D0 GB 9516396D0 GB 9516396 A GB9516396 A GB 9516396A GB 9516396 D0 GB9516396 D0 GB 9516396D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- data processing
- processing system
- signal receiving
- system signal
- receiving buffers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/106—Data output latches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9516396A GB2304244B (en) | 1995-08-10 | 1995-08-10 | Data processing system signal receiving buffers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9516396A GB2304244B (en) | 1995-08-10 | 1995-08-10 | Data processing system signal receiving buffers |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9516396D0 true GB9516396D0 (en) | 1995-10-11 |
GB2304244A GB2304244A (en) | 1997-03-12 |
GB2304244B GB2304244B (en) | 2000-01-26 |
Family
ID=10779036
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9516396A Expired - Lifetime GB2304244B (en) | 1995-08-10 | 1995-08-10 | Data processing system signal receiving buffers |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2304244B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1647989A1 (en) * | 2004-10-18 | 2006-04-19 | Dialog Semiconductor GmbH | Dynamical adaption of memory sense electronics |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01238217A (en) * | 1988-03-18 | 1989-09-22 | Toshiba Corp | Malfunction preventing circuit for semiconductor integrated circuit |
JPH07114359B2 (en) * | 1989-07-28 | 1995-12-06 | 株式会社東芝 | Semiconductor integrated circuit |
JP2680936B2 (en) * | 1991-02-13 | 1997-11-19 | シャープ株式会社 | Semiconductor memory device |
JPH05181982A (en) * | 1991-12-27 | 1993-07-23 | Nec Eng Ltd | Large-scale integrated circuit device |
JPH05217387A (en) * | 1992-02-05 | 1993-08-27 | Mitsubishi Electric Corp | Semiconductor memory device |
US5345111A (en) * | 1992-08-19 | 1994-09-06 | Hyundai Electronics America | High-speed current sense amplifier |
JP3317746B2 (en) * | 1993-06-18 | 2002-08-26 | 富士通株式会社 | Semiconductor storage device |
-
1995
- 1995-08-10 GB GB9516396A patent/GB2304244B/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
GB2304244B (en) | 2000-01-26 |
GB2304244A (en) | 1997-03-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PE20 | Patent expired after termination of 20 years |
Expiry date: 20150809 |