GB9409713D0 - A method of treating a semi-conductor wafer - Google Patents

A method of treating a semi-conductor wafer

Info

Publication number
GB9409713D0
GB9409713D0 GB9409713A GB9409713A GB9409713D0 GB 9409713 D0 GB9409713 D0 GB 9409713D0 GB 9409713 A GB9409713 A GB 9409713A GB 9409713 A GB9409713 A GB 9409713A GB 9409713 D0 GB9409713 D0 GB 9409713D0
Authority
GB
United Kingdom
Prior art keywords
semi
treating
conductor wafer
wafer
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
GB9409713A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Electrotech Equipments Ltd
Original Assignee
Electrotech Equipments Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Electrotech Equipments Ltd filed Critical Electrotech Equipments Ltd
Priority to GB9409713A priority Critical patent/GB9409713D0/en
Publication of GB9409713D0 publication Critical patent/GB9409713D0/en
Priority to PCT/GB1995/001057 priority patent/WO1995031823A1/en
Priority to JP7529436A priority patent/JPH09501020A/en
Priority to CA002167085A priority patent/CA2167085A1/en
Priority to EP95918082A priority patent/EP0708982A1/en
Priority to US08/578,660 priority patent/US5858880A/en
Priority to KR1019960700128A priority patent/KR100334855B1/en
Priority to CN95190426A priority patent/CN1128582A/en
Priority to TW084106199A priority patent/TW307020B/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
GB9409713A 1994-05-14 1994-05-14 A method of treating a semi-conductor wafer Pending GB9409713D0 (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
GB9409713A GB9409713D0 (en) 1994-05-14 1994-05-14 A method of treating a semi-conductor wafer
PCT/GB1995/001057 WO1995031823A1 (en) 1994-05-14 1995-05-10 A method of treating a semi-conductor wafer
JP7529436A JPH09501020A (en) 1994-05-14 1995-05-10 Semiconductor wafer processing method
CA002167085A CA2167085A1 (en) 1994-05-14 1995-05-10 A method of treating a semi-conductor wafer
EP95918082A EP0708982A1 (en) 1994-05-14 1995-05-10 A method of treating a semi-conductor wafer
US08/578,660 US5858880A (en) 1994-05-14 1995-05-10 Method of treating a semi-conductor wafer
KR1019960700128A KR100334855B1 (en) 1994-05-14 1995-05-10 A method of treating a semi-conductor wafer
CN95190426A CN1128582A (en) 1994-05-14 1995-05-10 A method of treating a semi-conductor wafer
TW084106199A TW307020B (en) 1994-05-14 1995-06-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9409713A GB9409713D0 (en) 1994-05-14 1994-05-14 A method of treating a semi-conductor wafer

Publications (1)

Publication Number Publication Date
GB9409713D0 true GB9409713D0 (en) 1994-07-06

Family

ID=10755170

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9409713A Pending GB9409713D0 (en) 1994-05-14 1994-05-14 A method of treating a semi-conductor wafer

Country Status (8)

Country Link
EP (1) EP0708982A1 (en)
JP (1) JPH09501020A (en)
KR (1) KR100334855B1 (en)
CN (1) CN1128582A (en)
CA (1) CA2167085A1 (en)
GB (1) GB9409713D0 (en)
TW (1) TW307020B (en)
WO (1) WO1995031823A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2734402B1 (en) * 1995-05-15 1997-07-18 Brouquet Pierre PROCESS FOR ELECTRICAL ISOLATION IN MICROELECTRONICS, APPLICABLE TO NARROW CAVITIES, BY DEPOSITION OF OXIDE IN THE VISCOUS STATE AND CORRESPONDING DEVICE
DE19712233C2 (en) * 1996-03-26 2003-12-11 Lg Philips Lcd Co Liquid crystal display and manufacturing method therefor
US7923383B2 (en) 1998-05-21 2011-04-12 Tokyo Electron Limited Method and apparatus for treating a semi-conductor substrate

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2009518C (en) * 1990-02-07 2000-10-17 Luc Ouellet Spin-on glass processing technique for the fabrication of semiconductor device
CA2137928C (en) * 1992-07-04 2002-01-29 Christopher David Dobson A method of treating a semiconductor wafer

Also Published As

Publication number Publication date
EP0708982A1 (en) 1996-05-01
KR960704349A (en) 1996-08-31
CA2167085A1 (en) 1995-11-23
WO1995031823A1 (en) 1995-11-23
JPH09501020A (en) 1997-01-28
CN1128582A (en) 1996-08-07
KR100334855B1 (en) 2002-11-13
TW307020B (en) 1997-06-01

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