GB920306A - Fabrication method for semiconductor devices - Google Patents

Fabrication method for semiconductor devices

Info

Publication number
GB920306A
GB920306A GB932961A GB932961A GB920306A GB 920306 A GB920306 A GB 920306A GB 932961 A GB932961 A GB 932961A GB 932961 A GB932961 A GB 932961A GB 920306 A GB920306 A GB 920306A
Authority
GB
United Kingdom
Prior art keywords
oxide layer
oxide
solution
stripped
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB932961A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pacific Semiconductors Inc
Original Assignee
Pacific Semiconductors Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pacific Semiconductors Inc filed Critical Pacific Semiconductors Inc
Publication of GB920306A publication Critical patent/GB920306A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemically Coating (AREA)

Abstract

920,306. Coating with metals; modifying metallic surfaces. PACIFIC SEMICONDUC. TORS Inc. March 14, 1961 [Aug. 25, 1960], No. 9329/61. Class 82 (1). [Also in Group XXXVI] An oxide masking layer is formed on the surface of a semi-conductor such as Si, Ge, InSb, GaSb, AlSb, InAs, GaAs, CaP or InP by heating in air, stripping this first oxide layer and forming a second oxide layer which is stripped in selected areas for further treatment such as metal coating or diffusion of active impurities. In the example an interleaved NPN transistor 10 is made by diffusing phosphorus into N type silicon to form N + collector region 14, and the P type region 11 is made by diffusing boron. The oxide layer formed on region 11 during this diffusion process is stripped in 48% HF and a fresh oxide layer 17 free of contaminants is then formed by heating in air at 850‹ C. to 1100‹ C. This oxide is removed according to the pattern of Fig. 2 by etching in HF and phosphorus is diffused into the exposed surface 18 at 1000‹ C. to 1265‹ C. in a nitrogen atmosphere. The remaining oxide is then removed in HF. A further oxide layer may be formed and stripped according to a required pattern, preferably by a photo resist method ; to expose the surface 18 of P type region 11 (Fig. 9, not shown). This surface is chemically plated by immersion in a solution containing nickelous chloride, sodium citrate, sodium acetate and sodium hypophosphite in a ratio of 30 : 15 : 5 : 10 gms./litre heated to 95 ‹ C. A solution of gold chloride, HCl, and HF in a ratio of 16: 30: 10 gms./litre and a solution of 1 part HF to 4 parts water are added to the first solution and a gold/nickel deposit is formed on surface 18 as ohmic contacts.
GB932961A 1960-08-25 1961-03-14 Fabrication method for semiconductor devices Expired GB920306A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5189460A 1960-08-25 1960-08-25

Publications (1)

Publication Number Publication Date
GB920306A true GB920306A (en) 1963-03-06

Family

ID=21974016

Family Applications (1)

Application Number Title Priority Date Filing Date
GB932961A Expired GB920306A (en) 1960-08-25 1961-03-14 Fabrication method for semiconductor devices

Country Status (1)

Country Link
GB (1) GB920306A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3281915A (en) * 1963-04-02 1966-11-01 Rca Corp Method of fabricating a semiconductor device
US3490963A (en) * 1964-05-18 1970-01-20 Sprague Electric Co Production of planar semiconductor devices by masking and diffusion

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3281915A (en) * 1963-04-02 1966-11-01 Rca Corp Method of fabricating a semiconductor device
US3490963A (en) * 1964-05-18 1970-01-20 Sprague Electric Co Production of planar semiconductor devices by masking and diffusion

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