GB2501823A

GB2501823A - Dielectric capacitor with structured electrode

Info

Publication number: GB2501823A
Application number: GB1307443.0A
Authority: GB
Inventors: Gehan Amaratunga; Youngjin Choi; Sai Giridhar Shivareddy; Nathan Charles Brown; Charles Anthony Nield Collis
Original assignee: Dyson Technology Ltd
Current assignee: Dyson Technology Ltd
Priority date: 2012-05-03
Filing date: 2013-04-25
Publication date: 2013-11-06
Anticipated expiration: 2033-04-25
Also published as: GB2501823A8; GB201207766D0; GB2501823C; GB201307443D0; GB2501823B8; WO2013164576A1; GB2501823B

Abstract

A method of manufacturing a dielectric capacitor comprising providing a first electrode having a structured surface, a dielectric layer coated onto the first electrode, and a second electrode coated onto the dielectric layer; where the structured surface comprises a random array of tubes, wires or rods which extend from the substrate surface, and where the dielectric layer is deposited by atomic layer deposition. Also disclosed is a dielectric capacitor comprising a structured electrode of randomly arranged carbon nanotubes extending from a substrate surface; a dielectric layer coated onto the structured electrode; and a second electrode coated onto the dielectric layer. The structured surface may have a spacing to length ratio with a maximum of 1:30. The dielectric layer may comprise one or more of hafnium oxide, titanium dioxide, barium titanate. The second electrode may be aluminium, titanium nitride, platinum, ruffinium or galinstan. The dielectric coating may be provided as a two layer coating, the first coating provided by plasma-enhanced atomic layer deposition and a second by thermal atomic layer deposition.

Description

Dielectric Capacitor This invention relates to a dielectric capacitor.

Dielectric capacitors generally comprise a first electrode, a dielectric material and a second electrode, with the electrodes being separated by the dielectric material. Such capacitors have the potential to be used as energy storage devices which can be charged and discharged similarly to rechargeable batteries. As there is a drive towards smaller and lighter portable energy storage devices with fast charge, high storage capacity and relatively low cost, there is also a drive to producing better capacitors.

A first aspect of the invention provides a dielectric capacitor comprising: a fir st electrode having a structured surface; a dielectric layer coated onto the first electrode; and a second electrode coated onto the dielectric layer.

A structured surface is one having depth as well as area so that the surface area, for a given cross-sectional area of a structured substrate, is greater than that of a relatively flat or unstructured substrate. This extra surface area provides significant advantages as it enablcs grcatcr chargc storage without a significant incrcasc in thc size of the capacitor. The structured surfacc is preferably provided by carbon nanotubes (CNTs) which, although small in size, provide a significant increase in the area available for charge storage.

It is preferred that the structured surface is provided by an array of tubes, wires or rods which extend from the substrate surface, akin to bristles on a brush.

In a preferred embodiment, the first electrode comprises a random array of structures, preferably CNTs. Such a random array is also known as supergrowth and has a significantly higher growth rate than a regular array. Preferably, the spacing to length ratio of the structures is a maximum of 1:30. If the structures are too long for a given density, then the dielectric coating becomes non-conformal, resulting in a discontinuous dielectric layer. In addition, if the structures are too long and dense then it can be difficult to form both the dielectric layer and the second electrode layer on top of the structures.

The dielectric layer is deposited onto the structured surface by one of a number of appropriate techniques such as atomic layer deposition (ALD) or electrophoretic deposition (EPD). For ALD, and in the case when the structured surface is provided by CNTs, it is preferred that at least a first stage of an AILD process is plasma enhanced ALD (PEALD) using an oxygen precursor, as carbon is hydrophobic. After this first stage of PEALD, thermal ALD is preferably used to complete the dielectric coating.

Thermal ALD is cheaper and deposits material at a faster rate than PEALD. The dielectric layer preferably comprises one or more of hafnium oxide, titanium dioxide, and barium titanate.

The second electrode is preferably formed using ALD of, for example, aluminium, titanium nitride, platinum or ruthenium. Alternatively galinstan (a liquid metal alloy consisting of gallium, indium, and tin) or aluminium may be evaporated onto the coated structure using an Edwards vacuum evaporator.

According to a second aspect the invention comprises a method of manufacturing a dielectric capacitor comprising the steps of: providing a electrode having a structured surface; coating the structured surface of the electrode with a dielectric material; and coating the dielectric material with a second electrode material.

Preferably, the electrode is produced by chemical vapour deposition (CVD) and it is preferred that the structured surface is provided by CNTs. Preferably, the chemical vapour deposition process is a two step process, having a first step which is carried out at a different temperature to a second step. It is preferred that the first step is carried out at a lower temperature than the second step.

Preferably, the first step is carried out at a different reactant flow rate to the second step.

It is preferred that the first step is carried out at a lower reactant flow rate than the second step.

For the production of a regular array of CNTs, a substrate may be lithographically prepared to promote the growth of the CNTs only in specified positions. One preferred growth process consists of four stages: (a) a substrate pre-treatment (forming a diffusion barrier), where silicon is sputtcred with a 30 tim thick layer of niobium; (b) a catalyst deposition, where a lOnm thick film of nickel catalyst is deposited onto the substrate; (c) a catalyst annealing (sintering) stage, where the substrate is heated to 700°C and held for 10 mm to sinter the catalyst layer and to form islands or nano-spheres of the catalyst; and (d) a nanotube growth, where 200 sccm flow of NH3 is introduced, a dc discharge between a cathode (the substrate) and an anode is huitiated, the bias voltage is increased to -600 V. and a 60 sccm flow of acetylene (C2H2) feed gas is introduced.

In one example, the total pressure was maintained at 3.8 mbar and the depositions were carried out for 10 mm in a stable discharge.

For supergrowth or random CNTs, a preferred growth process is as follows: (a) a substrate is coated with a 2-4nm thick layer of aluminium; (b) a 2-4 nm thick film of iron (Fe) catalyst is sputtered on the aluminium layer, using a metal sputter coating cquipmdnt with a base pressure of 10 mbar; and (c) the coated substrate is annealed at 600°C within an NH environment for 10 minutes, and then 2 sccm C2H2 is introduced into the chamber to grow CNTs.

The CNT growth stage preferably has a duration which is no greater than 10 minutes, preferably bctwccn 1 and 10 minutcs, even more preferably between 1 and 3 minutes.

The aluminium layer is a barrier layer, and is used to form a thin alumina layer during the annealing process step. This thin oxide layer assists in forming iron nano-islands to grow CNTs in a high density. The substrate may be any conductive substrate.

Prefcrably, thc substratc is a coppcr or a silicon substratc. Altcrnatively, thc substratc maybe a graphite substrate.

Preferably, the dielectric coating is formed by ALD, either as plasma alone or a combination of plasma followed by thermal. In the case of CNTs, this has the advantage of coating the hydrophobic CNTs in a non aqueous environment before using the faster method of thermal ALD in an aqucous cnvironmcnt.

It is preferred that the dielectric is a high k metal oxide such as hafnium oxide, titanium dioxidc, barium titanate (BTO), or barium strontium titanatc. Such coatings can bc produced by various mcthods including but not limitcd to atomic layer dcposition (ALD), plasma enhanced ALD (PEALD), physical vapour deposition (PYD), pulsed laser deposition (PLD), metal organic chemical vapour deposition (MOCVD), plasma enhanced chcmical vapour deposition (PECYD) and sputter coating.

In addition various polymer materials having relatively high K values can be used to form the dielectric, such as cyanoresins (CR-S), polyvillylidene fluoride-based polymers such as Pvdf: Trfe, or PVDF:TrFE:CFE, which can be spin coated onto the BTO coated CNTs. Self assembled monolayer coatings of phosphonic acids can also ifinction as an additional coating to ftirthcr rcducc the leakage current.

The ALD process may comprise a plurality of deposition cycles, with each deposition cycle comprising the steps of (i) introducing a precursor to a process chamber, (ii) purging the process chamber using a purge gas, (iii) introducing an oxygen source as a second precursor to the process chamber, and (iv) purging the process chamber using the purge gas. The oxygen source may be one of oxygen and ozone. The purge gas may be argon, nitrogen or helium. To deposit hafnium oxide, an alkylamino hathium compound precursor may be used. To deposit titanium dioxide, a titanium isopropoxide precursor may be used. Each deposition cycle is preferably performed with the substrate at the same temperature, which is preferably in the range from 200 to 300°C, for example 250°C. Each deposition step preferably comprises at least 100 deposition cycles. For example, an ALD deposition may comprise 200 to 400 deposition cycles to produce a hafnium oxide coating having a thickness in the range from 25 to 50 nm.

Where the deposition cycle is a plasma enhanced deposition cycle, step ciii) above preferably also includes striking a plasma, for example from argon or from a mixture of argon and one or more other gases, such as nitrogen, oxygen and hydrogen, before the oxidizing precursor is supplied to the chamber.

It is preferred that the dielectric coating is produced in a two step ALD process, whereby a first layer of the coating is deposited, followed by a pause in the deposition process and then a second layer of the second coating is deposited. This two step coating is applicable to both plasma only and combined plasma and thcrmal ALD coating methods. Thc pausc is a brcak or delay in the dcposition proccss which has been found advantageous to certain properties of the material deposited on the substrate.

The delay preferably has a duration of at least one minute. The delay is preferably introduced to the deposition by supplying a purge gas to a process chamber in which the substrate is located for a period of time of at least one minute between the first deposition step and the second deposition step. Each deposition step preferably comprises a plurality of consecutive deposition cycles. Each of the deposition steps preferably comprise at least fifty deposition cycles, and at least one of the deposition steps may comprise at least one hundred deposition cycles. In one example, each of the deposition steps comprises two hundred consecutive deposition cycles. The duration of the delay between the deposition steps is preferably longer than the duration of each deposition cycle. The duration of each deposition cycle is preferably in the range from to 50 seconds.

The delay between deposition steps may be provided by a prolonged duration of a period of time for which purge gas is supplied to the process chamber at the end of a selected one of the deposition cycles. This selected deposition cycle may occur towards the start of the deposition process, towards the end of the deposition cycle, or substantially midway through the deposition process.

To form a capacitor, a second electrode is required. It is preferred that the second electrode is formed from a metal or intermetallie material such as, but not limited to, aluminium, titanium nitride, ruthenium, or platinum which can be deposited onto the coated NT using ALD, for example. In addition, a liquid metal alloy such as galinstan may be evaporated onto the structure. A metal-insulator-semiconductor (AIIHfO2/n-Si) capacitor structure may be made by applying dots of aluminum on top of the hafnium oxide coated silicon substrate. Such dots may be 0.5 mm in diameter and made by the evaporation of aluminum.

The invention will now be described by way of example, with reference to the accompanying drawings, of which: Figures Ia and lb show supergrowth of CNTs on silicon substrate; Figures 2a, 2b, 2e, and 2d show supergrowth of NTs on copper substrate; Figures 3a and 3b show a two stage deposition process for CNTs at different magnifications; Figures 4a, 4b and 4c show CNTs coated with a dielectric coating of hafnium oxide; Figures 5a and Sb show CNTs coated with a dielectric coating of titanium oxide; Figures 6a and 6b show CNTs coated with a dielectric coating of hafnium oxide; Figures 7a, 7b, and 7c show a dielectric capacitor made using supergrowth NTs; Figures 8a and Sb show a dielectric capacitor made using regular array of CNTs; Figure 9 shows a graph of leakage current density for a dielectric capacitor according to the invention; and Figure 10 shows a comparison of leakage current density for different coating methods.

Chemical vapour deposition (CVD) is used to produce supergrowth CNTs in a D.C.

plasma enhanced CVD growth chamber to provide oriented nanotubes. A substrate is coated with approximately 4nm thick layer of aluminium by evaporation using an Edwards vacuum evaporator, and then an iron (Fe) catalyst film of approximately 4 nm thickness is sputtered on the aluminium using a metal sputter coating equipment at a base pressure of 1 mbar.

In the deposition chamber, thc coatcd substrate is anncalcd at 600 °C in a 198 sccm NH3 environment for 10 minutcs, and then 200 sccm C2H2 is introduccd into the chambcr to grow CNTs. The aluminium is a barrier layer and is used to form a thin alumina layer during the annealing process step, and this thin oxide layer helps in forming iron nano-islands to grow CNTs in a high density.

Figures la and lb both show supergrowth on a silicon substrate, where the deposition was carried out at 600 °C for 3 minutes using 2 nm thick Fe catalyst in Figure Ia, and for 1 minute using 2 nm thick Fe catalyst in Figure Ib, producing CNTs having a length of 30 microns and 10 microns respectively.

S

Figures 2a, 2b, and 2c all show supergrowth on a copper substrate where the deposition was carried out at 600 °C for 10 minutes, 3 minutes and 1 minute respectively. A 2 nm thick barrier laycr of a'uminium was sputtcr coatcd onto thc coppcr, followed by a 2 nm thick catalyst layer of iron. The 10 minute process produced CNTs of length 200 microns; this length was found to be too long for successful dielectric coating. The 3 minutes and 1 minute processes produced CNTs having a length of around 30 microns and 10 microns respectively, which could be successfully coated with a dielectric material.

Figure 2d shows a supergrowth on copper substrate using both a thicker Fe catalyst layer (4 nm thick) and a thicker aluminium layer (4 urn); the deposition process was carried out for 3 minutes. Curly CNTs are grown sparscly and the thickness or height of the GNT layer is about 1 micron.

The effect of a number of deposition parameters on the supergrowth CNTs was investigated. All the CNTs were grown on a copper substrate, with a 4nm aluminium banier layer and a 4nm iron catalyst layer. Firstly the effect of deposition temperature was investigated using a flow rate of 200 sccm of C2H2 and 100 sccm of NH3 at a deposition pressure of 3Ombar. For all deposition temperatures, a pre-annealing step was carried out at 500°C for 2 minutes to stabilize the heater flowed by annealing for 30 seconds at the dcposition temperature before a 3 minutc dcposition process was carried out. Dcposition tcmpcraturcs were 520°C, 550°C, 570°C, 580°C and 600°C. Ncxt, the effect of deposition temperature using 80 seem of NH3 was investigated; the other parameters remained the same as for the first set of investigations. Deposition tcmpcraturcs of 500°C, 5 10°C, 520°C, 530°C, 540°C, 550°C 560°C and 570°C. It was found for both investigations that at the lowcst tcmperatures whilst a high number of CNTs were grown, the growth rate was low so the CNTs were short. At the highest temperatures, fewer but longer CNTs were grown. Thus, a deposition temperature of 570°C was found to give the optimum balance between number and the length of CNTs grown.

The effect of the flow rate of NH3 at a deposition temperature of 570°C, pressure of 3ombar and flow rate of 200 sccm of C21-12 was also studied. The flow rate of NI-I3 was 50, 60 70 and 80 seem. It was found that increasing the flow rate of ammonia resulted in the production of consistent CNTs.

The effect of deposition pressure at a deposition temperature of 5 70°C, and flow rate of sccm of NH3 and a flow rate of 200 seem of CM2 was investigated. The deposition pressure was 20, 25, 30, 40 and 50 mbar. At lower deposition pressure it was found that the CNTs grown were more random and curlier and at higher deposition pressures straighter CNTs were produced. The optimum was 3Ombar as this provided the best balance between CNT density and the ability to coat the CNTs conformally.

In addition, a two stage deposition process was carried out; the resulting CNTs are shown in Figures 3a at 2000x magnification and Figure 3b at 5000x magnification. The substrate was copper coated with 4nm aluminium and 4nm iron. A first deposition step was carried out at 530°C for 1 minute at a flow rate of 200 seem C21-12 and 50 seem NI-h at a pressure of 30mbar. The temperature was then increased to 570°C and the flow rate of ammonia increased to 100 sccm for a second deposition step lasting 3 minutes.

The advantage of this two stage process is that a high number of CNTs is seeded in the first stage which can then be grown rapidly and consistently in the second stage.

Following production of NTs, a dielectric material is deposited onto the CNT surface.

A number of different materials and techniques are available to produce the dielectric layer. Both hafnium oxide and titanium dioxide were deposited by ALD (atomic layer deposition) onto the CNTs. In addition electrophoretie deposition (EPD) of a charged dielectric particle such as barium titanate was carried out.

Each ALD process was conducted using a Cambridge Nanotech Fiji 200 plasma ALD system. The substrate was located in a process chamber of the ALD system which was evacuated to a pressure in the range from 0.3 to 0.5 mbar during the deposition process, and the substrate was held at a temperature of around 250°C during the deposition process. Argon was selected as a purge gas, and was supplied to the chamber at a flow rate of 200 sccm for a period of at least 30 seconds prior to commencement of the first deposition cycle.

For the deposition of hathium oxide, each deposition cycle commences with a supply of a hafnium precursor to the deposition chamber. The hafnium precursor was tctrakis dimethyl amino hafnium (TDMAHf, Hf(N(CH3)2)4). The hafnium precursor was added to the purge gas for a period of 0.25 seconds. Following the introduction of the hafnium precursor to the chamber, the purge gas was supplied for a further 5 seconds to remove any excess hafhium precursor from the chamber. A plasma was then struck using the argon purge gas. The plasma power level was 300 W. The plasma was stabilised for a period of 5 seconds before oxygen was supplied to the plasma at a flow rate of 20 sccm for a duration of 20 seconds. The plasma power was switched off and the flow of oxygen stopped, and the argon purge gas was supplied for a further S seconds to remove any excess oxidizing precursor from the chamber, and to terminate the deposition cycle.

Figures 4a and 4b show long, high-density supergrowth CNTs with a coating of hafnium oxide to form a dielectric layer. Figure 4a is with a silicon substrate and Figure 4b with a copper substrate and both have been coated with 34.8 nm of hafnium oxide by PEALD (plasma cnhanccd atomic layer dcposition). Figure 4c is a close up of thc bottom of Figurc 4b and shows that thc conformal coating of thc hafnium oxidc is hard to achieve with PEALD on the very high aspect ratio structure.

Figures 5a and Sb show long, high-density supcrgrowth CNTs with a coating of titanium oxide to form a dielectric layer. Figure 5a has a 21.Snm layer and Figure Sb shows a close up of the superowth shown in Figure Sa. Titanium isopropoxide precursor was used in the PEALD process.

Figures 6a and 6b show curly, sparse supcrgrowth CNTs formed on a copper foil with a 36nm thick coating of hafnium oxide formed using a mixture of plasma and thermal ALD. 200 deposition cycles of the aforementioned PEALD process were performed, followed by 200 deposition cycles of thermal ALD.

Figure 7a shows hathium oxide coated supergrowth CNTs with a top coating of galinstan. Figure 7b shows a close up of the galinstan coating as evaporated onto the coated CNTs and Figure 7c after annealing the galinstan, which shows more conformal coating of the coatcd CNTs. Galinstan is a liquid metal alloy and is evaporated onto the surface of the coated CNTs. It can be applied to ALD and EPD coatings to produce the final layer of the dielectric capacitor, the second electrode or the top electrode.

An alternate top coating is provided by titanium nitride deposited using a PEALD process using a hydrogen plasma and titanium isopropoxide precursor.

A regular array of NTs has predetermined and controlled gaps between each structure or CNT. Plasma enhanced chemical vapour deposition (PECVD) was used to produce regular arrays of CNTs on a silicon substrate using a nickel catalyst. The capacitance and leakage current density of the regular arrays were compared with results using supergrowth CNTs.

For the growth of a regular array of CNTs, the substrate had been lithographically prepared to promote the owth of the CNTs only in specified positions. The growth process consists of four stages; substrate prc-trcatment (forming a difffision barrier) where silicon was sputtered with a layer of 30 nni of niobium; followed by catalyst deposition where I Onm thin films of nickel catalyst were deposited onto the substrate; catalyst annealing (sintcring) where the substrate was heated to 700°C and held for 10 mm to sinter the catalyst layer and to form islands or nano-spheres of the catalyst; and then nanotube growth where 200 sccm of NH3 was introduced. A dc discharge between the cathode (sample) and the anode (shower head) was initiated. The bias voltage was increased to -600 V and 60 sccm of acetylene (CM2) feed gas was introduced. The total pressure was maintained at 3.8 mbar and the depositions were carried out for 10 mm in

a stable discharge.

Decomposition of the carbonaceous gas on the surface of the catalyst particles accounts for the growth of nanotubes. The carbon dissolves in the catalyst, diffuses through the catalyst, and is extended to form the nanotube. The introduction of ammonia (NH3) in the deposition process is advantageous as it results in the etching away of by-products such as amorphous carbon.

Nickel can easily diffuse into the silicon substrate and nickel silicides can be formed as a result. Therefore a niobium diffusion barrier layer is required to prevent the silicide formation.

Figures 8a and 8b show hafnium oxide coated patterned-CNTs array with a top coating of galinstan. Figure Sb is a magnified view of the array shown in Figure 8a. The evaporated galinstan forms nano-droplets on the CNTs but it is sufficient to form a second electrode.

Figure 9 shows leakage current density graphs for the hafnium oxide coated patterned CNTs for 400 cycles of plasma ALD on supergrowth CNTs (as illustrated by plot 800), a combination of 200 cycles of plasma ALD followed by 200 cycles of thermal ALD on supergrowth CNTs (as indicated by plot 810), and 200 cycles of plasma ALD followed by 200 cycles of thermal ALD on a regular array of CNTs (as indicated by plot 820). The plasma only coating gives a consistently higher leakage current density than for the combined plasma and thermal coating. The supergrowth combined AILD (plot 810) gives consistently better result than the supergrowth CNTs with plasma only ALD (plot 820). The results show that a combination of plasma and thermal AID is better than a plasma ALD-only coating, as the thermal ALD gives a more conformal coating resulting in a lower leakage current.

Figure 10 shows a comparison of capacitance for the above different coating methods.

The mixed mode coating (formed from a combination of plasma and thermal ALD) generates a lower capacitance but also a lower leakage current density than for the plasma only supergrowth. The patterned CNTs were grown sparsely and so had a poor capacitance due to their reduced packing density.

Thus, although the patterned CNTs had a lower leakage cunent density the advantage of having uniform spacing between the CNTs and achieving a conformal coating over all the CNTs was then lost when capacitance was measured, as the regular structure did not have a dense enough structure to produce a good capacitance reading.

It is advantageous to include an ageing step in any AID process as this has been shown to increase the resultant dielectric constant of the material being coated. An example of such a discontinuous PEALD process comprises a first deposition step, a second deposition step, and a delay between the first deposition step and the second deposition step. The first deposition step comprised 200 consecutive deposition cycles, again with substantially no delay between the end of one deposition cycle and the start of the next deposition cycle. The second deposition step comprised further 200 consecutive deposition cycles, again with substantially no delay between the end of one deposition cycle and the start of the next deposition cycle. The delay between the final deposition cycle of the first deposition step and the first deposition cycle of the second deposition step was 30 minutes. During the delay, the pressure in the chamber was maintained in the range from 0.3 to 0.5 mbar, the substrate was held at a temperature of around 250°C, and the argon purge gas was conveyed continuously to the chamber at 20 sccm. This delay between the deposition steps may also be considered to be an increase in the period of time during which purge gas is supplied to the chamber at the end of a selected deposition cycle. The thickness of a hafhium oxide coating produced by a discontinuous process was around 36 nm i.e. similar to that produced by the continuous process.

For titanium dioxide coatings formed on respective silicon substrates both continuous and discontinuous processes were carried out. A first example of a discontinuous PEALD process, comprises a first deposition step, a second deposition step, and a delay between the first deposition step and the second deposition step. The first deposition step comprised 200 consecutive deposition cycles, again with substantially no delay between the end of one deposition cycle and the start of the next deposition cycle. The second dcposition step comprised further 200 consecutive deposition cycles, again with substantially no delay between the end of one deposition cycle and the start of the next deposition cycle. The delay between the final deposition cycle of the first deposition step and the first deposition cycle of the second deposition step was 10 minutes. During the delay, the pressure in the chamber was maintained in the range from 0.3 to 0.5 mbar, the substrate was held at a temperature of around 250°C, and the argon purge gas was conveyed to the chamber at 20 sccm. A second discontinuous process was similar to the first discontinuous process, but with a delay of 30 minutes. A third discontinuous deposition process was similar to the first discontinuous process, but with a delay of 60 minutes.

Claims

CLAIMS1. A method of manufacturing a dielectric capacitor, comprising the steps of providing a structured electrode surface wherein the structured electrode is provided by a random array of tubes, wires or rods which extend from a substrate surface; coating the structured electrode with a dielectric material using an atomic layer deposition process; and coating the dielectric material with a second electrode material.
2. A method as claimed in claim 1, wherein the structured electrode is fomied using a chemical vapour deposition process.
3. A method according to claim 2, wherein the chemical vapour deposition process is a two step process, having a first step which is carried out at a different temperature to a second step.
4. A method according to claim 3, wherein the first step is carried out at a lower temperature than the second step.
5. A method according to claim 3 or claim 4, wherein the fir st step is carried out at a different reactant flow rate to the second step.
6. A method according to claim 5, wherein the first step is carried out at a lower reactant flow rate than the second step.
7. A method as claimed in any preceding claim, wherein the atomic layer deposition process is one of a plasma enhanced atomic layer deposition process, and a plasma enhanced atomic layer deposition process followed by a thermal atomic layer deposition process.
8. A method as claimed in any preceding claim, wherein the dielectric coating is produced in a two step process whereby a first layer of the dielectric coating is deposited, followed by a pause in the deposition process of at least one cycle length, and then a second layer of dielectric coating is deposited.
9. A method as claimed in any preceding claim, wherein the array is an array of carbon nanotubcs.
10. A method as claimed in any preceding claim, wherein the structured surface has a spacing to length ratio with a maximum of 1:30.
11. A method as claimed in any preceding claim, wherein the dielectric layer comprises one or more of hafiuium oxide, titanium dioxide, and barium titanate.
12. A method as claimed in any preceding claim, wherein the second electrode is formed from aluminium, titanium nitride, platinum, ruthenium or galinstan.
13. A dielectric capacitor comprising: a tint electrode having a structured surface wherein the structured surface is provided by a random array carbon nanotubes which extend from a substrate surface; a dielectric layer coated onto thc first electrode; and a second electrode coated onto the dielectric layer.
14. A dielectric capacitor produced by the method of any of claims 1 to 12.