GB2375196B - Method for optimizing the use of a storage means and devices and switching nodes for implementing the same - Google Patents

Method for optimizing the use of a storage means and devices and switching nodes for implementing the same

Info

Publication number
GB2375196B
GB2375196B GB0202519A GB0202519A GB2375196B GB 2375196 B GB2375196 B GB 2375196B GB 0202519 A GB0202519 A GB 0202519A GB 0202519 A GB0202519 A GB 0202519A GB 2375196 B GB2375196 B GB 2375196B
Authority
GB
United Kingdom
Prior art keywords
optimizing
implementing
devices
storage means
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0202519A
Other versions
GB2375196A (en
GB0202519D0 (en
Inventor
Yacine E L Kolli
Falk Tannhauser
Stephane Bizet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of GB0202519D0 publication Critical patent/GB0202519D0/en
Publication of GB2375196A publication Critical patent/GB2375196A/en
Application granted granted Critical
Publication of GB2375196B publication Critical patent/GB2375196B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
GB0202519A 2001-02-14 2002-02-04 Method for optimizing the use of a storage means and devices and switching nodes for implementing the same Expired - Fee Related GB2375196B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0102034A FR2820845B1 (en) 2001-02-14 2001-02-14 METHOD FOR OPTIMIZING THE USE OF A STORAGE MEANS, SWITCHING DEVICE, SIGNAL, AND CORRESPONDING APPLICATIONS

Publications (3)

Publication Number Publication Date
GB0202519D0 GB0202519D0 (en) 2002-03-20
GB2375196A GB2375196A (en) 2002-11-06
GB2375196B true GB2375196B (en) 2003-12-17

Family

ID=8860027

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0202519A Expired - Fee Related GB2375196B (en) 2001-02-14 2002-02-04 Method for optimizing the use of a storage means and devices and switching nodes for implementing the same

Country Status (2)

Country Link
FR (1) FR2820845B1 (en)
GB (1) GB2375196B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0041429A1 (en) * 1980-05-19 1981-12-09 ETAT FRANCAIS repr. par le Secrétaire d'Etat aux Postes & Télécommunications (Centre National d'Etudes des Télécommunications) Process and device for the synchronization of digital signals
FR2594277A1 (en) * 1986-02-13 1987-08-14 Houdoin Thierry Device for synchronising packets by dual phase-lock loop
WO1992015055A1 (en) * 1991-02-18 1992-09-03 Siemens Aktiengesellschaft Circuit for connecting a microprocessor system with a communications channel
US5469449A (en) * 1993-10-28 1995-11-21 Daewoo Electronics Co., Ltd. FIFO buffer system having an error detection and resetting unit
EP0752642A1 (en) * 1995-07-07 1997-01-08 Sun Microsystems, Inc. Method and apparatus for dynamically calculating degrees of fullness of a synchronous fifo
FR2769387A1 (en) * 1997-10-07 1999-04-09 Telecommunications Sa Management of a variable memory buffer for computer communications
US6138189A (en) * 1996-02-08 2000-10-24 Advanced Micro Devices, Inc. Network interface having adaptive transmit start point for each packet to avoid transmit underflow

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0551191B1 (en) * 1992-01-09 2000-04-12 Cabletron Systems, Inc. Apparatus and method for transferring data to and from host system
US5434892A (en) * 1994-09-16 1995-07-18 Intel Corporation Throttling circuit for a data transfer system
US6092071A (en) * 1997-11-04 2000-07-18 International Business Machines Corporation Dedicated input/output processor method and apparatus for access and storage of compressed data

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0041429A1 (en) * 1980-05-19 1981-12-09 ETAT FRANCAIS repr. par le Secrétaire d'Etat aux Postes & Télécommunications (Centre National d'Etudes des Télécommunications) Process and device for the synchronization of digital signals
FR2594277A1 (en) * 1986-02-13 1987-08-14 Houdoin Thierry Device for synchronising packets by dual phase-lock loop
WO1992015055A1 (en) * 1991-02-18 1992-09-03 Siemens Aktiengesellschaft Circuit for connecting a microprocessor system with a communications channel
US5469449A (en) * 1993-10-28 1995-11-21 Daewoo Electronics Co., Ltd. FIFO buffer system having an error detection and resetting unit
EP0752642A1 (en) * 1995-07-07 1997-01-08 Sun Microsystems, Inc. Method and apparatus for dynamically calculating degrees of fullness of a synchronous fifo
US6138189A (en) * 1996-02-08 2000-10-24 Advanced Micro Devices, Inc. Network interface having adaptive transmit start point for each packet to avoid transmit underflow
FR2769387A1 (en) * 1997-10-07 1999-04-09 Telecommunications Sa Management of a variable memory buffer for computer communications

Also Published As

Publication number Publication date
FR2820845B1 (en) 2003-05-16
GB2375196A (en) 2002-11-06
GB0202519D0 (en) 2002-03-20
FR2820845A1 (en) 2002-08-16

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20170204