GB2360870A

GB2360870A - Driver circuit for organic electroluminescent device

Info

Publication number: GB2360870A
Application number: GB0007879A
Authority: GB
Inventors: Simon Tam
Original assignee: Seiko Epson Corp
Current assignee: Seiko Epson Corp
Priority date: 2000-03-31
Filing date: 2000-03-31
Publication date: 2001-10-03
Also published as: GB2364593A; GB0016816D0; GB0016815D0; KR20020032571A; KR100493555B1; WO2001075853A1; GB0007879D0; GB2364592A

Abstract

A compensated pixel driver circuit for an organic electroluminescent device, wherein the circuit comprises a unity gain buffer which is preferably implemented as an operational amplifier. The circuit provides a unity gain sample and hold function, thereby compensating the current supply to the electroluminescent element by providing a self adjusting load.

Description

2360870 Organic ElectroLuminescent Device Compensated Pixel Driver Circuit

The present invention relates to an organic electroluminescent device and particularly to a compensated pixel driver circuit thereof An organic electro-luminescent device (OELD) consists of a light emitting polymer (LEP) layer sandwiched between an anode layer and a cathode layer. Electrically, this device operates like a diode. Optically, it emits light when forward biased and the intensity of the emission increases with the forward bias current. It is possible to construct a display panel with a matrix of OELDs fabricated on a transparent substrate and with one of the electrode layers being transparent. One can also integrate the driving circuit on the same panel by using low temperature polysilicon thin film transistor (TFT) technology.

In a basic analog driving scheme for an active matrix OELD display, a minimum of two transistors are required per pixel (Figure I): TI is for addressing the pixel and T2 is for converting the data voltage signal into current which drives the OELD at a designated brightness. The data signal is stored by the storage capacitor Cstorage when the pixel is not addressed. Although p-channel TFTs are shown in the figures, the same principle can also be applied for a circuit with n-channel TVTs.

There are problems associated wikh TFT analog circuits and OELDs do not act like perfect diodes. The LEP material does, however, have relatively uniform characteristics. Due to the nature of the TFT fabrication technique, spatial variation of the TFT characteristics exists over the entire panel. One of the most important considerations in a TFT analog circuit is the variation of threshold voltage, AVT, from device to device. The effect of such variation in an OELD display, exacerbated by the non perfect diode behaviour, is the non-uniform pixel 2 brightness over the display panel, which seriously affects the image quality. Therefore, a built-in compensation circuit is required.

A simple threshold voltage variation compensation, current driven, circuit has been proposed. The current driven circuit, also known as the current programmed threshold voltage compensation circuit is illustrated in figure 2A. In this circuit, T I is for addressing the pixel. T2 operates as an analog current control to provide the driving current. T3 connects between the drain and gate of T2 and toggles T2 to be either a diode or in saturation. T4 acts as a switch. Either Tl or T4 can be ON at any one time. Initially, Tl and T3 are OFF, and T4 is ON. When T4 is OFF, T I and T3 are ON, and a current of known value is allowed to flow into the OELD, through T2. This is the programming stage because the threshold voltage of T2 is measured with T2 operating as a diode (with T3 turned ON) while the programming current is allowed to flow through T1, through T2 and into the OELD. T3 shorts the drain and gate of T2 and turns T2 in to a diode. The detected threshold voltage of T2 is stored by the capacitor C I connected between the gate and source terminals of T2 when T3 and T l are switched OFF. Then T4 is turned ON, the current is now provided by VDD. If the slope of the output characteristics were flat, the reproduced current would be the same as the programmed current for any threshold voltage of T2 detected. By'turning ON T4, the drain-source voltage of T2 is pulled up, so a flat output characteristic will keep the reproduced current the same as the programmed current. Note that AVT2 shown in figure 2A is imaginary, not real.

A constant current is provided, in theory, during the active programming stage, which is t3 to 4 in the tinfing diagram shown in figure 2A. The reproduction stage starts at t6 and ends at t 1 of the next cycle.

3 In practice, there is always a slope in the output characteristics, so the reproduced current is not the same as the programmed current. This issue limits the device channel length of the polysilicon Ms because of the increase of the short channel effect in polysilicon Ms when the device channel length gets smaller. Simulations show that the variation between the reproduced current and programmed current is unacceptable for L = 4gm and below. This limitation on the design of transistor T2 is a very serious practical problem, especially when small data currents are used. It is therefore important to find a technique that will provide good compensation in short channel devices.

The driving waveforms used are shown in timing chart fashion in figure 2B. The threshold voltage VT shown at the bottom of figure 2B is that for transistor T2. As can be seen from figure 2B, this threshold voltage has a range of -W to +M Such a range is much larger than the variation AVT across a practical OELD matrix.

Typical variation between the reproduced current and programmed current supplied to the OELD is illustrated in figure 2C. Figure 2C illustrates three cycles of OELD current supply: one from 0 to 30gs, one from 30gs to 60gs, and one from 60gs to 90gs. The first half of each of these cycles is the programming stage and the second half of the cycle is the reproduction stage. It is to be noted that the current output levels in the reproduction stage compared with those in the corresponding program stage are remarkably different from each other.

According to a first aspect of the present invention there is provided a compensated pixel driver circuit for an organic electroluminescent device, wherein the circuit comprises a unity gain buffer. Preferably the unity gain buffer is implemented as an operational amplifier.

According to a second aspect of the present invention there is provided a method of compensating the current supply to an organic electroluminescent pixel. comprising the step of using a unity gain buffer to provide a self adjusting load.

4 According to a third aspect of the present invention there is provided an organic electroluminescent display device comprising one or more compensated pixel driver circuits according to the first aspect of the invention.

Embodiments of the present invention will now be described by way of example only and with reference to the accompanying drawings, in which:Figure 1 shows a conventional OELD pixel driver circuit using two transistors, Figure 2 shows a current programmed OELD driver with threshold voltage compensation, Figure 3 shows a compensated pixel driver circuit according to an embodiment of the present invention, Figure 4 is a table of requirements for one specific example of an operational amplifier which can be used in the circuit of figure 3, Figure 5 is an example of a circuit for implementing the operational amplifier shown in figure 3, Figure 6 is a graph illustrating the unity-gain buffer characteristics of the compensating circuit of figure3, Figure 7 is a graph illustrating the total required supply current, Figure 8 is a driving waveform timing diagram, and Figure 9 illustrates the current output to the OELD using the circuit of figure 3.

A compensated pixel driver circuit according to an embodiment of the present invention is. shown in figure 3. Compared with the circuit of figure 2, there is added an operational amplifier OpAmp A, a capacitor C2 and a transistor T5. As shown in figure 3, Vout of the OpAmp is connected to the inverting input V- thereof. The OpAmp thus has unity gain. Capacitor C2 ensures a sample and hold function and transistor T5 acts as a control switch to store the voltage on C2. In effect the circuit provides a self-adjusted load or voltage source (VDD) and by thus holding the operative voltage constant the effect of the slope in the output characteristics can be avoided. In it's generic form, the OpAmp A is a unity gain buffer having it's input connected to the source---drain path of transistor T5 and it's output connected to the source---drain path of transistor T4, the input being connected to ground via capacitor C2.

As shown in figure 3, a TFT operational amplifier configured as a sample and hold circuit is used to provide a variable VDD SO that the drainsource voltage of T2 in the reproduction stage is the same as that during the programming stage. During the programming stage, the voltage at the source of T2 is passed to the storage capacitor C2 at the input of the unity-gain OpAmp. The output of the OpAmp faithfully reproduces the voltage and also provides the current to the OELD through T2. The driving waveform is the same as that for the circuit of figure 2.

The program current path is from VDD2 through node V4, T I, T2 and the OELD. The reproduction current path isfrom VDD1, through the OpAmp, Vout, T4, node V4, T2 and the OELD.

In the circuit of figure 3, the voltage at point V4 is substantially the same in the reproduction cycle to the voltage at that point in the programming cycle. Additionally, a very high Open-Loop Gain (OLG) is not required in contrast to usual TFT circuits. An advantage of the embodiment of the present invention shown in figure 3 is that the current flow to the OELD during the reproduction cycle is less sensitive to the variation in the output Vout of the OpAmp than AVT2 detection of the same percentage error. Furthermore, the OpAmp design constraints are not stringent.

Figure 5 is a circuit diagram of one arrangement for implementing the OpAmp shown in figure 3. The specific requirements for this circuit are shown in the table of figure 4. Of particular note is the minimal off-set voltage. Typically this might be a few millivolts, in contrast 6 to the variation of several volts which may typically arise in the conventional arrangement due to the slope of the output characteristics. The circuit of figure 5 essentially consists of a differential pair circuit and a driver. The differential pair circuit comprises the top two transistors connected to the VDD1 rail, the respective transistors having their gates providing the two input terminals of the OpAmp, and the transistor whose gate receives Vbias I. The output driver comprises a transistor receiving Vbias2 at its gate and a transistor connected between the VDD l rail and Vout.

All of the transistors of the circuit of figure 5 are Ms having a channel length of 1 Ogm (in contrast to T2). This channel length avoids the devices being stressed by the high value of VDD. The transistor connected between the VDD 1 rail and Vout has a channel width of 1 0Ogm in order to ensure sufficient current output. The area required to implement the circuit of figure 5 can be reduced by varying the W/L absolute size ratio of the transistors, subject to a corresponding reduction in the maximum drive current. The space occupation value of 270gm x 70gm given in the table of figure 4 can, for example, be reduced to approximately 130gm x 1Ogm, subject to a reduction in the maximum drive current from 5gA to 1. 5gA. However, in practice a maximum drive current of l gA might suffice (as indicated in figure 4).

In the-specific example given, the current IDp flowing through the differential pair circuit has a maximum value of 1 gA and the current IOB flowing through the driver circuit has a maximum value of 5gA. The additional current required by the presence of the OpAmp is thus minimal.

Figure 6 is a graph illustrating the unity-gain buffer characteristics of the compensating circuit of figure 3. As shown, the plot of Vout against V+ is the same for both the load and the 7 no-load conditions. The load condition is 5MO, which corresponds to a current of 1 gA through the OELD.

The total current supply required by the OpAmp of figure 3, in one specific example, is shown in figure 7. The total current supply required is that required by the differential pair circuit (figure 5), that required by the OpAmp driver circuit (figure 5) and that required to drive the OELD. Again load (5MQ) and no-load conditions are shown.

The driving waveforms used with one implementation of the circuit of figure 3 are shown in timing chart fashion in figure 8. Of course, the threshold voltage VT shown at the bottom of figure 8 is that for transistor T2. As can be seen from figure 8, this threshold voltage has a range of -1V to +IV. Such a range is much larger than the variation AVT across a practical OELD matrix. Threshold variation AVT in other transistors (T I, T3, T4, T5) have little effect as they are used as switches and operate under voltage ranges greater than AVT.

The output current supplied to the OELD using the circuit of figure 3 is illustrated in figure 9. Figure 9 illustrates three cycles of OELD current supply: one from 0 to 30gs, one from 30gs to 60gs, and one from 60gs to 90gs. The first half of each of these cycles is, of course, the progranuning stage and the second half of the cycle is the reproduction stage. In each cycle, five different program currents are illustrated (ie vertically - at 0.2, 0.4, 0.6, 0.8 and 1.0). It is to be noted that the current output levels in the reproduction stage compared with those in the corresponding program stage are remarkably close. The comparison is slightly less good for larger program currents, but is still relatively small. Moreover, the difference can be predicted (as shown in figure 9) and can therefore be included in a gamma compensation (eg use 1. 1 gA instead of 1 [tA in the programming stage).

8 It will be apparent to persons skilled in the art that variations and modifications can be made to the arrangements described with respect to figure 3 to 9 without departing from the scope of the invention.

Claims

9 CLAIMS

1. A compensated pixel driver circuit for an organic electroluminescent device, wherein the circuit comprises a unity gain buffer.

2. A compensated pixel. driver circuit as claimed in claim 1, wherein the unity gain buffer is implemented as an operational amplifier.

3. A compensated pixel driver circuit as claimed in claim 1 or claim 2, wherein the buffer is connected to have unity gain.

4. A compensated pixel driver circuit as claimed in claim 2, wherein the circuit comprises a transistor connected so as to act as a current switch for storing voltage on the said capacitor.

5. A compensated pixel driver circuit as claimed in any preceding claim, wherein the buffer comprises a differential pair circuit and a driver circuit.

6. A compensated pixel driver circuit as claimed in claim 5, wherein the differential pair circuit comprises two transistors whose gates respectively provide an inverting input and a non-inverting input of the buffer and a further transistor whose gate provides a bias voltage input of the buffer.

7. A compensated pixel driver circuit as claimed in claim 5 or claim 6, wherein the driver circuit comprises two transistors connected in series with the output of the buffer being taken from the said connection between these transistors.

8. A compensated pixel driver circuit as claimed in any preceding claim, wherein the circuit is implemented with polysilicon thin film transistors.

9. A method of compensating the current supply to an organic electroluminescent pixel comprising the step of using an buffer to provide a self adjusting load.

10. An organic electroluminescent display device comprising one or more compensated pixel driver circuits as claimed in any of claims 1 to 8.