GB2360410A

GB2360410A - An amplifier in which the input signal is delayed to allow time for the power supply to adjust to a level which minimises power loss

Info

Publication number: GB2360410A
Application number: GB0006485A
Authority: GB
Inventors: Duncan Grant
Original assignee: University of Bristol
Current assignee: University of Bristol
Priority date: 2000-03-18
Filing date: 2000-03-18
Publication date: 2001-09-19
Also published as: GB0006485D0

Abstract

An amplifier in which a linear amplifier output stage 14 is supplied with a variable voltage from a switched-mode power supply 19 to minimise power loss in the output stage. The input signal is sampled and digitally delayed 8 before being input to the output stage in order to allow the low-bandwidth switched-mode power supply time to provide the appropriate supply voltage to the amplifier output stage compatible with acceptable distortion and minimum power dissipation in the amplifier.

Description

2360410 AN AMPLIFIER

The present invention relates to an amplifier which can amplify efficiently over a wide range of signal amplitude. This amplifier will find application in the field of audio signal amplification, and is described largely in this context but it should be understood that the invention is applicable to the amplification of signals of any frequency.

The well known class-A, class-AB and class-B amplifier circuits all suffer from varying degrees of inefficiency resulting from the fact that the transistors in these amplifiers work in the linear regime. The need to bias the transistors with a certain level of continuous current in each case also leads to inefficiency. A class of amplifier which is theoretically more efficient is the well known class-D amplifier in which the output is switched between two voltage levels using Pulse Width Modulation (PWM) and then filtered. A difficulty in this approach is that the filter has to be designed to let through the audio signal (or input signal of any frequency range) with little attenuation while attenuating unwanted components of the PWM waveform such as the carrier switching frequency and its sidebands and multiples of the carrier frequency and their sidebands. This usually means that the carrier switching frequency has to be higher than that strictly needed for faithful audio reproduction. A large separation is required between wanted and unwanted frequency components in order to ensure that the audio signal is not degraded by the filter. This problem can be particularly acute in an application which is sensitive to electrical noise. For example in a broadcast receiver the audio output has to be filtered in a manner which gives very heavy attenuation of any frequency which could interfere with radio reception while having minimal effect on the audio signal. Class-A, class-AB and class-B amplifiers have a high bandwidth and do not generate significant electrical interference.

One method of combining switched mode efficiency with the bandwidth of a class-A, classAB or class-B amplifier is to modulate the supply voltage to so that the amplifier is supplied with just enough voltage to permit it to produce the output voltage which the input signal dictates at any given time. Unnecessary dissipation in the transistors of the amplifier is thereby eliminated. The audio signal envelope is used to control the power supply output 2 voltage while the audio signal is input to the amplifier for amplification in the normal manner.

There is. a major difficulty with this approach. The power supply bandwidth has to be as high, if not higher, than the bandwidth of the audio signal so that the power supply voltage can be raised quickly enough when the audio signal changes very rapidly from a small value to a large value as can be the case with some components of speech and music. The problem of filtering the power supply output therefore becomes similar to that of filtering a class-D audio amplifier output.

The invention overcomes this problem. In the invention, the power supply bandwidth is less than that which would be needed to follow the most rapid changes of the audio signal amplitude and the amplifier design can thus include a high level of output filtering to avoid the introduction of electromagnetic interference into the equipment supplied. The audio amplifier stage is supplied with a delayed version of the audio signal so that the slowness in the rate of rise of power supply output voltage resulting from its limited bandwidth is compensated for by the delay in the audio signal. Furthermore, the signal controlling the power supply, which is derived from a measurement of the audio input amplitude envelope, may itself be delayed and manipulated and its delivery timed so that the voltage delivered by the power supply is always just sufficient to permit faithful amplification of the audio signal at any given time. When a fast rise in audio signal reaches the amplifier input, the power supply voltage of the amplifier will have already been raised in readiness.

The process of delaying the audio signal and extracting the audio signal envelope from the audio signal is carried out using a microprocessor or microcontroller integrated circuit or Digital Signal Processing (DSP) integrated circuit. While any of these types of integrated circuit may be used, it is hereinafter referred to as a DSP integrated circuit because the principle characteristic of the integrated circuit is that the signals (audio signal and amplitude signal) are processed digitally. However, integrated circuits commonly referred to as microcontrollers and microprocessors will be suitable for use in this invention, as well as more powerful, multi-bus integrated circuits commonly called digital signal processors. The analogue audio signal is sampled, usually at regular intervals at a sufficient sampling rate to permit all audiofrequency detail to be preserved. Thus a digital representation of the 3 audio signal is created within the DSP i/c. This signal is then processed digitally to provide two digital signals corresponding to the delayed audio signal and the envelope of this delayed audio signal. The audio signal is reconverted to an analogue signal using a d/a (digital-toanalogue) conversion process either using a d/a converter within the DSP integrated circuit or an exterrial d/a converter. The envelope amplitude signal may either be sent to the power supply in digital form, directly controlling the switching of the transistor in the switched-mode power supply, or it may be converted into an analogue signal using a digital to analogue conversion process, with the resulting analogue signal being used to control the switching of the switched-mode variable voltage power supply via the power supply's own PWM process.

In the invention, the audio signal is sampled by an a/d converter. Sampling of the audio signal will normally take place at fixed intervals. This sampled signal is then processed in two ways by the DSP programme.

Firstly the amplitude envelope is extracted from the signal. This envelope extraction process provides a signal which is the basis for the process by which the power supply control signal is generated. The control algorithm contains information about the bandwidth and response time of the controllable power supply so that the output voltage required from the power supply at any given time may be calculated and a voltage demand signal sent to the power supply at the appropriate time so that it is producing the required voltage at every instant in time. The command signal to the power supply is sent in analogue form, being derived from an on-board d/a converter. Alternatively the signal can be sent in digital form to an external d/a converter. As a further alternative, the signal may be sent from the DSP i/c as a single logic signal or set of logic signals which control the switching of the switched mode power supply transistor or transistors in the manner previously described. In this case the DSP programme will have calculated from a knowledge of the power supply output voltage requirements the duty cycle with which the transistor(s) of the power supply must be switched. If closed loop control of the power supply voltage is required, the power supply output voltage will be fed back into the DSP i/c via an ald converter.

Secondly, the audio samples are stored for later outputting to the audio amplifier. By this means the delay is introduced into the audio signal path. Typically the delay will be 4 introduced by use of on-board or external RAM (Random Access Memory). Samples of the signal are stored in RAM sequentially and retrieved in the same sequence a predetermined time later for outputting to the audio amplifier via the d/a converter.

The DSP programme is capable of applying volume control to the audio signal and in this case the DSP i/c may take in digital form, or pulse form, or analogue form (via an a/d converter) a signal which inforins the DSP programme of the required volume. The DSP i/c may be programmed to routinely interrogate key pads, switches or some similar external control device, or to respond to interrupt requests from such input devices, so as to receive instructions from the user about various control functions which the user may wish to communicate to the DSP programme. Similarly information may be taken in from external signals to control the tone of the audio signal and other instructions relating to the quality and characteristics of the audio signal.

The DSP programme may contain algorithms which process the audio signal in a way which ensures minimum power consumption in audio amplifier circuits. Some aspect of the signal which result in high power demand in the audio amplifier may be altered. For instance large low frequency voltage swings may be attenuated. High amplitude peaks may be removed. This will need to be accomplished in a way which does not cause offence to the listener. The DSP may be configured to accept commands which control the trade-off between minimisation of power consumption and causing a change in the signal which is unacceptable to the listener. The DSP programme delays the audio signal sufficient time to permit the power supply voltage to be adjusted so that when the audio signal is output to the amplifier circuit, the power supply voltage is of an appropriate level to provide the desired audio output but at the same time is no greater than the minimum value of voltage required to do this without noticeable distortion.

Where the audio amplifier forms part of a more extensive electronic circuit - for instance a radio broadcast receiver - the DSP i/c may perform management and signal processing functions beyond those required for the audio amplification process. For example, in an analogue signal broadcast receiver, the DSP may implement AGC (Automatic Gain Control) and AFC (Automatic Frequency Control) and may operate on the IF signal (Intermediate Frequency) signal in superhetrodyne receivers to perform the audio detection function. In digital signal radio receivers, the DSP i/e can perform some aspects of the detection function and the decoding function. The DSP may also perform such functions as digital tuning. In general, it will be understood that in any given apparatus in which the DSP is incorporated there will be many tasks which the DSP ilc can perform while it is carrying out the function of audio amplification as set out in the manner of this present invention. Similarly it will be understood that the invention can be incorporated in a DSP ilc whose main function is to implement tasks other than audio amplification and implementation of the present invention.

The present invention will further be described, by way of example, with reference to the accompanying drawings, in which:

Figure 1 is a drawing of the audio signal and signal amplitude envelope waveforms.

Figure 2 is a schematic diagram of the signal processing system with analogue control of the power supply Figure 3 is a schematic diagram of the signal processing system with digital control of the power supply Figure 4 is a schematic diagram of the signal processing system with closed loop control of the power supply voltage.

The operation of the signal processing and amplifier circuits and the operation of the system are described hereinafter.

Figure I a shows the audio input signal, 1, with the typical rapid variations characteristic of some types of speech and music. Figure lb shows the audio signal with its mirror image, 2. (about the zero volts line) added. The dotted line, 3, is the envelope amplitude of the signal (whether the signal is positive or negative with respect to the zero volts line). The waveform 3 is made slightly larger than the peak value of the signal at any given time to permit the amplifier to operate with a slightly larger power supply than is strictly needed in order to give the amplifier a small amount of headroom to ensure the amplifier never clips. Figure l c shows the delayed (and possibly modified) amplitude waveform, 4, which controls the 6 amplifier power supply voltage, and the delayed audio signal 5 which is fed to the audio amplifier circuit.

Figure 2 illustrates the mode of operation of the invention. The audio signal 6 is sampled by the analogue-to-digital converter 7 (which ma, be part of the DSP i/c). The sampled signal 71 is supplied to the digital processing arrangement, 8, (which is be part of the DSP i/c) which creates from it the delayed audio signal, 9, and the delayed power supply control signal, 10. Both signals 9 and 10 are digital signals at this stage. It will be understood that the digital signals 71, 9 and 10 may each consist of a stream of digital numbers which are stored and manipulated within the DSP i/c. The introduction of any required delay in these signals will normally be accomplished in the digital processing arrangement by storing their digital values in the RAM (Random Access Memory) 11 within the DSP i/c, or in external RAM. Delay may be obtained by storing samples of the waveform and retrieving them after the prescribed delay time. Whereas the process relating to the audio signal is basically one of delaying the signal, the amplitude envelope signal may be sent out altered to take account of bandwidth limitations in the power supply. It is the task of the digital signal processing arrangement to ensure that the envelope amplitude information sent to the power supply causes the power supply always to deliver just enough voltage to permit the amplifier stage to produce the required output. This could require the digital processing arrangement to produce an amplitude envelope output signal which differs from the envelope amplitude of the input audio signal. While the audio signal is basically output delayed but unchanged, it will be appreciated that the possibility exists to apply well known digital audio-signal processing techniques to the audio signal in order to, for example, filter out noise, emphasise or de- emphasise certain frequency ranges, or otherwise improve the audio quality of the signal. The digital audio signal 9 is converted to an analogue audio signal 12 by the d/a converter 13 which may be contained within the DSP i/c or may be external to it. The analogue audio signal 12 is delivered to the audio amplifier 14 for amplification. The output 15, of this amplifier, drives the loudspeaker 16. The digital envelope amplitude signal 10 is converted to an analogue envelope amplitude signal 17 by the d/a converter 18, which may be within the DSP i/c or may be external to it. The analogue envelope signal is delivered to the variable output voltage power supply 19 and used to control the output voltage of the power supply. The output of the power supply 20 supplies the audio amplifier 14. The parts of this circuit which are incorporated within the DSP i/c are the digital processing circuit, 8

7 and the RAM, 11 (although the RAM may alternatively be external to the DSP i/c); the a/d converter 7, the d/a converter 13, and the d/a converter 18, may be incorporated in the DSP i/c or may be external to it.

Figure 3 illustrates a first alternative arrangement in which the envelope amplitude information is not delivered as an analogue signal to the power supply 19 but is delivered in digital form without any d/a conversion of this signal taking place. The digital signal processing arrangement, 7, generates a digital switching signal 21 which may be used to control directly the switching of the transistor or transistors in the switched-mode power supply 19 so that at any given time the transistor or transistors are switched with a duty cycle which causes the power supply to produce the required output voltage at the required time. If more than one transistor is controlled, the signal 21 will consist of the required number of signals in parallel.

Figure 4 illustrates a second alternative arrangement in which the switching of the transistor or transistors in the power supply are controlled directly by a digital signal in the manner described above, but in addition an ald converter 22 is provided (either within the DSP i/c or external to it) which permits the signal processing arrangement 8 to have knowledge of the actual output voltage of the variable voltage power supply at any time. The digital processing arrangement 8 may therefore implement closed-loop control of the power supply output voltage. Feedback in the manner described and illustrated in Figure 4 may also be applied to the circuit shown in Figure 3 in which the power supply 19 is controlled by an analogue signal 8

Claims

1. An amplifier in which the amplifier output stage employs transistors operating in the linear regime as exemplified by the well known class-A or class-AB or class-B iype amplifier circuits and in which this amplifier output stage is supplied from a variable output voltage switched-mode power supply and in which the output voltage of the power supply is controlled in such a manner as to provide the amplifier output stage with just sufficient voltage to enable it to amplify the input signal without serious distortion and in which the signal used to control the output voltage of the power supply is derived from a measurement of the amplitude envelope of the original input signal and in which the signal applied to the amplifier output stage is a delayed version of the original input signal.

2. An amplifier as described in claim 1 in which the signal used to control the output voltage of the power supply is delayed after it has been derived from the amplitude envelope of the original input signal by an amount of time not necessarily equal to the amount of time by which the signal is delayed.

3. An amplifier as described in claim 2 in which the shape of the signal derived from the amplitude envelope of the original signal is modified before or after delay and before it is used to control the power supply output voltage so that the difference between the power supply output voltage and the minimum voltage required by the amplifier output stage for normal operation at any given time is minimised.

4. An amplifier as described in claim 3 in which the original input signal is sampled and converted to a digital signal and in which delay of the signal is accomplished by storing these samples in digital memory before outputting these samples sequentially after holding them in memory for a predetermined period of time and in which a digital-to-analogue converter is used to convert these digital values to an audio analogue signal which forms the input to the amplifier output stage.

9

5. An amplifier as described in claim 4 in which the value of the required power supply output voltage at any given time is computed from the samples taken of the original input signal and in which a variable amount of delay may be included by storing values in digital memory and in which the stream of calculated values of the required power supply output voltage is converted to an analogue signal by means of a digitalto-analogue converter and in which this analogue signal is used to control the output of the power supply.

6. An amplifier as described in claim 5 in which the stream of calculated values of the required power supply output voltage are used as the basis for a further calculation and timing process which delivers a number of digital signals to the transistor or transistors in the power supply causing them to switch in a manner which causes the power supply to deliver the required output voltage.

7. An amplifier as described in claim 5 or in claim 6 in which the output voltage of the power supply is fed back into the digital control system via an analogue- to-digital converter so that the control of the power supply output voltage becomes closedloop.