GB2305299A

GB2305299A - Printed circuit board production process

Info

Publication number: GB2305299A
Application number: GB9518812A
Authority: GB
Inventors: Declan Clear; Michael Clear
Original assignee: IRISH CIRCUITS Ltd
Current assignee: IRISH CIRCUITS Ltd
Priority date: 1995-09-12
Filing date: 1995-09-14
Publication date: 1997-04-02
Also published as: GB9518812D0; GB2305299A9; IES950715A2; IES66412B2; GB2305299A8

Abstract

A process for producing a printed circuit board having at least two interconnected conducting layers has a chemical plating station (3) to provide a chemically plated electrical connection layer between the conducting layers and an electrical plating station (7) to cover the conducting layers with a conductive material and to apply an electrically plated conductive layer to the chemically plated electrical connection layer. The circuit board is passed between a number of chemical jet sprays in a workstation (11) where deoxidising chemical spray is sprayed on conducting surfaces to remove oxidised metal and deoxidised metal is activated before being immersed in a bath of hot solder.

Description

"A printed circuit board production process" The present invention relates to a printed circuit board production process and more particularly to a process for producing a circuit board having at least two interconnected conducting layers.

A variety of printed circuit board production processes are known for producing circuit boards for use in electronic and electrical applications. Examples of printed circuit board production processes are shown in European Patent Application No. EP 0 550 176 Al and EP 0 562 187 Al which describe methods of chemically treating a 'circuit board to provide an interconnection between the conducting layers. Processes of this type allow for the large scale production of high quality circuit boards, however, production costs for smaller scale production runs are prohibitive because of the complexity of the chemicals used. Additionally, the toxicity of the chemicals used makes handling difficult.

It is also known to use direct plating techniques to electrically deposit a conductive species on hole walls.

The interconnection between conducting layers produced by direct plating is inherently less conductive and as the deposit is very thin the resulting circuit board is therefore less robust.

It is an object of the invention to provide a process for producing a high quality printed circuit board in an efficient manner while minimising production costs.

Accordingly there is provided a printed circuit board production process for producing a circuit board having at least two interconnected conducting layers comprising the steps of: chemically plating a circuit board with a conducting material to provide a chemically plated electrical connection layer between the conducting layers; applying a printed circuit board design to each conducting layer; electrically plating the circuit board to cover the conducting layers with a conductive material and to apply an electrically plated conductive layer to the chemically plated electrical connection layer; and etching the circuit board to remove excess conducting material from each layer.

This provides a printed circuit board production process with significantly reduced production costs by efficiently using both chemical and electrical plating techniques. The more expensive chemical plating technique is used only to provide a chemically plated electrical connection layer between the conducting layers. The chemically plated electrical connection layer is built up by applying a conductive layer using the cheaper electrical plating process. The conductive layer is applied to the chemically plated electrical connection layer and the conducting layers to allow the circuit board and design to withstand etching.

Preferably the chemically plated electrical connection layer applied in the chemically plating step is less than ten microns.

Ideally the chemically plated electrical connection layer applied in the chemically plating step is less than five microns. In this way the use of the more expensive chemical plating technique is kept to a minimum while still depositing sufficient conducting material to produce a robust circuit board which will allow accurate electrical plating of the circuit board to be carried out.

Preferably the electrically plated conductive layer applied in the electrical plating step is greater than two microns built on the conducting layers and on the chemically plated electrical connection layer.

Ideally the electrically plated conductive layer applied in the electrical plating step is greater than five microns built on the conducting layers and on the chemically plated electrical connection layer. Thus, the bulk of the conducting material required, namely on the conducting tracks and contact pads of the circuit board, is deposited using an electrical plating technique. This reduces the overall cost of the circuit board by plating the circuit board with sufficient conductive material to withstand the etching process using electrical plating rather than more expensive chemical plating techniques.

In a preferred embodiment arrangement the production process includes the sequential steps of: passing the circuit board through a deoxidising chemical spray to treat an exposed contact pad on the etched circuit board; immersing the treated contact pads in a hot solder bath; removing excess solder from the circuit board using a plurality of high velocity air jets; and cleaning the circuit board using a plurality of steam jets.

Ideally the deoxidising chemical spray is provided by a peroxide, sulphuric acid and water solution. In this way the contact pads of the circuit board are evenly coated with copper. The pads are consistent across their surface and are not prone to sugaring thereby ensuring their suitability for surface mount technology applications. Advantageously as the pads are flatter and more even, a very small percentage are rejected due to the quality of the contact pads further reducing production costs arising from reworks.

In one arrangement the production process includes the further steps of: receiving a printed circuit board design; checking the received printed circuit board design; generating a circuit board plot of the checked printed circuit board design for applying a printed circuit board design to each conducting layer; generating a circuit board drilling list for the checked printed circuit board design; preparing a circuit board for receiving the printed circuit board design; selectively drilling the circuit board in response to the generated circuit board drilling list to deliver a drilled circuit board; laminating the drilled circuit board with an etch resistant electroplating film; developing the circuit board design applied to each conducting layer to reveal a plurality of conducting tracks corresponding with the checked printed circuit board design;; adding a tin and lead metal layer to an electrically plated circuit board; and stripping away the etch resistant electroplating film from the circuit board.

Ideally the step of chemically plating the circuit board includes the sequential steps of: immersing the circuit board in a solvent; rinsing the circuit board in hot water and rinsing the circuit board in cold water; dipping the circuit board in a desmearing agent and rinsing the circuit board; lowering the circuit board into a bath of neutraliser and rinsing the circuit board in cold water; dipping the circuit board in a conditioning agent and rinsing the circuit board; performing a microetch on the circuit board and rinsing the circuit board; immersing the circuit board in a catalyst bath before rinsing the circuit board; rinsing the circuit board before lowering the circuit board into a chemical copper bath; and rinsing the circuit board.

This allows the efficient deposition of a thin even layer of conducting material between conducting layers using a minimum number of relatively non-toxic chemicals.

Ideally the step of electrically plating the circuit board includes the sequential steps of: soaking the circuit board in a hot cleaning agent and rinsing the circuit board; performing a microetch on the circuit board and rinsing the circuit board; dipping the circuit board in an acid bath; plating the circuit board in an electrical copper bath; and rinsing the circuit board.

Thus, the conducting material required on the conducting layers for the tracks is deposited using a relatively cheap deposition process.

In one arrangement the process includes the steps of: heating the circuit board to melt the tin and lead metal layer to form solder; applying a solder mask to a substantial portion of the conductive tracks leaving a plurality of exposed contact pads; applying a component layer using a silk screen print overlay; routing the circuit board design from the circuit board; and testing the circuit board design for correct functionality.

Thus, a variety of finished circuit boards may be produced on a single production line for example reflow circuit boards, solder coated circuit boards and multilayer circuit boards may be produced in parallel.

Preferably the process further including the steps of: stripping the tin and lead layer to leave exposed conducting tracks; covering a substantial portion of the exposed conducting tracks to leave a plurality of exposed contact pads; applying a component layer using a silk screen print overlay; routing the circuit board design from the circuit board; testing the circuit board design for correct functionality; and delivering a final circuit board.

In one embodiment the step of preparing the circuit board for receiving the printed circuit board design includes the steps of: applying a layer pattern to at least two circuit board layers; developing the circuit board design applied to each conducting layer; applying a layer alignment mask to each circuit board layer; etching each circuit board layer; striping a laminate layer from each circuit board layer; and aging each circuit board layer to provide a contact key.

Thus, each layer of a multilayer circuit board may be produced using the electrical / chemical plating process to further reduce cost and the application of a contact key ensures that the circuit boards bond efficiently reducing wastage.

Ideally the process includes the further steps of: assembling the circuit board layers by injecting a layer of non-conductive resin between adjacent layers; aligning adjacent layers by aligning the alignment mask on adjacent layers; heating and applying pressure to the assembled aligned layers; cooling the assembled aligned layers; and delivering a multi-layer circuit board.

Rework and wastage costs are significantly reduced as errors on an individual layer of the multilayer circuit board are detected before the circuit board is assembled preventing a faulty circuit board from being produced.

Ideally the step of generating a circuit board plot of the checked printed circuit board design includes the steps of: registering the circuit board design to produce at least one copy of the printed circuit board design; and adding an alignment and test mask to each printed circuit board design.

Advantageously allowing the circuit board design to be accurately positioned on the circuit board.

Preferably the alignment and test mask has a plurality of adjacent tracks and contact pads.

Ideally adjacent tracks are of different gauge corresponding with track gauges of the circuit board design. Conveniently this allows the accuracy of the developing, plating, assembly, etching and post production processing of the circuit board to be checked at all stages by simple visual inspection that the tracks are correctly positioned and not smudged or interconnecting. This further reduces the cost of the process attributable to wastage as errors are discovered early preventing circuit board with errors from continuing all the way through the process before being rejected and allowing reworks.

According to one aspect of the invention there is provided a printed circuit board whenever produced by the process as claimed in any preceding claim.

The invention will be more clearly understood from the following description thereof, given by way of example only with reference to the accompanying drawings in which: - Fig. 1 is a diagrammatic view illustrating a printed circuit board production plant for use in the process according to the invention; Fig. 2 is a diagrammatic view of a drilling workstation used in the process; Fig. 3 is a diagrammatic view of a laminating workstation used in the process; Fig. 4 is an exploded view of a laminated circuit board produced by the laminating workstation shown in Fig. 3; Fig. 5 is a perspective outline view of an electrical plating workstation used in the process; Fig. 6 is a part diagrammatic view showing circuit boards in the process of being lowered into the electrical plating workstation of Fig. 5;; Fig. 7 is a diagrammatic view of an etching workstation used in the process; Fig. 8 is a perspective view of a pre hot air levelling station used in the process; Fig. 9 is a side view of the pre hot air levelling station of Fig. 8 showing a work piece being treated; Fig. 10 is a an outline drawing of a fluxing workstation used in the process; Fig. 11 is an outline drawing of a hot air levelling workstation used in the process; Fig. 12 is a cut-away front view of the hot-air levelling workstation of Fig. 11; Fig. 13 is an outline drawing of a routing workstation used in the process; Fig. 14 is a diagrammatic view of a test workstation used in the process; Fig. 15 is a partial sectional view of Fig. 14 showing a workpiece under test; Fig. 16 is a diagrammatic view illustrating an alternative printed circuit board production plant for use in the process according to the invention;; Fig. 17 is a diagrammatic view of a bonding station used in the process; Fig. 18 is a perspective view of a multi-layer printed circuit board produced by the bonding station of Fig. 17; Fig. 18a is an enlarged detail perspective view of an alignment mask of a multi-layer printed circuit board; and Fig. 19 is a diagrammatic view of a further printed circuit board producing plant for use in the process according to the invention.

Referring to the drawings and initially to Fig. 1 there is illustrated a printed circuit board production process according to the invention.

A printed circuit board design is received from a designer at station 1. The printed circuit board design may be in any one of a number of formats, for example on acetate sheets or stored on computer disk in any suitable computer file format. The printed circuit board design is checked to ensure that conducting tracks have suitable dimensions and that adjacent tracks are not too close. A circuit board plot of the checked printed board design is then produced on an acetate sheet and a printed circuit board drilling list is produced for the checked printed circuit board design and sent to a drilling workstation 2. A printed circuit board 21 is drilled in accordance with the drilling instructions at the drilling workstation 2 and then passed to a chemical plating station 3 where the circuit board 21 is immersed in a number of chemical baths to uniformly deposit a chemically plated electrical connection layer of copper metal three microns thick on the surface wall of the drilled holes to connect conducting layers of the circuit board 21 electrically.

The circuit board 21 is then passed to a laminating workstation 4 where a layer of etch resistant film and a layer of photo-sensitive electroplating film is applied to each of the conducting layers of the circuit board 21. The laminated circuit board 21 is delivered from the laminating workstation 4 to a design application station 5 where the circuit board 21 is mounted in position and covered with the circuit board plots produced in step 1 before being exposed to ultra-violet light. The ultra violet light reacts with the photosensitive film to apply the printed circuit board design to the drilled circuit board 21, producing an exposed circuit board 21. The exposed circuit board 21 is then passed to a developing station 6 where the exposed portions of the circuit board 21 are chemically treated to fix the design in position.Photosensitive laminate applied at the laminating workstation 4 which was not exposed is removed by this process. The circuit board 21 is then delivered to an electrical plating workstation 7 where the circuit board 21 is moved between and immersed in a number of electro-chemical baths to cover the conducting layers and apply an electrically plated conductive layer to the chemically prated electrical connection layer. The electrical plating applies a layer of copper twenty five microns thick to enable the hole wall copper deposit to withstand the etching process. The conducting tracks of the printed circuit board 21 developed at the developing station 6 are then coated in a layer of metal conductor formed in this case by a tin and lead composite being sixty seven per cent tin and thirty three per cent lead.

Etch resistant laminate applied at the laminating workstation 4 is removed from the circuit board 21 and the circuit board 21 etched to remove excess conducting material from between the conductive tracks of the circuit board design.

The circuit board 21 is then delivered to a stripping station 9 where the layer of tin lead metal is removed, without lifting the conducting tracks from the circuit board 21 to leave exposed copper conforming with the printed circuit board design. The circuit board 21 is then covered in an ink solder mask at a solder mask station 10 before being delivered to a pre-hot air levelling workstation 11. The ink is applied to all areas of the circuit board 21 except to those areas of the circuit board 21 where electrical connections between the components which will be added in accordance with the printed circuit board design and the conducting layers.

At the pre-hot air levelling workstation 11 the circuit board 21 is passed between jets spraying a deoxidising chemical spray provided as a peroxide, sulphuric acid and water solution to remove oxidation from the remaining exposed contact pad portions of the printed circuit board 21 to reactivate the copper providing a much finer surface for hot air levelling. Once treated, the circuit board 21 is delivered to a fluxing workstation 12 downstream of the pre-hot air levelling workstation 11 where the circuit board 21 is passed between jets spraying a fluxing solution. The exposed portions of the circuit board 21 fluxed in this way facilitate solder application. Solder is applied to the fluxed portions of the circuit board 21 in a hot air levelling workstation 13 by immersing the circuit board 21 in a bath of hot solder.As the circuit board 21 is removed from the bath of hot solder it is sprayed with air jets to remove excess solder from the solder mask which was applied in the solder mask station 10. The circuit board 21 is also passed between steam jets to clean the circuit board 21 as it is removed for having a component layer applied using a silk screen print process at a component layer workstation 15. When the component layer has been applied to the printed circuit board 21 it is passed to a routing workstation 16 where individual circuits in accordance with the printed circuit board design are separated by a drilling process prior to delivery to a test workstation 17.

In more detail, and referring now to Fig. 2 there is shown the drilling workstation. The drilling workstation 2 has three drill heads 20 for simultaneously drilling three circuit boards 21 mounted on a movable table 22. The table 22 moves relative to the drill heads 20 to allow the drill heads 20 to select from a number of drill bits 23 of different sizes to drill the circuit board 21 with a hole at the appropriate locate in accordance with the circuit board design.

Fig. 3 shows in more detail the laminating workstation 4 where the circuit board 21 is passed between a roll of etch resistant laminate 31 and photo-sensitive laminate 32 prior to delivery to the design application station 5. The circuit board 21 is laminated along both upper and lower conducting layers (see Fig. 4).

Fig. 5 shows a perspective view of portion of the electrical plating station 7. The electrical plating station 7 is an elongate tank divided into a number of chemical baths only four of which are shown for clarity.

A number of circuit boards 21 are mounted on a movable frame jig 52 moveable between each of the chemical baths in a desired sequence along a pair of spaced-apart rails 53. The circuit boards 21 are raised and lowered by a jig arm 51 into each electro-chemical bath in turn for the appropriate time which will be described in more detail below. One bath has a number of anodes 54 mounted in it to act as a terminals for the electrical plating process with the circuits 21 acting as the opposite terminals.

Fig. 6 shows a cut-away view of the electrical plating station 7 showing the jig 52 lowered into one of the baths of solution.

Referring now to Fig. 7 the etching station 8 has an elongate body and a number of exhaust pipes 71 of which three are shown for removing fumes during the etching process from the work environment. The circuit board 21 is passed through a stripping box 72 on a roller bed 75 where etch resistant laminate is removed from the circuit board 21 before being conveyed on the roller bed 75 to a washer 73. The circuit board 21 is washed in the washer 73 before being delivered by the roller bed 75 to an etch box 74 where surplus copper is removed from the circuit board.

Fig 8 shows in more detail the pre-hot air levelling workstation 11. As copper will oxidise and become less chemically active when stored for any period of time it is advantageous to treat the exposed copper before attempting to apply solder. This provides the process with a significant advantage in that jobs for producing a number of circuit boards may be processed in batches and do not cause bottle-necks in the process due to the need to apply solder to exposed copper immediately. The solution which is sprayed onto the circuit board 21 as it passed through the pre-hot air levelling treatment station 11 is particularly effective as it not only removes oxidised copper from the circuit board 21 but also activates the copper chemically to enable the solder to be applied more easily.The pre-hot air levelling workstation 11 has an exhaust port 81 for disposing of harmful chemical fumes and a number of rollers 82 for passing the circuit board 21 between a number of chemical jet sprays 83 and through the workstation 11 to a delivery ramp 84. As the circuit board 21 passes through the workstation 11, the deoxidising chemical spray is applied to both conducting surf aces by the sprays 83. The circuit board is then passed by the rollers 82 to the delivery ramp 84 which delivers the circuit board 21 to the fluxing workstation 13.

The fluxing workstation 13 illustrated in Fig. 10 comprises a support on which is mounted a conveyor belt 90 for passing the circuit board through a flux sprayer 91 before delivery to the hot air levelling station 14.

The flux sprayer 91 has a number of oppositely directed spray jets (not shown) for spraying a fluxing solution onto both sides of the circuit board 21. The hot air levelling station 14 of Figs. 11 and 12 has a vertically movable arm 100 on which the printed circuit boards 21 are mounted. The arm 100 when engaged moves down to immerse the printed circuit boards 21 in a bath of hot solder 101 which covers the exposed copper areas fluxed in the fluxing station 13 with solder. As the circuit boards 21 are removed from the bath of hot solder 101 by upward movement of the arm 100, excess solder is removed using high pressure air jets 102 and the circuit board is cleaned using high pressure steam jets 103. The circuit board is then allowed to cool before further processing is conducted.

At the routing station 16 drill heads 120 are used to cut around edges 121 of circuits on the circuit board 21. Before delivering the circuit to the test workstation 17. The test workstation 17 has a computer screen 130 to indicate whether a unit has passed or failed the applied tests. Tests are applied electrically by mounting the circuit board 21 on a number of metal conducting pins 131 associated with the holes drilled in the circuit board 21 at the drilling workstation 2. Current is passed from the test station through the pins which extend through the holes of the circuit board 21 to a conducting layer 133 in the correct sequence to determine that all connections have been correctly made and that no excess solder or lifting of the solder from the circuit board has caused an error during the production process.

Referring now in more detail to the chemical plating station 3 Table 1 shows one sample chemical treatment process for the circuit board.

TABLE 1

Chemical Solution Time (min. secs.) Permang. desmear 6.00 - 8.00 Cold Water Rinse 2.00 - 3.00 Cold Water Rinse 1.30 - 3.00 Cold Water Rinse 1.00 - 3.00 Neutral iser 1.30 - 3.00 Cold Water Rinse 1.30 - 3.00 Cold Water Rinse 2.30 - 5.00 Conditioner 6.00 - 8.00 Water Rinse 1.30 - 3.00 Water Rinse 1.30 - 3.30 Micro Etch 1.30 - 3.00 Water Rinse 0.30 - 2.30 Water Rinse 1.00 - 2.30 Pre-dip 2.00 - 3.00 Catalyst 7.00 - 9.00 Water Rinse 2.00 - 3.00 Water Rinse 1.00 - 3.00 Water Rinse 0.30 - 2.00 Chemical Copper 25.00 - 30.00 Water Rinse 1.00 - 4.00 Water Rinse 2.00 - 5.00 Water Rinse 1.00 - 3.00 Water Rinse 3.00 - 5.00 In this way the use of the more expensive chemical plating process is minimised to deposit the minimum of copper required to provide an electrical connection between the conducting plates of the circuit board 21. Table 2 shows a sample of a suitable electrical plating process as implemented at the electrical plating station 7 is shown in Table 2 and Figs. 5 and 6.

TABLE 2

Chemical Solution Time Minute. Secs (min-max) Hot Soak Clean 3.00 - 4.00 Water Rinse 10 - 30 secs. Micro Etch 20 - 40 secs.

Water Rinse 10 - 30 secs.

Sulphuric Acid Dip 0.45 - 1.30 Copper Plating 16.00 - 18.00 Water Rinse 10 - 30 secs.

In this way, the cheaper electrical process is used to deposit the metal copper required to enable the circuit board 21 to resist the etching process and to apply the bulk of the copper required on the conductive tracks.

Thus, the overall production costs of the process are significantly reduced by combining the chemical and electrical plating steps in this way, while still producing a high quality final printed circuit board without roughness or "sugaring effect" to the final copper tracks or pads.

Referring now to Fig. 16 there is illustrated an alternative printed circuit board production plant indicated generally by the reference numeral 200 where parts similar to those described by the reference to Figs. 1 to 15 are identified by the same reference numerals generally.

In this arrangement, a multi-layer circuit board may be produced by receiving a circuit board design at the station 201 and passing each layer of the multi-layer design through the design application station 5, the developing station 6 and the aligning station 207 and the etching station 8. In the aligning station 207 an alignment mask 208 is applied to facilitate alignment of a number of layers. When all of the layers of the design have been prepared, they are aligned in the preassembly station 209 where masks 208 on each of the layers of the multi-layer circuit board are aligned and passed to a clamping step 210 where each of the layers is loaded into a press. When each of the layers has been carefully aligned and a layer of epoxy resin interposed between the layers to fix each layer relatively the multi-layer circuit board is loaded into a curing station 211.When the multi-layer circuit board has been assembled it is passed to the drilling workstation 2 as before.

In more detail and referring particularly to Fig. 17 the curing station 211 has a control section 215 for controlling operation of three pneumatic presses 216 and for controlling the pressure applied by the pneumatic presses 216 and the temperature of the multi-layer circuit boards during curing.

The multi-layer circuit board shown in Fig. 18 is passed to the drilling station where the process begins as before. The alignment mask 208 is shown in more detail in Fig. 18a. The alignment mask 208 has a pattern corresponding to contact pad sizes and conducting track gauges used in the circuit design. Thus, in addition to providing an alignment mask for each of the layers of the multi-layer circuit board, a visual check is possible to verify that the pre-curing assembly steps of the multi-layer circuit board have been accurately done.

For example, if the tracks are not clear, then the layer of the multi-layer circuit board may be rejected without the need for exhaustive checks on each individual layer and preventing use of a faulty layer in the multi-layer circuit board thereby greatly reducing wastage.

Referring now to Fig. 19 there is illustrated a still further printed circuit board production plant for use in the process indicated generally by the reference numeral 300 in which parts similar to those referred to in Figs. 1 to 14 are indicated by the same reference numerals generally. When the circuit board with the layer of conducting tin/lead is delivered from the etching station 8, it is passed through a heating station 301 where heat is applied and the tin/lead metal layer melts to form solder. The circuit board is then passed to the solder mask station 10 where a solder mask is applied to the conducting tracks leaving portions of the circuit board exposed and then delivered to the component layer workstation 15.

The invention is not limited to the embodiments hereinbefore described, which may be varied in both construction and detail.

Claims

1. A printed circuit board production process for producing a circuit board having at least two interconnected conducting layers comprising the steps of: chemically plating a circuit board with a conducting material to provide a chemically plated electrical connection layer between the conducting layers; applying a printed circuit board design to each conducting layer; electrically plating the circuit board to cover the conducting layers with a conductive material and to apply an electrically plated conductive layer to the chemically plated electrical connection layer; and etching the circuit board to remove excess conducting material from each layer.

2. A printed circuit board production process as claimed in claim 1 wherein the step of chemically plating the circuit board is carried out to achieve a chemically plated electrical connection layer of less than ten microns.

3. A printed circuit board production process as claimed in claim 1 wherein the step of chemically plating the circuit board is carried out to achieve a chemically plated electrical connection layer of less than five microns.

4. A printed circuit board production process as claimed in any of claims 1 to 3 wherein the step of electrically plating the circuit board is carried out to achieve an electrically plated conductive layer of greater than two microns.

5. A printed circuit board production process as claimed in an of claims 1 to 3 wherein the step of electrically plating the circuit board is carried out to achieve an electrically plated conductive layer of greater than five microns.

6. A printed circuit board production process as claimed in any preceding claim including the sequential steps of: passing the circuit board through a deoxidising chemical spray to treat an exposed contact pad on the etched circuit board; immersing the treated contact pads in a hot solder bath; removing excess solder from the circuit board using a plurality of high velocity air jets; and cleaning the circuit board using a plurality of steam jets.

7. A printed circuit board production process as claimed in claim 6 wherein the deoxidising chemical spray is provided by a peroxide, sulphuric acid and water solution.

8 A printed circuit board production process as claimed in any preceding claim including the further steps of: receiving a printed circuit board design; checking the received printed circuit board design; generating a circuit board plot of the checked printed circuit board design for applying a printed circuit board design to each conducting layer; generating a circuit board drilling list for the checked printed circuit board design; preparing a circuit board for receiving the printed circuit board design; selectively drilling the circuit board in response to the generated circuit board drilling list to deliver a drilled circuit board; laminating the drilled circuit board with an etch resistant electroplating film;; developing the circuit board design applied to each conducting layer to reveal a plurality of conducting tracks corresponding with the checked printed circuit board design; adding a tin and lead metal layer to an electrically plated circuit board; and stripping away the etch resistant electroplating film from the circuit board.

9. A process as claimed in claim 8 wherein the step of chemically plating the circuit board includes the sequential steps of: immersing the circuit board in a solvent; rinsing the circuit board in hot water and rinsing the circuit board in cold water; dipping the circuit board in a desmearing agent and rinsing the circuit board; lowering the circuit board into a bath of neutraliser and rinsing the circuit board in cold water; dipping the circuit board in a conditioning agent and rinsing the circuit board; performing a microetch on the circuit board and rinsing the circuit board; immersing the circuit board in a catalyst bath before rinsing the circuit board; covering the circuit board in an accelerator agent and rinsing the circuit board before lowering the circuit board into a chemical copper bath; and rinsing the circuit board.

10. A process as claimed in any preceding claim wherein the step of electrically plating the circuit board includes the sequential steps of: soaking the circuit board in a hot cleaning agent and rinsing the circuit board; performing a microetch on the circuit board and rinsing the circuit board; dipping the circuit board in an acid bath; plating the circuit board in an electrical copper bath; and rinsing the circuit board.

11. A process as claimed in any of claims 8 to 10 including the steps of: heating the circuit board to melt the tin and lead metal layer to form solder; applying a solder mask to a substantial portion of the conductive tracks leaving a plurality of exposed contact pads; applying a component layer using a silk screen print overlay; routing the circuit board design from the circuit board; and testing the circuit board design for correct functionality.

12. A process as claimed in any of claims 8 to 10 further including the steps of: stripping the tin and lead layer to leave exposed conducting tracks; covering a substantial portion of the exposed conducting tracks to leave a plurality of exposed contact pads; applying a component layer using a silk screen print overlay; routing the circuit board design from the circuit board; testing the circuit board design for correct functionality; and delivering a final circuit board.

13. A process as claimed in any of claims 8 to 12 wherein the step of preparing the circuit board for receiving the printed circuit board design includes the steps of: applying a layer pattern to at least two circuit board layers; developing the circuit board design applied to each conducting layer; applying a layer alignment mask to each circuit board layer; etching each circuit board layer; striping a laminate layer from each circuit board layer; and aging each circuit board layer to provide a contact key.

14. A process as claimed in claim 13 including the further steps of: assembling the circuit board layers by injecting a layer of non-conductive resin between adjacent layers; aligning adjacent layers by aligning the alignment mask on adjacent layers; heating and applying pressure to the assembled aligned layers; cooling the assembled aligned layers; and delivering a multi-layer circuit board.

15. A process as claimed in any of claims 8 to 14 wherein the step of generating a board plot of the checked printed circuit board design includes the steps of: registering the circuit board design to produce at least one copy of the printed circuit board design; and adding an alignment and test mask to each printed circuit board design.

16. A printed circuit board whenever produced by the process as claimed in any preceding claim.

16. A process as claimed in claim 15 wherein the alignment and test mask has a plurality of adjacent tracks and contact pads.

17. A process as claimed in claim 15 wherein adjacent tracks are of different gauge corresponding with track gauges of the circuit board design.

18. A printed circuit board production process substantially as hereinbefore described with reference to the accompanying drawings.

19. A printed circuit board whenever produced by the process as claimed in any preceding claim.

Amendments to the claims have been filed as follows 1. A printed circuit board production process for producing a circuit board having at least two interconnected conducting layers comprising the steps of: chemically plating a circuit board with a conducting material to provide a chemically plated electrical connection layer between the conducting layers; applying a printed circuit board design to each conducting layer; electrically plating the circuit board to cover the conducting layers with a conductive material and to apply an electrically plated conductive layer to the chemically plated electrical connection layer; etching the circuit board to remove excess conducting material from each layer; and passing the circuit board through a deoxidising chemical spray to treat an exposed contact pad on the etched circuit board.

21 A printed circuit board production process as claimed in claim 1 wherein the deoxidising chemical spray is provided by a peroxide, sulphuric acid and water solution.

3. A printed circuit board production process as claimed in claim 1 or claim 2 including the sequential steps of: immersing the treated contact pads in a hot solder bath; removing excess solder from the circuit board using a plurality of high velocity air jets; and cleaning the circuit board using a plurality of steam jets.

4. A printed circuit board production process as claimed in any preceding claim including the further steps of: receiving a printed circuit board design; checking the received printed circuit board design; generating a circuit board plot of the checked printed circuit board design for applying a printed circuit board design to each conducting layer; generating a circuit board drilling list for the checked printed circuit board design; preparing a circuit board for receiving the printed circuit board design; selectively drilling the circuit board in response to the generated circuit board drilling list to deliver a drilled circuit board; laminating the drilled circuit board with an etch resistant electroplating film;; developing the circuit board design applied to each conducting layer to reveal a plurality of conducting tracks corresponding with the checked printed circuit board design; adding a tin and lead metal layer to an electrically plated circuit board; and stripping away the etch resistant electroplating film from the circuit board.

5. A printed circuit board production process as claimed in any preceding claim wherein: the step of chemically plating the circuit board is carried out to achieve a chemically plated electrical connection layer of less than five microns; and the step of electrically plating the circuit board is carried out to achieve an electrically plated conductive layer of greater than five microns.

6. A process as claimed in claim 5 wherein the step of chemically plating the circuit board includes the sequential steps of: immersing the circuit board in a solvent; rinsing the circuit board in hot water and rinsing the circuit board in cold water; dipping the circuit board in a desmearing agent and rinsing the circuit board; lowering the circuit board into a bath of neutraliser and rinsing the circuit board in cold water; dipping the circuit board in a conditioning agent and rinsing the circuit board; performing a microetch on the circuit board and rinsing the circuit board; immersing the circuit board in a catalyst bath before rinsing the circuit board; covering the circuit board in an accelerator agent and rinsing the circuit board before lowering the circuit board into a chemical copper bath; and rinsing the circuit board.

7. A process as claimed in claim 5 or claim 6 wherein the step of electrically plating the circuit board includes the sequential steps of: soaking the circuit board in a hot cleaning agent and rinsing the circuit board; performing a microetch on the circuit board and rinsing the circuit board; dipping the circuit board in an acid bath; plating the circuit board in an electrical copper bath; and rinsing the circuit board.

8. A process as claimed in any of claims 4 to 7 including the steps of: heating the circuit board to melt the tin and lead metal layer to form solder; applying a solder mask to a substantial portion of the conductive tracks leaving a plurality of exposed contact pads; applying a component layer using a silk screen print overlay; routing the circuit board design from the circuit board; and testing the circuit board design for correct functionality.

9. A process as claimed in any of claims 4 to 7 further including the steps of: stripping the tin and lead layer to leave exposed conducting tracks; covering a substantial portion of the exposed conducting tracks to leave a plurality of exposed contact pads; applying a component layer using a silk screen print overlay; routing the circuit board design from the circuit board; testing the circuit board design for correct functionality; and delivering a final circuit board.

10. A process as claimed in any of claims 4 to 9 - wherein the step of preparing the circuit board for receiving the printed circuit board design includes the steps of: applying a layer pattern to at least two circuit board layers; developing the circuit board design applied to each conducting layer; applying a layer alignment mask to each circuit board layer; etching each circuit board layer; striping a laminate layer from each circuit board layer; and aging each circuit board layer to provide a contact key.

11. A process as claimed in claim 10 including the further steps of: assembling the circuit board layers by injecting a layer of non-conductive resin between adjacent layers; aligning adjacent layers by aligning the alignment mask on adjacent layers; heating and applying pressure to the assembled aligned layers; cooling the assembled aligned layers; and delivering a multi-layer circuit board.

12. A process as claimed in any of claims 4 to 11 wherein the step of generating a board plot of the checked printed circuit board design includes the steps of: registering the circuit board design to produce at least one copy of the printed circuit board design; and adding an alignment and test mask to each printed circuit board design.

13. A process as claimed in claim 12 wherein the alignment and test mask has a plurality of adjacent tracks and contact pads.

14. A process as claimed in claim 13 wherein adjacent tracks are of different gauge corresponding with track gauges of the circuit board design.

15. A printed circuit board production process substantially as hereinbefore described with reference to the accompanying drawings.