GB2149130A - Testing electronic circuits - Google Patents

Testing electronic circuits Download PDF

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Publication number
GB2149130A
GB2149130A GB08427301A GB8427301A GB2149130A GB 2149130 A GB2149130 A GB 2149130A GB 08427301 A GB08427301 A GB 08427301A GB 8427301 A GB8427301 A GB 8427301A GB 2149130 A GB2149130 A GB 2149130A
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United Kingdom
Prior art keywords
circuit
points
locations
reference points
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08427301A
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GB2149130B (en
GB8427301D0 (en
Inventor
Dr Raymond Bird
Raymond Cliffe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Services Ltd
Original Assignee
Fujitsu Services Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Services Ltd filed Critical Fujitsu Services Ltd
Publication of GB8427301D0 publication Critical patent/GB8427301D0/en
Publication of GB2149130A publication Critical patent/GB2149130A/en
Application granted granted Critical
Publication of GB2149130B publication Critical patent/GB2149130B/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302Contactless testing
    • G01R31/305Contactless testing using electron beams

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

Electronic circuits mounted on substrates 6 are tested by directing a beam 2 of electrons successively at a plurality of points or locations of the circuit conductors (13, Fig. 2) and using the resulting secondary emission as the source of measurement signals. The test points may be points (14) of the circuit or pads of conductive material (15) provided on the substrate 6. To eliminate possible errors arising from the scanning and beam deflection geometry of the beam production apparatus 1, 3, 5, a plurality of reference pads or points (16) is provided on the substrate 6. In use, the beam deflection is effectively calibrated by directing the beam to the reference pads. <IMAGE>

Description

SPECIFICATION Testing electronic circuits This invention relates to the testing of the operation of electronic circuits by the use of an electron beam.
UK Patent No. 1 594597 discloses a method of testing electronic circuits in the form of printed circuit boards having components mounted on them by directing a beam of electrons from an electron gun at a succession of test points on the circuit so as to produce a secondary emission of electrons from each of these test points in turn. A potential barrier filter is provided adjacent the circuit under test. This barrier filter which is in the form of a grid maintained at a predetermined potential serves to produce a differentiation between the secondary emission from points of the circuit at a first potential as compared with the secondary emission from points of the circuit at a second potential.The electrons which penetrate the potential barrier filter are accelerated to a scintillator so that light produced in the scintillator in response to the secondary electron emission can be detected by a photo multiplier detector. The electron beam is deflected in X and Y directions by signals applied to deflection coils and in order to ensure that the electron beam scanning is correctly registered relative to the circuit under test, before a test sequence is started, the beam is swept over tooling marks on the board and biasses for the X and Y deflection coils are adjusted.
This registration of the scanning relative to the circuit under test is useful in ensuring that the circuit has been correctly positioned in the test apparatus but is unable to compensate for non-linearity in the deflection circuits dimensional variations between circuits under test, or deflections caused by magnetic fields generated by the circuit under test. Electron beam scanning circuits are liable to produce pin cushion or barrel distortion over the scanned area. Hence although the circuit may be correctly positioned, as determined for example by the scanning of a mark at an edge of the circuit, the tracking of the electron beam during its deflection across the circuit may, due to non-linearity in the deflection circuits, result in the beam being'incorrectly directed at other parts of the circuit.This is especially the case when circuits having relatively large dimensions are to be tested and hence require relatively large angles of deflection of the electron beam or in the case of very densly packed test points where the deflection angles between test points are narrow. Also there may be dimensional variations during the manufacture of the printed circuit boards forming the circuit to be tested and this may result in a part of the circuit intended to be impinged by the beam being located outside the area of impingement of the beam. While it may be possible to decrease the non-!inearity of the beam positioning by the use of costly and complex deflection circuits any improvement in the linearity of the beam positioning would not assist in overcoming a dimensional variation between circuits to be tested.
Furthermore it is believed that there may be variations in the secondary emission from the circuit being tested as between conductors of different widths, due to very thin layers of undesired material covering the conductors, due to different parts of the circuit board being differently spaced from the potential filter or due to differences in angle of impingement of the electron beam on different parts of the circuit being tested.
According to the invention a method of testing an electronic circuit mounted upon a substrate by directing a beam of electrons successively at a plurality of points or locations of the circuit at which it is desired to check, monitor or determine potentials in the circuit point or region to produce for each said point or region a secondary electron current flow; filtering the secondary current flow by a potential barrier so that only secondary electrons at or above a predetermined potential level are passed to detection means, the method including the steps of providing a plurality of reference points or locations distributed over an area or region of the substrate that is occupied by the electronic circuit and positioned in predetermined locations relative to the circuit points or regions to be checked, monitored or otherwise determined.
Preferably the electron beam is caused to move to the vicinity of these reference points in succession and to scan the adjacent part of the substrate to determine the locations of these reference points and successively modifying the deflection of the beam as the locations of the reference points are determined.
If desired the respective locations of all or a group of reference points may be determined prior to testing the potentials of points on the circuit or determination of the locations of the reference points may be carried out during a sequence of tests of the potentials of a plurality of points, the test of the potential at a point of the circuit being preceded by determination of the location of an adjacent reference point.
The reference points may be energised with a steady predetermined potential or with signals such that secondary electron emission from each reference point provides data for controlling the deflection of the electron beam. The data may be utilised for setting the potential filter to one or more different filtering levels during testing of the points on the circuits.
A method in accordance with the invention will now be described with reference by way of example to the accompanying drawings in which: Figure 1 shows in schematic form, electron beam apparatus for testing potentials in an electronic circuit and Figure 2 shows a circuit board for testing in the above apparatus.
Referring to Figure 1 an electron gun 1 generates a beam 2 of electrons which can be deflected in X or Y directions by coils 3 energised with deflection currents by deflection circuit 4 or by other deflection means, such as electrostatic deflection electrodes energised by a deflection circuit 4. The gun 1 is mounted in the narrow end of an enclosure 5 which can be evacuated and the wide end of the enclosure is constructed to permit the insertion and removal of a printed circuit board 6 to be tested. A mounting, not shown, is provided for the printed circuit board to enable the board to be accurately positioned within the enclosure. Adjacent and parallel to the position occupied by a board under test are a number of grids for controllling secondary electrons emitted from the printed circuit board when the electron beam impinges on the board.One of these grids 7 acts as a potential filter to secondary electrons such that emission from those portions of the circuit below a predetermined potential are prevented from reaching a detector 8 whereas the secondary emission from those portions of the circuit at or above that predetermined potential are permitted to pass to the detector and produce output signals on line 9. The level of potential discrimination is determined by the potential applied by a potential source 10 to the grid 7. The deflection of the electron beam 2 by the deflection circuit 4 is controlled by a controller 11 which also controls the potential applied to the grid 7.During testing of a circuit 6, the circuit 6 is rendered operational and is caused to adopt appropriate functional states respectively by means of power potentials and input signals applied by test circuit energiser 1 2 under the control of the controller 11.
Referring now to Figure 2 a printed circuit board consisting of one or more layers of conductors separated and supported by a substrate of insulating material, carried on one surface a plurality of conductors 1 3 connected to discrete components such as integrated circuits mounted on the opposite face of the board. In the test sequence, to which it is desired to subject the printed circuit board, tests will be carried out at a plurality of points on the circuit to determine the potentials at those points.These points may be located on the conductors 13, for example, at positions 14, in some cases the points may be located on pads 1 5 of conductive material connected to the point in the circuit to be tested or in some cases at combinations of positions 14 and pads 1 5. Such pads may be required where the potential of internal conductors is to be tested.
In addition reference pads 1 6 of conductive material are provided distributed across the surface of the board. These pads are located at positions bearing fixed relationships with the points or locations 1 4, 1 5 to be tested or with groups of such points or locations. These reference pads 1 6 are utilised to provide a plurality of reference points or locations from which the positions of the points or locations to be tested can be determined.
A circuit board 6 to be tested is positioned in the enclosure 5 and is energised by appropriate power potentials and input signals by the test circuit energiser 1 2. The electron beam is deflected to a position within the vicinity of one of the reference pads 1 6 and then swept over a small area to produce an indication of the relative location of the pad 1 6. Signals obtained from this sweeping of the beam are utilised to bias the deflection circuit so as to centre the beam on the reference pad. The beam is then deflected by predetermined values in X and/or Y directions to bring it into a first one of the points to be tested.After testing the potential at this point in the circuit the beam is again deflected by predetermined values relative to the first reference pad to bring it into the location of a second one of the reference pads. Providing the circuit board dimensions are correct and the deflection circuit is sufficiently linear, the beam will be centred on this pad. However, if the beam is not so aligned, a small sweep of an area is affected whereby the beam is utilised to detect the reference pad and generate new correction factors for the deflection.
This second reference pad is then used as the base for deflecting the beam to the next point to be tested.
If desired the beam may be swept over the area of each of the test points so that if the area of any test point is partially contaminated acceptable signals are produced from the uncontaminated portion.
The reference pads may also be utilised to provide control signals on line 9 to the controller 11 to very the discrimination potential of the grid 7. For example the reference pad may be energised to the potential at which it is desired to maintain the grid 7 in respect of tests on points adjacent that pad. Hence when the beam has been centred on the pad, the controller 11 carried out the step of adjusting the potential of the grid 7 and only then is the beam moved to the point to be tested. The above described adjustment of the discrimination potential of the grid 7 may be used to compensate for variation in the secondary emission from different test points on the circuit. Such variations may arise due to different widths of the conductors or pads at which the test points are located, or the presence of undesired material overlying the test points at some parts of the circuit or differences in the spacing of different parts of the circuit board and the grid 7.

Claims (11)

1. A method of testing an electronic circuit mounted upon a substrate by directing a beam of electrons successively at a plurality of points or locations of the circuit at which it is desired to check, monitor or determine potentials in the circuit point or region to produce for each said point or region a secondary electron current flow; filtering the secondary current flow by a potential barrier so that only secondary electrons at or above a predetermined potential level are passed to detection means, the method including the steps of providing a plurality of reference points or locations distributed over an area or region of the substrate that is occupied by the electronic circuit and positioned in predetermined locations relative to the circuit points or regions to be checked, monitored or otherwise determined.
2. A method as claimed in claim 1 and including the steps of causing the electron beam to scan the substrate to determine the locations of the reference points or locations and successively modifying, where necessary, the deflection parameters for the electron beam as the positions of the reference points or locations are determined.
3. A method as claimed in claim 1 or 2, and in which the respective positions of all or a group of the reference points are determined prior to the effecting of the testing of the potentials on the circuit.
4. A method as claimed in claim 1 or 2, and in which the determination of the positions of the reference points or locations is carried out during a sequence of testing of the potentials of a plurality of points or locations, the test of a potential at a point of the circuit being preceded by determination of the location of an adjacent reference point.
5. A method as claimed in any one of claims 1 to 4, and in which the reference points are energised by a steady predetermined potential.
6. A method as claimed in any one of claims 1 to 4, and in which the reference points are energised with signals such that the secondary electron emission from each reference point provides data for controlling the deflection characteristic of the electron beam.
7. A method as claimed in claim 6, and in which the data is utilised for setting the means for filtering the secondary current flow to one or more different filtering levels during the testing of the reference points of the circuit.
8. A method as claimed in any one of claims 1 to 7, and in which the reference points comprise conductive pads and the like on the substrate.
9. A method as claimed in any one of claims 1 to 7, and in which the reference points comprise selected regions of the printed circuit on the substrate.
10. A method as claimed in any one of claims 1 to 7, and in which the reference points include pads or the like on the substrate and selected regions of the printed circuit on the substrate.
11. A method of testing an electronic circuit mounted on a substrate substantially as hereinbefore described with reference to the drawings.
GB08427301A 1983-10-28 1984-10-29 Testing electronic circuits Expired GB2149130B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB838328912A GB8328912D0 (en) 1983-10-28 1983-10-28 Testing electronic circuits

Publications (3)

Publication Number Publication Date
GB8427301D0 GB8427301D0 (en) 1984-12-05
GB2149130A true GB2149130A (en) 1985-06-05
GB2149130B GB2149130B (en) 1987-03-04

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GB838328912A Pending GB8328912D0 (en) 1983-10-28 1983-10-28 Testing electronic circuits
GB08427301A Expired GB2149130B (en) 1983-10-28 1984-10-29 Testing electronic circuits

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GB (2) GB8328912D0 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0405672A1 (en) * 1989-06-30 1991-01-02 Koninklijke Philips Electronics N.V. Method of measuring a voltage distribution across a conductor pattern
EP1022573A2 (en) * 1999-01-21 2000-07-26 Delaware Capital Formation, Inc. Scan test machine for densely spaced test sites
US6788078B2 (en) 2001-11-16 2004-09-07 Delaware Capital Formation, Inc. Apparatus for scan testing printed circuit boards

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0405672A1 (en) * 1989-06-30 1991-01-02 Koninklijke Philips Electronics N.V. Method of measuring a voltage distribution across a conductor pattern
EP1022573A2 (en) * 1999-01-21 2000-07-26 Delaware Capital Formation, Inc. Scan test machine for densely spaced test sites
EP1022573A3 (en) * 1999-01-21 2001-06-20 Delaware Capital Formation, Inc. Scan test machine for densely spaced test sites
US6788078B2 (en) 2001-11-16 2004-09-07 Delaware Capital Formation, Inc. Apparatus for scan testing printed circuit boards
US7071716B2 (en) 2001-11-16 2006-07-04 Delaware Capital Formation, Inc. Apparatus for scan testing printed circuit boards

Also Published As

Publication number Publication date
GB2149130B (en) 1987-03-04
GB8427301D0 (en) 1984-12-05
GB8328912D0 (en) 1983-11-30

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 19921029