GB2109184A - Controlling conduction of semiconductor device - Google Patents
Controlling conduction of semiconductor device Download PDFInfo
- Publication number
- GB2109184A GB2109184A GB08131805A GB8131805A GB2109184A GB 2109184 A GB2109184 A GB 2109184A GB 08131805 A GB08131805 A GB 08131805A GB 8131805 A GB8131805 A GB 8131805A GB 2109184 A GB2109184 A GB 2109184A
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- conduction
- voltage
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- pulse
- drive arrangement
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/689—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit
- H03K17/691—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit using transformer coupling
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Generation Of Surge Voltage And Current (AREA)
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
- Power Conversion In General (AREA)
Abstract
A transformer-coupled drive arrangement (Figure 1) for effecting switched alternate levels of conduction in a semiconductor device e.g. a field effect switching transistor 13 comprises a drive pulse generator 14 of short (1 microsecond) intermittent drive pulses of alternate opposite polarity, a pulse transformer 16 and zener diode means 21 (or a functional equivalent) by which the transformer secondary is coupled to control electrodes 22, 19 of the transistor. For an n-channel enhancement mode F.E.T. and pulse amplitude and zener breakdown voltage equal to the transistor turn-on voltage each generated positive pulse is passed by zener diode 21 and charges the gate capacitance of transistor 13 turning it 'on', the charged gate reverse biasing the zener diode after the drive pulse has ended and maintaining the 'on' state. The next (negative) drive pulse causes zener breakdown of the diode 21 and discharge of gate capacitance, turning off the transistor until the next positive pulse, enabling the transistor to be switched at a relatively slow rate by short pulses and requiring only a simple and inexpensive form of pulse transformer in the circuit. The zener diode means may comprise back-to- back diodes or a combination of other circuit elements having similar threshold conduction characteristics. The arrangement may drive a number of devices synchronously by having a plurality of secondary windings to the transformer, each with a zener diode connection to a control device. <IMAGE>
Description
SPECIFICATION
Controlling conduction of semiconductor devices
This invention relates to driving of semiconductor devices and in particular to driving such semiconductor devices to control their conduction levels.
Semiconductor devices are most frequently operated at different conduction levels when operated in a switching mode, that is, driven alternately at a fully saturated conduction level ('on') and at a nonconduction level ('off'). Circuits employing semiconductors in a switching mode also frequently employ field effect transistors (F.E.T.) as switching elements which are capable of switching heavy currents at a wide range of switching rates by means of a small drive voltage applied to control electrodes.
It is often necessary to position such a switch in a high potential (with respect to circuit ground) part of a circuit to be switched requiring the drive voltage while small in value to be equally raised above circuit ground. When the switching operation is continuous at a relatively high frequency this is achieved by transformer coupling the drive voltage as pulses from a generator to the control electrodes, the pulses having a voltage-time product to sustain transistor state for the required duration.
Such an arrangement only works efficiently at switching frequencies in excess of several hundred hertz and below this the voltage-time product of the transformed drive pulses requires special and expensive transformer constructions which detracts from the cost advantaages of the transistor switching.
Switching transistor conduction levels between 'on' and 'off' is exemplary only of switching generally between two different levels, which may be intermediate levels of conduction, of a semiconductor device and it is an object of the present invention to provide a transformer coupled driving arrangement for effecting switched alternate levels of conduction in a semiconductor device which is operable to lower switching rates and requires a simpler transformer than hitherto known arrangements, and a method of effecting such switched alternate levels of conduction.
According to a first aspect of the present invention a transformer coupled drive arrangement for effecting switched alternate levels of conduction in a semiconductor device comprises pulse generating means operable to provide drive pulses of alternate opposite polarity intermittently to a primary winding of a pulse transformer said pulse transformer having a secondary winding connected by way of assymetrical threshold conduction means (as herein defined) to control electrodes of the semiconductor device whereby transformed drive pulses of one polarity bias the assymetrical threshold conduction means to conduct in one direction to provide at least a part of the voltage level of said transformed drive pulse to the control electrodes to cause the device to assume one level of conduction maintained after the pulse by reverse biasing of the assymetrical threshold conduction means by storage of the control voltage at the control electrodes, and pulses of said other
polarity bias the assymetrical threshold conduction
means to conduct in the opposite direction to
remove at least part of the stored control voltage from the control electrodes to cause the device to assume an alternative level of conduction.
Switched alternate levels of conduction in plurality of semiconductor devices may be effected by a plurality of drive arrangement as defined in the preceding paragraph wherein the pulse generating means and pulse transformer primary winding are common to, and shared by, all arrangements.
The term "assymetrical threshold conduction means" is used in this specification to mean a device or combination of devices responsive to a voltage in excess of a first predetermined threshold level applied across the device in one sense to conduct in one direction and responsive to a voltage in excess of a second predetermined threshold level applied across the device in the opposite sense to conduct in the opposite direction.
Such means may be provided by a single bidirectional semiconductor diode operable both in a forward and reverse-breakdown mode, for example, a zener diode, in which case one of the threshold voltage levels is substantially zero and the other the zener breakdown voltage, or may comprise a pair of such diodes oppositely poled in series. Alternatively, the assymetrical conduction means may be provided by a pair of unidirectionally conductive devices in parallel, such as oppositely poled so-called reference diodes, each comprising oppositely poled conventional and zener diodes in series to permit conduction only in the zener breakdown mode, or complementary transistor or other semiconductor or non-semiconductor threshold devices.
Where a plurality of devices form the means the first and second predetermined threshold levels may be equal or different from each other.
According to a second aspect of the present invention a method of driving a semiconductor device alternately at two different levels of conduction comprises generating intermittently in a generator, coupled by way of a pulse transformer and assymetrical threshold conduction means (as herein defined) to control electrodes of the semiconductor device, pulsees of opposite polarity and of such magnitude that transformed generated pulses of one polarity bias the assymetrical threshold conduction means to apply a control voltage to the control electrodes to drive it at one conduction level, the control voltage thereafter reverse biasing the assymetrical threshold conduction means to maintain that conduction level, and transformed generated pulses of the other polarity cause the assymetrical threshold conduction means to conduct in the opposite direction to drive the semiconductor device at another conduction level, that conduction level being maintained until a generation of a subsequent pulse of said one polarity.
Embodiments of the invention will now be described by way of example with reference to the accompanying drawings, in which:
Figure lisa circuit diagram of a drive arrangement according to the present invention for an F.E.T.
employing assymmetrical threshold conduction means in the form of a single zener diode,
Figure 2(a) is a circuit diagram of a drive arrangement similarto that of Figure 1 but with assymmetrical threshold conduction means in the form of series connected zener diode means,
Figure 2(b) is a circuit diagram of a drive arrangement similar to that of Figure 2(a) but with assymmetrical threshold conduction means in the form of parallel connected reference diodes,
Figure 3 is a circuit diagram of a series regulator incorporating a drive arrangement according to the present invention,
Figure 4 is a circuit diagram of a switched proportional control arrangement employing a drive arrangement according to the present invention, and
Figure 5 is a circuit diagram of an inverter incorporating a pair of series connected transistor switches which are driven individually to permit variable mark-space ratio of switching,
Figure 6 is a circuit diagram of an inverter showing drive arrangement according to the present invention effecting synchronous switching in a pair of series connected transistor switches,
Figure 7(a) is a circuit diagram of a push-pull inverter showing the drive arrangement of the present invention effecting synchronous switching in transistor switches in a low tension part of the circuit,
Figure 7(b) is a circuit diagram of a push-pull inverter, similar to that of Figure 7(a) in which the transistor switches are in the high-tension part of the circuit,
Figure 8 is a circuit diagram of a three-phase motor drive means employing supply switching transistors controlled by a drive arrangement according to the present invention.
Referring to Figure 1 current through a load L between positive neutral supply rails 11, 12 respectively is controlled by a switch 13 comprising an n-channel enhancement mode F.E.T. Switching of the conduction level of transistor 13 between a saturated conduction 'on' state and a nonconductive 'off' state is controlled by a drive pulse generator 14 which produces short drive pulses of alternate opposite polarity intermittently, say, pulses of 1 microsecond duration every 10 microseconds or longer.
Outputterminals of generator 14 are connected to a primary winding 15 of a pulse transformer 16 having a secondary winding 17. The pulse transformer 16 may be a simple component having a 1:1 ratio formed of bifilarwindings of primary and secondary of about 10-15 turns on a toroidal core.
The secondary winding 17 has one terminal 18 connected to a control electrode (source) 19 of the transistor and another terminal 20 connected by way of assymmetrical threshold conduction means, in the form if a single zener diode means 21 to a control electrode (gate) 22 of the transistor. The zener diode means comprises a single zener diode connected with the anode terminal to the secondary winding terminal 20 and cathode terminal to the transistor gate electrode 22. The zener breakdown voltage of the diode 21 and the pulse amplitude of the generated drive pulses are chosen to be substantially equal and suitable as a switching voltage for transistor 13, say twenty volts.
It will be appreciated that in general the pulse generator 14 will operate and produce pulses with reference to the neutral rail 12, to which it is connected by lead 23, and that while the switching voltage required to be developed across the transistor control electrodes may be of the order of a modest twenty volts the electrodes themselves have to operate at the potential of the supply rail 11 which may be many hundred of volts above the neutral line 12, and transformer coupling represents a conveniently practicable way of isolating the pulse generator and control electrodes.
Considering operation of the circuit of Figure 1, when the generator 14 produces a positive going drive pulse of twenty volts with respect to the neutral rail 12 a similarly positive going pulse between secondary winding terminals 20 and 18 forward biases the zener diode 21 and appears across control electrodes 22 and 19, ofthetransistor 13, driving it into saturated conduction and charging the gate capacitance of the transistor. When the generated pulse ends (after 1 microsecond) the zener diode is reverse biased by the potential stored on the gate capacitance which, not being above the zener breakdown level, remains across the control electrodes and maintains the 'on' state of the transistor.
When the generator 14 subsequently produces a negative going pulse of twenty volt amplitude, this is transformed causing a potential difference of forty volts to appear across the zener diode 21 which conducts in zener breakdown mode until the cathode, connected to gate 22, is reduced to twenty volts above the anode level, that is, zero volts with respect to terminal 19, at which point the transistor switch 19 turns off, and remains so after the drive pulse has ended.
The next positive going pulse generated turns on the transistor again and the transistor switches states between 'on' and 'off' at each drive pulse generated even though the drive pulses themselves are much shorter in duration than the interval between them.
It will be appreciated that the interval between pulses can be chosen to take on any value longer than the pulse duration to give a wide variation in transistor switching rate and is particularly suited to operation at rates of the order of tens to hundreds of hertz. Without requiring other than short-pulse transformation by pulse transformer 16.
It will be appreciated that switching is effected as a result of rapid charging or discharging of the transistor gate capacitance which is a function of the value of that capacitance, the applied voltage and the duration of the pulse.
In order to effect better switching characteristics to the arrangement the circuit may be augmented by additional capacitance between the control electrodes by a capacitor 34, a value of the order of 1 nF being found suitable with the n-channel enhancement mode F.E.T. 13. A resistor 25 may be connected across the secondary winding of the transformer to damp ringing of the transformer and circuit capacitances when the pulse is removed.
Switching characteristics may also require different operating relationships between transformed drive pulse amplitude and zener breakdown voltage.
For example a F.E.T. as described may have a turn-on voltage of the order of 15-20 volts and a turn-offfor a voltage less than 5 volts. The pulse amplitude may be less than the zener breakdown voltage, say 20 and 24 volts respectively such that the positive going pulse applies the full 20 volts to turn on the transistor but the negative going pulse resulting in zener breakdown leaves a positive voltage of about 4 volts on the control electrodes, which is below the turn-off level. Alternatively the transistor switch may be 'overdriven' that is, driven by voltage differences which result in levels much larger than required to effect switching but which shorten the switching times.In the circuit arrangement of Figure 1, such overdriven voltages are a temporary feature for the duration of the driving pulse, the levels falling somewhat to maintain the conduction state.
If the transformed drive pulse voltage is chosen to be greater than the zener breakdown voltage, say 24 volts and 20 volts respectively, then a positive going pulse causes a voltage of 24 volts to forward bias the zener diode and turn on the transistor. At the end of the drive pulse the diode is reverse biased in excess of its zener breakdown level and conducts until the control electrode voltage is at 20 volts, sufficient to maintain the conduction state. When a negative going pulse is applied the diode again conducts in zener mode taking the control electrodes to a control voltage of -4 volts, which turns off the transistor.
After the drive pulse has ended the control voltage will increase by conduction through the diode to a voltage the order of 0 volts.
The value of this form of operation isthatswitch- ing speed, which is a function of the time taken to charge or discharge the gate capacitance, is increased provided it is ensured that the temporarily applied voltages do not exceed safe levels of transistor operator.
In the drive arrangements thus far described the control voltage to maintain the transistor "off" is at or above zero volts. For some circuits this may be too close to conduction levels to ensure nonconduction under all conditions and deviably the control voltage should be maintained at a negative value rather than just temporarily during switching.
Such an arrangement is shown in Figure 2 which is similarto Figure 1 but the assymmetrical threshold conduction means 21 comprises a pair of zener diodes 26, 27 connected 'back-to-back' in series so that the predetermined threshold voltages required to effect conduction in each direction corresponds to the zener breakdown voltage of the zener diode
reverse biased in that direction. The diode 26
comprises a principal zener diode and 27 a subsidi
ary zener diode.Considering operation the values
used for the 'overdriven' description of Figure 1 are
again suitable, the transformed pulse amplitude of
24 volts and principal zener diode breakdown voltage of 20 vlts. The subsidiary zener diode is chosen to have a zener breakdown voltage of about 4 volts, that is, approximately the difference between the principal zener diode breakdown voltage and the transformed drive pulse amplitude.
When a positive going drive pulse is transformed of 24 volts, 4 volts is dropped across subsidiary diode 27 and the remainder, 20 volts, applied to the transistor control electrodes to effect switching 'on' of the transistor. This voltage is not greater than the zener breakdown voltage of the principal zener diode 26 and is maintained after the drive pulse has ended.
When a negative going drive pulse is generated the control electrode voltage is reduced to -4 volts which is maintained after the drive pulse by virtue of reverse biased subsidiary zener diode 27.
The form of zener diode means shown in Figure 2(a) still permits variations in relative levels of drive pulse amplitude and zener diode breakdown voltages. For instance, the arrangement may still be 'overdriven' by applying iarger amplitude pulses giving temporary switching voltages at the control electrodes for the duration of the drive pulses which settle to lower maintaining voltages.
An alternative form of zener diode means is shown in Figure 2(b) and comprises a pair of so-called reference diodes 26' and 27' connected in parallel.
Each reference diode comprises a zener diode in series with an oppositely poled conventional diode which blocks forward biased conduction through the zener diode and permits conduction only in the zener breakdown mode. Clearly operation is similar to the arrangement of Figure 2(a) but avoids the voltage drop across the forward biased zener diode in that circuit.
It will be appreciated also that the above description, is somewhat simplified to illustrate the nature of operation and neglects to consider such factors as voltage drops in forward biased diodes, transformer inefficiency and the effects of charging rates on the capacitance and inductive components in defining resultant voltages over a relatively short period of switching time; and corrections to those values calculated on the simple basis employed above can be derived and component and voltage values selected accordingly, or the values can be selected on the basis of measurements made in an actual circuit.
Other variations to the basic circuit described and readily perceivable are the use of a pulse transformer having a ratio departing from 1:1 and/or a drive pulse generator in which the intervals between positive and negative pulses are different or variable in operation to drive an assymmetrical mark to space ratio of conduction states of the transistor.
Similarly the drive pulse repetition frequency may be varied in a simple manner to effect switching of the device at a suitable frequency.
Furthermore the levels chosen for the voltage applied to the control electrodes need not be such as to drive the transistor either into saturated conduction or non-conduction but may be chosen to set the conduction level at some intermediate value.
Also the drive arrangement is not restricted to use with n-channel enhancement mode F.E.T. as chosen for the purposes of description. It is suited for driving different devices provided there is no significant leakage of control electrode voltage through the device, affecting its conduction level, or the arrangement is operated at a relatively high switching rate.
The drive arrangement although described above and hereinafter with respect to an n-channel F.E.T. is readily adapted to use with devices of opposite conductivity type by suitable polarity reversal of the zener diode means.
Furthermore the assymmetrical threshold conduction means is described above as being zener diode means, either as a single component or a combination of components. It will be appreciated that in each of the configurations described the zener diode means may comprise any device, semiconductor or otherwise, which provides the same conduction characteristics at suitable threshold voltages.
Some examples of circuits employing a drive arrangement according to the present invention will be given to illustrate these and other variations. For convenience the description will again show assymmetrical threshold conduction means in the form of a single zener diode.
As stated above this form of transformer-coupled drive arrangement for a switching transistor is particularly suited to circuits in which the control electrodes of the transistor are required to be at a high potential with respect to the drive pulse generator. One example of such a circuit, in which the switching transistor is employed as a series regulator is shown in Figure 3, the transistor 30 and its control electrodes 31,32 being isolated from the drive pulse generating means 33 by pulse transformer 34. The remainder of the regulator is conventional and in operation transistor 30 is switched alternately 'on' and 'off' underthe control of generator 33.The generator 33 may be preset to give assymmetrical 'on' and 'off' times to vary the output voltage or variable as a function of the regulator output or currrentto maintain a stabilised output irrespective of loading.
Such an arrangement may also be employed with controlled devices such as an electromechanical actuator as shown in Figure 4. Currentthrough an actuator coil 36 is controlled by switching transistor 37 and sensed by a voltage developed across current sensing resistor 38. The current sensing voltage is applied to drive pulse generator 39 of transistor drive arrangement 40 to control the spacing between pulses of opposite polarity a sensed reduction in current increasing the interval between positive and negative drive pulses to increase the proportion of time that switch 37 is 'on'.
All of the circuits so far described including the drive arrangement according to the present invention have involved a single transistor to be controlled by switching.
There are many forms of circuit in which it is required to switch a plurality of transistors 'on' and 'off' at intervals, one of which, an inverter is shown in Figure 5.
The inverter circuit 41 comprises a d.c. voltage source 42 shunted by a pair of capacitors 43,44 connected in series with each other at junction point 45 and forming a capacitive divider across the source. The source is also shunted by a pair of controllable semiconductor deviuces in the form of
n-channel enhancement mode F.E.T. switches 46,47
also connected in series with each other at junction
point 48. The junction points 45 and 48 between the capacitor and transistor pairs respectively are con
nected by way of the primary winding of an output transformer 49, the secondary winding of which is connected to output terminals 50 for supplying an a.c. load (not shown).
This form of inverter circuit is known and is operated by switching transistors 46 and 47 into conduction alternately while the other transistor is turned off. The transistors are driven by individual drive arrangements 51,52 described above with reference to Figure 4, the drive pulse generating means 53, 54 respectively having input connections by which the interval between positive and negative going pulses of each generator can be varied, either manually by external control (not shown) or as a result of sensing the output provided by transformer 49, to stabilise said output.It will be seen that transistor switches 46 and 47 must not be permitted to be 'on' at the same time and this is achieved by drive pulse generating means 53 and 54 operating out of phase, that is, both 'on'- and 'off'-producing drive pulses of generator 54 occuring between successive 'off'- and 'on'-producing drive pulses of generator 53.
The above described inverter circuit represents a general form of operation in which the conduction periods of the transistor switches can be varied independently of each other to provide an internval between on states of the two transistors.
A widely used form of the inverter shown in Figure 5 employs synchronous switching of the transistors wherein the transistors are never both 'off' but when one transistor is 'off' the other one is 'on' and vice versa. Clearly in the embodiment shown in Figure 5 great care is needed to ensure that one transistor is 'off' before the other is turned 'on' and synchronous switching is difficult to ensure.
A multiple-device form of drive arrangement according to the present invention and which is suited to such an inverter is shown in Figure 6.
In Figure 6 the inverter is shown generally at 55 and includes series-connected switching transistors 56, 57 (corresponding to transistors 46,47 of Figure 5). The driving arrangement for the transistors comprises a drive pulse generator 58 producing alternate positive and negative-going pulses with respect to neutral rail 59, the output of the generator being applied across a primary winding 60 of a pulse transformer 61.
The pulse transformer 61 has two secondary windings 62, 63 each having a 1:1 turns ratio with the primary winding 60 but connected (as shown by the dot notation) to be used in opposite polarity. The winding 62 is connected by way of zener diode means 64 to the control electrodes of transistor 56 and the secondary winding 63 of the pulse transformer which gives an output opposite in polarity to first winding is connected by way of a zener diode means 65, to the control electrodes of switching transistor 57.
If the transistors 56 and 57 have similar operating characteristics the zener diode means 64 and 65 may conveniently be of the same form and have the same zener breakdown voltage which is chosen in accordance with the variables discussed heretofore and the drive pulse generator 58 is arranged to produce pulses of amplitude in accordance with said variables.
Considering the connections of the transformer windings it will be seen that a positive-going drive pulse applied to transformer primary 60 results in a positive voltage across the control electrodes of transistor 56, turning 'on' of the transistor, and simultaneously (by zener breakdown in means 65) in a reduction in voltage across the control electrodes of transistor 57, turning 'off' the transistor. A subsequent negative-going drive pulse causes zener breakdown of means 64 and a reduction in voltage across the control terminals of transistor 56, turning it 'off' while simultaneously raising the voltage across the control electrodes of transistor 57 turning it on.' It will be appreciated that by variation of the interval between positive and negative drive pulses the ratio of conduction times between transistors 56 and 57 is correspondingly varied.Furthermore as each drive pulse serves to switch the conduction states or levels of both transistors simultaneously there is no possibility of a direct short circuit of the d.c.-supply rails and no additional circuitry is required to prevent such an occurrance.
As stated above the relationship between transformed pulse amplitude and zener breakdown voltage is open to variation depending on the transistor parameters.
The form of zener diode means shown in Figure 2, that is, two back-to-back zener diodes, is particularly suited to a multiple device drive arrangement wherein a voltage pulse amplitude required for effective switching of one device may be reduced to a suitable level for the other device by appropriate choice of zener breakdown voltages.
The multiple device drive arrangement also has other variants. For example, the transformer turns ratio between primary and each secondary may be different, or transistors of a different conductivity type to each other may be employed by suitable polarity reversal of zener diode means and transformer secondary winding.
The above described multiple device drive arrangement although suited to driving serially connected devices, where the control electrodes of one device are necessarily at a higher potential than of the other, is not restricted to such circuits and is suited equally to parallel connected devices as shown in the push-pull inverters shown in Figures 7(a) and 7(b). Figure 7(a) illustrates the use of transistor switches driven by a multiple device drive arrangement in which the transistor switches are in a low potential part of the circuit whereas Figure 7(b) illustrates a corresponding arrangement in which the transistor switches one at a high potential part of the circuit.
Although the above described multiple device drive arrangements have all related to inverter circuits the drive arrangement is applicable to other forms of switching such as 3-phase motor control shown in Figure 8. Operation of the drive arrangements for the series connected transistor switches is similar to that described in relation to Figure 6 with the drive pulse generators (not shown) connected to pulse transformer terminals A, B and C having a predetermined phase relationship to provide 3phase outputs to the motor coils.
As stated for the single device arrangement described above the frequency of switching, that is of commutation of the circuits controlled by the switching device is directly related to the pulse repetition frequency of the drive pulse generating means, which frequency may be preset or variable in a simple manner which will be understood without the requirement for a detailed description.
Although in the above description examples of circuits have to be shown in which for a multipledevice drive arrangement two devices have been driven it will be appreciated that a greater number of devices may be synchronously driven from a single drive pulse generator and pulse transformer, each device requiring a separate secondary winding and zener diode means.
Claims (27)
1. A transformer-coupled drive arrangement for effecting switched alternate levels of conduction in a semiconductor device comprising pulse generating means operable to provide drive pulses of alternate opposite polarity intermittently to a primary winding of a pulse transformer said pulse transformer having a secondary winding connected by way of assymmetrical threshold conduction means (as herein defined) to control electrodes of the semiconductor device whereby transformed drive pulses of one polarity bias the assymmetrical threshold conduction means to conduct in one direction to provide at least a part of the voltage level of said transformed drive pulse to the control electrodes to cause the device to assume one level of conduction, maintained after the pulse by reverse biasing of the assymmetrical threshold conduction means by storage of the control voltage at the control electrodes, and pulses of said other polarity bias the assymmetrica threshold conduction means to conduct in the opposite direction to remove at least part of the stored control voltage from the control electrodes to cause the device to assume an alternative level of conduction.
2. A drive arrangement as claimed in claim 1 including a capacitor connected across the control electrodes of the semiconductor device.
3. A drive arrangement as claimed in claim 1 or claim 2 including a resistor connected across the secondary winding of the pulse transformer.
4. A drive arrangement as claimed in claim 3 in which the assymmetrical threshold conduction means comprises zener diode means in which the zener breakdown voltage of a zener diode of the means comprises at least one of the predetermined threshold voltage levels required to cause conduction in the assymmetrical threshold conduction means.
5. A drive arrangement as claimed in claim 4 in which the zener diode means comprises effectively a single zener diode and in which the forward biased conduction voltage drop of the diode comprises the other predetermined threshold voltage level required to cause opposite conduction in the assymmetrical threshold conduction means.
6. A drive arrangement as claimed in claim 4 in which the zener diode means comprises a pair of oppositely poled zener diodes and in which the zener breakdown voltages of the two zener diodes comprise predetermined threshold voltage levels required to cause conduction in the assymmetrical threshold conduction means.
7. A drive arrangement as claimed in claim 6 in which the zener diodes are connected in series.
8. A drive arrangement as claimed in claim 6 in which the zener diodes are connected in parallel, each zener diode having in series with it a further diode to prevent forward biased conduction through the associated zener diode.
9. A drive arrangement as claimed in claims 1 to 8 for a transistor switch in which the pulse generating means and pulse transformer are arranged to provide pulses of such amplitude as to cause conduction of the assymmetrical threshold conduction means in one direction to drive the transistor into saturated conduction (fully 'on') and conduction of the assymmetrical threshold conduction means in the other direction to render the transistor nonconductive (fully 'off').
10. A drive arrangement as claimed in claim 9 when dependent from claim 5 in which the zener diode has a zener breakdown voltage greater than the turn-on control voltage of the transistor switch, in which the pulse generating means is operable to provide transformed pulses of amplitude greater than said turn-on control voltage of the transistor and the difference between the transformed pulse voltage and zener breakdown voltage is less than the turn-off voltage of the transistor.
11. A drive arrangement as claimed in claim 10 in which the zener breakdown voltage and transformed pulse amplitude are arranged to be substantially equal in value to produce a turn-off voltage at the control electrodes of the transistor switch of substantially zero.
12. A drive arrangement as claimed in claim 10 in which the transformed pulse amplitude is arranged to be greater than the zener breakdown voltage to produce initially a turn-off voltage of opposite polarity to the turn-on voltage.
13. A drive arrangement as claimed in claim 9 when dependent from any one of claims 6 to 8 in which one of the zener diodes has a zener breakdown voltage in excess oftheturn-on control voltage of the transistor and the other zener diode has a zener breakdown voltage not less than the magnitude of a turn-off voltage of opposite polarity to the turn-on voltage to be maintained.
14. A drive arrangement as claimed in claim 13 in which the drive pulse generating means and transformer are arranged to produce transformed pulses of magnitude substantially equal to the sum of the zener breakdown voltages of the zener diodes.
15. A drive arrangement as claimed in any one of the preceding claims in which the generating means is arranged to produce drive pulses of the order of one microsecond long.
16. A drive arrangement as claimed in any one of the preceding claims in which the pulse transformer has a primary:secondary ratio of 1:1.
17. A drive arrangement as claimed in any one of the preceding claims in which the pulse transformer winding are bifilarwound on atoroidal core.
18. A drive arrangement for effecting switched alternate levels of conduction in a plurality of semiconductor devices comprises a plurality of drive arrangements as claimed in any one of the preceding claims wherein the pulse generating means and pulse transformer primary winding are common to, and shared by, all arrangements.
19. A drive arrangement as claimed in claim 18 arranged such that at least some of the semiconductor devices are controlled to be driven at opposite conduction levels to the remaining semiconductor devices.
20. A drive arrangement as claimed in claim 19 for semiconductor devices of the same polarity type in which the pulse transformer secondary windings associated with said at least some of the semiconductor devices are connected to provide pulses of opposite polarity with respect to the secondary windings associated with said remaining semiconductor devices.
21. A drive arrangement as claimed in any one of the preceding claims in which the, or each, semiconductor device driven is an n-channel enhancement mode F.E.T.
22. A drive arrangement for effecting alternate levels of conduction in a semiconductor device substantially as herein described with reference to and as shown by, any one of Figures 1 to 5 of the accompanying drawings.
23. A drive arrangement for effecting alternate levels of conduction in a plurality of semiconductor devices substantially as herein described with reference to, and as shown in Figures 6 to 8 of the accompanying drawings.
24. A method of driving a semiconductor device alternately at two different levels of conduction comprises generating intermittently in a generator, coupled by way of a pulse transformer and assymmetrical threshold conduction means (as herein defined) to control electrodes of the semiconductor device, pulses of opposite polarity and of such magnitude that transformed generated pulses of one polarity bias the assymmetrical threshold conduction means to apply a control voltage to the control electrodes to drive it at one conduction level, the control voltage thereafter reverse biasing the assymmetrical threshold conduction means to maintain that conduction level, and transformed generated pulses of the other polarity cause the assymmetrical threshold conduction means to conduct in the opposite direction to drive the semiconductor device at another conduction level, that conduction level being maintained until a generation of a subsequent pulse of said one polarity.
25. A method of driving a semiconductor device substantially as herein described with reference to, and as shown in any one of Figures 1 to 5 of the accompanying drawings.
26. A method of driving a pair of semiconductor devices oppositely and alternately between two different levels of conduction comprises generating intermittently pulses of opposite polarity in a generator coupled by way of a pulse transformer and individual assymmetrical threshold conduction means (as herein defined) to control electrodes of the semiconductor devices, and causing transformed generated pulses of one polarity to bias the assymmetrical threshold conduction means associated with one of the devices to conduct in one direction to apply a control voltage to the control electrodes to drive the semiconductor device at one conduction level, while causing conduction of the assymmetrical threshold conduction means associated with the other semiconductor device in the opposite direction to drive said other device at another conduction level, and vice versa for pulses of said opposite polarity.
27. A method of driving a pair of semiconductor devices oppositely and alternately between two different levels substantially as herein described with reference to, and as shown by, Figures 6 to 8 of the accompanying drawings.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB08131805A GB2109184B (en) | 1981-10-22 | 1981-10-22 | Controlling conduction of semiconductor device |
| DE19823238127 DE3238127A1 (en) | 1981-10-22 | 1982-10-14 | ARRANGEMENT FOR CONTROLLING SEMICONDUCTOR CIRCUITS |
| FR8217533A FR2515443B1 (en) | 1981-10-22 | 1982-10-20 | TRANSFORMER COUPLED EXCITATION MOUNT |
| JP57184761A JPS5881333A (en) | 1981-10-22 | 1982-10-22 | Conduction level switching drive device for semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB08131805A GB2109184B (en) | 1981-10-22 | 1981-10-22 | Controlling conduction of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB2109184A true GB2109184A (en) | 1983-05-25 |
| GB2109184B GB2109184B (en) | 1984-11-07 |
Family
ID=10525323
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB08131805A Expired GB2109184B (en) | 1981-10-22 | 1981-10-22 | Controlling conduction of semiconductor device |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS5881333A (en) |
| DE (1) | DE3238127A1 (en) |
| FR (1) | FR2515443B1 (en) |
| GB (1) | GB2109184B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2587157A1 (en) * | 1985-09-06 | 1987-03-13 | Thomson Csf | VOLTAGE SWITCHING DEVICE |
| EP0299088A1 (en) * | 1987-01-29 | 1989-01-18 | Fanuc Ltd. | Pre-drive circuit |
| EP0486359A1 (en) * | 1990-11-16 | 1992-05-20 | General Electric Cgr S.A. | Low frequency switching control circuit for field-effect transistors and insulated gate bipolar transistors |
| EP0578555A1 (en) * | 1992-07-10 | 1994-01-12 | STMicroelectronics S.A. | Pulse-controlled converter and electronic motor control |
| WO1997011529A1 (en) * | 1995-09-20 | 1997-03-27 | Robert Bosch Gmbh | Circuit for the multiple use of a transformer core |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3346635A1 (en) * | 1983-12-23 | 1985-07-04 | Krone Gmbh, 1000 Berlin | Circuit arrangement of an electronic heavy-current switch |
| DE3527130A1 (en) * | 1985-07-29 | 1987-01-29 | Flachenecker Gerhard | Switching amplifier with a field effect transistor |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4871958A (en) * | 1971-12-28 | 1973-09-28 | ||
| DE2431006A1 (en) * | 1974-06-27 | 1976-01-08 | Rohde & Schwarz | Pulse controlled on-off switch - has two junction field-effect transistors whose drain-source paths are used for switching |
| DE3028986A1 (en) * | 1980-07-30 | 1982-03-04 | Siemens AG, 1000 Berlin und 8000 München | MOS FET switch - has triple wound input transformer with blocking oscillator |
| DE3124891C2 (en) * | 1981-06-25 | 1985-06-13 | Brown, Boveri & Cie Ag, 6800 Mannheim | Transistor switching stage |
-
1981
- 1981-10-22 GB GB08131805A patent/GB2109184B/en not_active Expired
-
1982
- 1982-10-14 DE DE19823238127 patent/DE3238127A1/en not_active Withdrawn
- 1982-10-20 FR FR8217533A patent/FR2515443B1/en not_active Expired
- 1982-10-22 JP JP57184761A patent/JPS5881333A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2587157A1 (en) * | 1985-09-06 | 1987-03-13 | Thomson Csf | VOLTAGE SWITCHING DEVICE |
| EP0215707A1 (en) * | 1985-09-06 | 1987-03-25 | Thomson-Csf | Voltage switching apparatus |
| US4751408A (en) * | 1985-09-06 | 1988-06-14 | Thomson-Csf | Voltage-switching device |
| EP0299088A1 (en) * | 1987-01-29 | 1989-01-18 | Fanuc Ltd. | Pre-drive circuit |
| EP0299088A4 (en) * | 1987-01-29 | 1990-05-14 | Fanuc Ltd | Pre-drive circuit. |
| US4967101A (en) * | 1987-01-29 | 1990-10-30 | Fanuc Ltd. | Pre-drive circuit |
| EP0486359A1 (en) * | 1990-11-16 | 1992-05-20 | General Electric Cgr S.A. | Low frequency switching control circuit for field-effect transistors and insulated gate bipolar transistors |
| FR2669477A1 (en) * | 1990-11-16 | 1992-05-22 | Gen Electric Cgr | LOW FREQUENCY FREQUENCY SWITCHING CONTROL CIRCUIT FOR FIELD EFFECT TRANSISTORS AND BIPOLAR ISOLATED GRID TRANSISTORS. |
| EP0578555A1 (en) * | 1992-07-10 | 1994-01-12 | STMicroelectronics S.A. | Pulse-controlled converter and electronic motor control |
| FR2693604A1 (en) * | 1992-07-10 | 1994-01-14 | Sgs Thomson Microelectronics | Pulse controlled converter and electric motor control. |
| US5469041A (en) * | 1992-07-10 | 1995-11-21 | Sgs-Thomson Microelectronics, S.A. | Pulse-controlled converter and electric motor controller |
| WO1997011529A1 (en) * | 1995-09-20 | 1997-03-27 | Robert Bosch Gmbh | Circuit for the multiple use of a transformer core |
| US5872706A (en) * | 1995-09-20 | 1999-02-16 | Robert Bosch Gmbh | Circuit arrangement for multiple use of a transformer core |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2109184B (en) | 1984-11-07 |
| JPS5881333A (en) | 1983-05-16 |
| FR2515443A1 (en) | 1983-04-29 |
| DE3238127A1 (en) | 1983-05-05 |
| FR2515443B1 (en) | 1985-11-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19921022 |